From patchwork Mon Jul 17 16:42:55 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 108022 Delivered-To: patches@linaro.org Received: by 10.140.101.44 with SMTP id t41csp4744357qge; Mon, 17 Jul 2017 09:42:58 -0700 (PDT) X-Received: by 10.28.134.72 with SMTP id i69mr120044wmd.0.1500309778023; Mon, 17 Jul 2017 09:42:58 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1500309778; cv=none; d=google.com; s=arc-20160816; b=oEvz6UMb6cGAaK1j3wQal5neDJWpho8Sy39bhyxFjUiSOtjoSrAzvp29wmuxujwM84 fbKY32vjMjOJ8wkKfV+74828f7YkPqpt3ohv3SUU+9RnoNkNvmOB8BdxAy4v6TOs+ZHw AnHAAUol0WMCE4UzE3czJtfap0FH+4llRYF+8upSrulz5Ml25CaqNs2nZKwebsCS8qHk JdukjT4Zrrq7zZRHUD+/ErbNWZ9y420QoM3yYHRi+chglOOzhC2GXG94PklEYKb3ML6a o8GOznYF2+mC2BvxBZPNfIDfJ8nUCm/+cs4g8SMwbMOiro08j7orXyZNyHneGbQnWFwR 9nYg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=message-id:date:subject:cc:to:from:arc-authentication-results; bh=eEDOutyEg+u8m3LtgvgJZRRMp7bU3OMv5d7bgdsDVzw=; b=WmqE3ZcT/sYEClEgEYLGT5Y/QKFOHBFm5dVqZaFiWAv+St4MHAj6SRyk4TrcXFgNZt 0rEXocv/blDUDgt9EYM+XiI5haTU3kSHkJP2hqghQRRQ0+kJdVtJJEWG1J2y+LnJIl2T vIBFyXFlIpOGI6rEUKR6SPVT2Ua+Z1BmGzHsyijRcm38KQ4fg2q59giV5xktwqY8yFUJ k1UUv9F263FBhr34t/ZLLS66vM8X/u7VeA1ePlCGtkbBEFoDPLAX9n8RqRuM4xpR49NW /c3GSuMwZiLyjuD7iBICmBAbf0pPM3kdX5ntXrAlrw32AK9fsSdlW1GsrEYaUlNllkUv lr+Q== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 2001:8b0:1d0::2 as permitted sender) smtp.mailfrom=pm215@archaic.org.uk; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by mx.google.com with ESMTPS id g5si2185796wrb.153.2017.07.17.09.42.57 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 17 Jul 2017 09:42:58 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 2001:8b0:1d0::2 as permitted sender) client-ip=2001:8b0:1d0::2; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 2001:8b0:1d0::2 as permitted sender) smtp.mailfrom=pm215@archaic.org.uk; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from pm215 by orth.archaic.org.uk with local (Exim 4.84_2) (envelope-from ) id 1dX96m-0003mH-AZ; Mon, 17 Jul 2017 17:42:56 +0100 From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Cc: patches@linaro.org, Jean-Christophe Dubois Subject: [PATCH for-2.10] fsl_imx*: Migrate ROM contents Date: Mon, 17 Jul 2017 17:42:55 +0100 Message-Id: <1500309775-18361-1-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 2.7.4 The fsl-imx* boards accidentally forgot to register the ROM memory regions for migration. This used to require a manual step of calling vmstate_register_ram(), but following commits 1cfe48c1ce21..b08199c6fbea194 we can use memory_region_init_rom() to have it do the migration for us. This is a migration break, but the migration code currently does not handle the case of having two RAM regions which were not registered for migration, and so prior to this commit a migration load would always fail with: "qemu-system-arm: Length mismatch: 0x4000 in != 0x18000: Invalid argument" NB: migration appears at this point to be broken for this board anyway -- it succeeds but the destination hangs; probably some device in the system does not yet support migration. Signed-off-by: Peter Maydell --- hw/arm/fsl-imx25.c | 4 ++-- hw/arm/fsl-imx31.c | 4 ++-- hw/arm/fsl-imx6.c | 4 ++-- 3 files changed, 6 insertions(+), 6 deletions(-) -- 2.7.4 diff --git a/hw/arm/fsl-imx25.c b/hw/arm/fsl-imx25.c index 8cff3c1..3b97ece 100644 --- a/hw/arm/fsl-imx25.c +++ b/hw/arm/fsl-imx25.c @@ -249,7 +249,7 @@ static void fsl_imx25_realize(DeviceState *dev, Error **errp) } /* initialize 2 x 16 KB ROM */ - memory_region_init_rom_nomigrate(&s->rom[0], NULL, + memory_region_init_rom(&s->rom[0], NULL, "imx25.rom0", FSL_IMX25_ROM0_SIZE, &err); if (err) { error_propagate(errp, err); @@ -257,7 +257,7 @@ static void fsl_imx25_realize(DeviceState *dev, Error **errp) } memory_region_add_subregion(get_system_memory(), FSL_IMX25_ROM0_ADDR, &s->rom[0]); - memory_region_init_rom_nomigrate(&s->rom[1], NULL, + memory_region_init_rom(&s->rom[1], NULL, "imx25.rom1", FSL_IMX25_ROM1_SIZE, &err); if (err) { error_propagate(errp, err); diff --git a/hw/arm/fsl-imx31.c b/hw/arm/fsl-imx31.c index 9027875..0f2ebe8 100644 --- a/hw/arm/fsl-imx31.c +++ b/hw/arm/fsl-imx31.c @@ -219,7 +219,7 @@ static void fsl_imx31_realize(DeviceState *dev, Error **errp) } /* On a real system, the first 16k is a `secure boot rom' */ - memory_region_init_rom_nomigrate(&s->secure_rom, NULL, "imx31.secure_rom", + memory_region_init_rom(&s->secure_rom, NULL, "imx31.secure_rom", FSL_IMX31_SECURE_ROM_SIZE, &err); if (err) { error_propagate(errp, err); @@ -229,7 +229,7 @@ static void fsl_imx31_realize(DeviceState *dev, Error **errp) &s->secure_rom); /* There is also a 16k ROM */ - memory_region_init_rom_nomigrate(&s->rom, NULL, "imx31.rom", + memory_region_init_rom(&s->rom, NULL, "imx31.rom", FSL_IMX31_ROM_SIZE, &err); if (err) { error_propagate(errp, err); diff --git a/hw/arm/fsl-imx6.c b/hw/arm/fsl-imx6.c index 576c663..26fd214 100644 --- a/hw/arm/fsl-imx6.c +++ b/hw/arm/fsl-imx6.c @@ -399,7 +399,7 @@ static void fsl_imx6_realize(DeviceState *dev, Error **errp) FSL_IMX6_ENET_MAC_1588_IRQ)); /* ROM memory */ - memory_region_init_rom_nomigrate(&s->rom, NULL, "imx6.rom", + memory_region_init_rom(&s->rom, NULL, "imx6.rom", FSL_IMX6_ROM_SIZE, &err); if (err) { error_propagate(errp, err); @@ -409,7 +409,7 @@ static void fsl_imx6_realize(DeviceState *dev, Error **errp) &s->rom); /* CAAM memory */ - memory_region_init_rom_nomigrate(&s->caam, NULL, "imx6.caam", + memory_region_init_rom(&s->caam, NULL, "imx6.caam", FSL_IMX6_CAAM_MEM_SIZE, &err); if (err) { error_propagate(errp, err);