diff mbox series

[for-2.10,1/5] target/arm: Don't do MPU lookups for addresses in M profile PPB region

Message ID 1501153150-19984-2-git-send-email-peter.maydell@linaro.org
State Superseded
Headers show
Series M profile MPU bugfixes | expand

Commit Message

Peter Maydell July 27, 2017, 10:59 a.m. UTC
The M profile PMSAv7 specification says that if the address being looked
up is in the PPB region (0xe0000000 - 0xe00fffff) then we do not use
the MPU regions but always use the default memory map. Implement this
(we were previously behaving like an R profile PMSAv7, which does not
special case this).

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

---
 target/arm/helper.c | 17 ++++++++++++++++-
 1 file changed, 16 insertions(+), 1 deletion(-)

-- 
2.7.4

Comments

Philippe Mathieu-Daudé July 27, 2017, 11:32 p.m. UTC | #1
On 07/27/2017 07:59 AM, Peter Maydell wrote:
> The M profile PMSAv7 specification says that if the address being looked

> up is in the PPB region (0xe0000000 - 0xe00fffff) then we do not use

> the MPU regions but always use the default memory map. Implement this

> (we were previously behaving like an R profile PMSAv7, which does not

> special case this).

> 

> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

> ---

>   target/arm/helper.c | 17 ++++++++++++++++-

>   1 file changed, 16 insertions(+), 1 deletion(-)

> 

> diff --git a/target/arm/helper.c b/target/arm/helper.c

> index 4ed32c5..ceef225 100644

> --- a/target/arm/helper.c

> +++ b/target/arm/helper.c

> @@ -8244,6 +8244,13 @@ static bool pmsav7_use_background_region(ARMCPU *cpu,

>       }

>   }

>   

> +static inline bool is_ppb_region(CPUARMState *env, uint32_t address)

> +{

> +    /* True if address is in the M profile PPB region 0xe0000000 - 0xe00fffff */

> +    return arm_feature(env, ARM_FEATURE_M) &&

> +        extract32(address, 20, 12) == 0xe00;

> +}

> +

>   static bool get_phys_addr_pmsav7(CPUARMState *env, uint32_t address,

>                                    int access_type, ARMMMUIdx mmu_idx,

>                                    hwaddr *phys_ptr, int *prot, uint32_t *fsr)

> @@ -8255,7 +8262,15 @@ static bool get_phys_addr_pmsav7(CPUARMState *env, uint32_t address,

>       *phys_ptr = address;

>       *prot = 0;

>   

> -    if (regime_translation_disabled(env, mmu_idx)) { /* MPU disabled */

> +    if (regime_translation_disabled(env, mmu_idx) ||

> +        is_ppb_region(env, address)) {

> +        /* MPU disabled or M profile PPB access: use default memory map.

> +         * The other case which uses the default memory map in the

> +         * v7M ARM ARM pseudocode is exception vector reads from the vector

> +         * table. In QEMU those accesses are done in arm_v7m_load_vector(),

> +         * which always does a direct read using address_space_ldl(), rather

> +         * than going via this function, so we don't need to check that here.

> +         */


Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>


>           get_phys_addr_pmsav7_default(env, mmu_idx, address, prot);

>       } else { /* MPU enabled */

>           for (n = (int)cpu->pmsav7_dregion - 1; n >= 0; n--) {

>
diff mbox series

Patch

diff --git a/target/arm/helper.c b/target/arm/helper.c
index 4ed32c5..ceef225 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -8244,6 +8244,13 @@  static bool pmsav7_use_background_region(ARMCPU *cpu,
     }
 }
 
+static inline bool is_ppb_region(CPUARMState *env, uint32_t address)
+{
+    /* True if address is in the M profile PPB region 0xe0000000 - 0xe00fffff */
+    return arm_feature(env, ARM_FEATURE_M) &&
+        extract32(address, 20, 12) == 0xe00;
+}
+
 static bool get_phys_addr_pmsav7(CPUARMState *env, uint32_t address,
                                  int access_type, ARMMMUIdx mmu_idx,
                                  hwaddr *phys_ptr, int *prot, uint32_t *fsr)
@@ -8255,7 +8262,15 @@  static bool get_phys_addr_pmsav7(CPUARMState *env, uint32_t address,
     *phys_ptr = address;
     *prot = 0;
 
-    if (regime_translation_disabled(env, mmu_idx)) { /* MPU disabled */
+    if (regime_translation_disabled(env, mmu_idx) ||
+        is_ppb_region(env, address)) {
+        /* MPU disabled or M profile PPB access: use default memory map.
+         * The other case which uses the default memory map in the
+         * v7M ARM ARM pseudocode is exception vector reads from the vector
+         * table. In QEMU those accesses are done in arm_v7m_load_vector(),
+         * which always does a direct read using address_space_ldl(), rather
+         * than going via this function, so we don't need to check that here.
+         */
         get_phys_addr_pmsav7_default(env, mmu_idx, address, prot);
     } else { /* MPU enabled */
         for (n = (int)cpu->pmsav7_dregion - 1; n >= 0; n--) {