[RFC,6/9] target/arm/translate-a64: regnames -> x_regnames

Message ID	20170817180404.29334-7-alex.bennee@linaro.org
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Headers	show Delivered-To: patch@linaro.org Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) client-ip=2001:4830:134:3::11; From: =?utf-8?q?Alex_Benn=C3=A9e?= <alex.bennee@linaro.org> To: rth@twiddle.net, cota@braap.org, batuzovk@ispras.ru Date: Thu, 17 Aug 2017 19:04:01 +0100 Message-Id: <20170817180404.29334-7-alex.bennee@linaro.org> In-Reply-To: <20170817180404.29334-1-alex.bennee@linaro.org> References: <20170817180404.29334-1-alex.bennee@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Subject: [Qemu-devel] [RFC PATCH 6/9] target/arm/translate-a64: regnames -> x_regnames Precedence: list Cc: Peter Maydell <peter.maydell@linaro.org>, qemu-arm@nongnu.org, =?utf-8?q?Alex_Benn=C3=A9e?= <alex.bennee@linaro.org>, qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" <qemu-devel-bounces+patch=linaro.org@nongnu.org>
Series	TCG Vector types and example conversion \| expand [RFC,0/9] TCG Vector types and example conversion [RFC,1/9] tcg/README: listify the TCG types. [RFC,2/9] tcg: introduce the concepts of a TCGv_vec register type [RFC,3/9] tcg: generate ptrs to vector registers [RFC,4/9] helper-head: add support for vec type [RFC,5/9] arm/cpu.h: align VFP registers [RFC,6/9] target/arm/translate-a64: regnames -> x_regnames [RFC,7/9] target/arm/translate-a64: register global vectors [RFC,8/9] target/arm/helpers: introduce ADVSIMD flags [RFC,9/9] target/arm/translate-a64: vectorise smull vD.4s, vN.[48]s, vM.h[]

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20170817180404.29334-7-alex.bennee@linaro.org

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Subject: [Qemu-devel] [RFC PATCH 6/9] target/arm/translate-a64: regnames ->
	x_regnames
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Series

TCG Vector types and example conversion | expand

These are the integer registers as will become clear when we start declaring the vector ones. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> --- target/arm/translate-a64.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- 2.13.0

Comments

Richard Henderson Aug. 17, 2017, 8:14 p.m. UTC | #1

On 08/17/2017 11:04 AM, Alex Bennée wrote:
> -static const char *regnames[] = {

> +static const char *x_regnames[] = {

>      "x0", "x1", "x2", "x3", "x4", "x5", "x6", "x7",

>      "x8", "x9", "x10", "x11", "x12", "x13", "x14", "x15",

>      "x16", "x17", "x18", "x19", "x20", "x21", "x22", "x23",


Mis-patch?  There should be uses of this array to be renamed too.


r~

diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c
index 2200e25be0..805af51900 100644
--- a/target/arm/translate-a64.c
+++ b/target/arm/translate-a64.c
@@ -43,7 +43,7 @@  static TCGv_i64 cpu_pc;
 static TCGv_i64 cpu_exclusive_high;
 static TCGv_i64 cpu_reg(DisasContext *s, int reg);
 
-static const char *regnames[] = {
+static const char *x_regnames[] = {
     "x0", "x1", "x2", "x3", "x4", "x5", "x6", "x7",
     "x8", "x9", "x10", "x11", "x12", "x13", "x14", "x15",
     "x16", "x17", "x18", "x19", "x20", "x21", "x22", "x23",

[RFC,6/9] target/arm/translate-a64: regnames -> x_regnames

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