[AArch64] Tighten address register subreg checks

Message ID 871so4c5u9.fsf@linaro.org
State New
Headers show

Commit Message

Richard Sandiford Aug. 22, 2017, 9:25 a.m.
Previously we allowed subregs of non-GPR modes to be base and index
registers in non-strict mode.  In practice such subregs will always
require a reload, so we get better code by disallowing them.

Tested on aarch64-linux-gnu.  OK to install?

Richard


2017-08-22  Richard Sandiford  <richard.sandiford@linaro.org>
	    Alan Hayward  <alan.hayward@arm.com>
	    David Sherwood  <david.sherwood@arm.com>

gcc/
	* config/aarch64/aarch64.c (aarch64_base_register_rtx_p): Only allow
	subregs whose inner modes can be stored in GPRs.
	(aarch64_classify_index): Likewise.

Comments

James Greenhalgh Aug. 30, 2017, 5:17 p.m. | #1
On Tue, Aug 22, 2017 at 10:25:02AM +0100, Richard Sandiford wrote:
> Previously we allowed subregs of non-GPR modes to be base and index

> registers in non-strict mode.  In practice such subregs will always

> require a reload, so we get better code by disallowing them.


Makes sense.

> Tested on aarch64-linux-gnu.  OK to install?


OK.

Thanks,
James

> 2017-08-22  Richard Sandiford  <richard.sandiford@linaro.org>

> 	    Alan Hayward  <alan.hayward@arm.com>

> 	    David Sherwood  <david.sherwood@arm.com>

> 

> gcc/

> 	* config/aarch64/aarch64.c (aarch64_base_register_rtx_p): Only allow

> 	subregs whose inner modes can be stored in GPRs.

> 	(aarch64_classify_index): Likewise.

>

Patch

Index: gcc/config/aarch64/aarch64.c
===================================================================
--- gcc/config/aarch64/aarch64.c	2017-08-22 10:12:29.280432708 +0100
+++ gcc/config/aarch64/aarch64.c	2017-08-22 10:13:53.032828125 +0100
@@ -4196,7 +4196,9 @@  aarch64_regno_ok_for_base_p (int regno,
 static bool
 aarch64_base_register_rtx_p (rtx x, bool strict_p)
 {
-  if (!strict_p && GET_CODE (x) == SUBREG)
+  if (!strict_p
+      && GET_CODE (x) == SUBREG
+      && contains_reg_of_mode[GENERAL_REGS][GET_MODE (SUBREG_REG (x))])
     x = SUBREG_REG (x);
 
   return (REG_P (x) && aarch64_regno_ok_for_base_p (REGNO (x), strict_p));
@@ -4343,7 +4345,9 @@  aarch64_classify_index (struct aarch64_a
   else
     return false;
 
-  if (GET_CODE (index) == SUBREG)
+  if (!strict_p
+      && GET_CODE (index) == SUBREG
+      && contains_reg_of_mode[GENERAL_REGS][GET_MODE (SUBREG_REG (index))])
     index = SUBREG_REG (index);
 
   if ((shift == 0 ||