diff mbox series

[PULL,01/14] tcg: Remove support for ia64 as host

Message ID 20170906144940.30880-2-richard.henderson@linaro.org
State New
Headers show
Series TCG misc queued patches | expand

Commit Message

Richard Henderson Sept. 6, 2017, 2:49 p.m. UTC
We threatened to remove ia64 as host in v2.9.0.  Its time has now come.

There are still some usages of defined(__ia64__) throughout the source
code that would be triggered if one were to enable TCI on an ia64 host.
Leave those alone for now.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

---
 tcg/ia64/tcg-target.h     |   198 -
 disas.c                   |     2 -
 disas/ia64.c              | 10600 --------------------------------------------
 tcg/ia64/tcg-target.inc.c |  2482 -----------
 MAINTAINERS               |     6 -
 configure                 |     6 -
 disas/Makefile.objs       |     1 -
 7 files changed, 13295 deletions(-)
 delete mode 100644 tcg/ia64/tcg-target.h
 delete mode 100644 disas/ia64.c
 delete mode 100644 tcg/ia64/tcg-target.inc.c

-- 
2.13.5
diff mbox series

Patch

diff --git a/tcg/ia64/tcg-target.h b/tcg/ia64/tcg-target.h
deleted file mode 100644
index 901bb7575d..0000000000
--- a/tcg/ia64/tcg-target.h
+++ /dev/null
@@ -1,198 +0,0 @@ 
-/*
- * Tiny Code Generator for QEMU
- *
- * Copyright (c) 2009-2010 Aurelien Jarno <aurelien@aurel32.net>
- * Based on i386/tcg-target.c - Copyright (c) 2008 Fabrice Bellard
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to deal
- * in the Software without restriction, including without limitation the rights
- * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
- * copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
- * THE SOFTWARE.
- */
-
-#ifndef IA64_TCG_TARGET_H
-#define IA64_TCG_TARGET_H
-
-#define TCG_TARGET_INSN_UNIT_SIZE 16
-#define TCG_TARGET_TLB_DISPLACEMENT_BITS 21
-
-typedef struct {
-    uint64_t lo __attribute__((aligned(16)));
-    uint64_t hi;
-} tcg_insn_unit;
-
-/* We only map the first 64 registers */
-#define TCG_TARGET_NB_REGS 64
-typedef enum {
-    TCG_REG_R0 = 0,
-    TCG_REG_R1,
-    TCG_REG_R2,
-    TCG_REG_R3,
-    TCG_REG_R4,
-    TCG_REG_R5,
-    TCG_REG_R6,
-    TCG_REG_R7,
-    TCG_REG_R8,
-    TCG_REG_R9,
-    TCG_REG_R10,
-    TCG_REG_R11,
-    TCG_REG_R12,
-    TCG_REG_R13,
-    TCG_REG_R14,
-    TCG_REG_R15,
-    TCG_REG_R16,
-    TCG_REG_R17,
-    TCG_REG_R18,
-    TCG_REG_R19,
-    TCG_REG_R20,
-    TCG_REG_R21,
-    TCG_REG_R22,
-    TCG_REG_R23,
-    TCG_REG_R24,
-    TCG_REG_R25,
-    TCG_REG_R26,
-    TCG_REG_R27,
-    TCG_REG_R28,
-    TCG_REG_R29,
-    TCG_REG_R30,
-    TCG_REG_R31,
-    TCG_REG_R32,
-    TCG_REG_R33,
-    TCG_REG_R34,
-    TCG_REG_R35,
-    TCG_REG_R36,
-    TCG_REG_R37,
-    TCG_REG_R38,
-    TCG_REG_R39,
-    TCG_REG_R40,
-    TCG_REG_R41,
-    TCG_REG_R42,
-    TCG_REG_R43,
-    TCG_REG_R44,
-    TCG_REG_R45,
-    TCG_REG_R46,
-    TCG_REG_R47,
-    TCG_REG_R48,
-    TCG_REG_R49,
-    TCG_REG_R50,
-    TCG_REG_R51,
-    TCG_REG_R52,
-    TCG_REG_R53,
-    TCG_REG_R54,
-    TCG_REG_R55,
-    TCG_REG_R56,
-    TCG_REG_R57,
-    TCG_REG_R58,
-    TCG_REG_R59,
-    TCG_REG_R60,
-    TCG_REG_R61,
-    TCG_REG_R62,
-    TCG_REG_R63,
-
-    TCG_AREG0 = TCG_REG_R32,
-} TCGReg;
-
-#define TCG_CT_CONST_ZERO 0x100
-#define TCG_CT_CONST_S22 0x200
-
-/* used for function call generation */
-#define TCG_REG_CALL_STACK TCG_REG_R12
-#define TCG_TARGET_STACK_ALIGN 16
-#define TCG_TARGET_CALL_STACK_OFFSET 16
-
-/* optional instructions */
-#define TCG_TARGET_HAS_div_i32          0
-#define TCG_TARGET_HAS_rem_i32          0
-#define TCG_TARGET_HAS_div_i64          0
-#define TCG_TARGET_HAS_rem_i64          0
-#define TCG_TARGET_HAS_andc_i32         1
-#define TCG_TARGET_HAS_andc_i64         1
-#define TCG_TARGET_HAS_bswap16_i32      1
-#define TCG_TARGET_HAS_bswap16_i64      1
-#define TCG_TARGET_HAS_bswap32_i32      1
-#define TCG_TARGET_HAS_bswap32_i64      1
-#define TCG_TARGET_HAS_bswap64_i64      1
-#define TCG_TARGET_HAS_eqv_i32          1
-#define TCG_TARGET_HAS_eqv_i64          1
-#define TCG_TARGET_HAS_ext8s_i32        1
-#define TCG_TARGET_HAS_ext16s_i32       1
-#define TCG_TARGET_HAS_ext8s_i64        1
-#define TCG_TARGET_HAS_ext16s_i64       1
-#define TCG_TARGET_HAS_ext32s_i64       1
-#define TCG_TARGET_HAS_ext8u_i32        1
-#define TCG_TARGET_HAS_ext16u_i32       1
-#define TCG_TARGET_HAS_ext8u_i64        1
-#define TCG_TARGET_HAS_ext16u_i64       1
-#define TCG_TARGET_HAS_ext32u_i64       1
-#define TCG_TARGET_HAS_nand_i32         1
-#define TCG_TARGET_HAS_nand_i64         1
-#define TCG_TARGET_HAS_nor_i32          1
-#define TCG_TARGET_HAS_clz_i32          0
-#define TCG_TARGET_HAS_clz_i64          0
-#define TCG_TARGET_HAS_ctz_i32          0
-#define TCG_TARGET_HAS_ctz_i64          0
-#define TCG_TARGET_HAS_ctpop_i32        0
-#define TCG_TARGET_HAS_ctpop_i64        0
-#define TCG_TARGET_HAS_nor_i64          1
-#define TCG_TARGET_HAS_orc_i32          1
-#define TCG_TARGET_HAS_orc_i64          1
-#define TCG_TARGET_HAS_rot_i32          1
-#define TCG_TARGET_HAS_rot_i64          1
-#define TCG_TARGET_HAS_movcond_i32      1
-#define TCG_TARGET_HAS_movcond_i64      1
-#define TCG_TARGET_HAS_deposit_i32      1
-#define TCG_TARGET_HAS_deposit_i64      1
-#define TCG_TARGET_HAS_extract_i32      0
-#define TCG_TARGET_HAS_extract_i64      0
-#define TCG_TARGET_HAS_sextract_i32     0
-#define TCG_TARGET_HAS_sextract_i64     0
-#define TCG_TARGET_HAS_add2_i32         0
-#define TCG_TARGET_HAS_add2_i64         0
-#define TCG_TARGET_HAS_sub2_i32         0
-#define TCG_TARGET_HAS_sub2_i64         0
-#define TCG_TARGET_HAS_mulu2_i32        0
-#define TCG_TARGET_HAS_mulu2_i64        0
-#define TCG_TARGET_HAS_muls2_i32        0
-#define TCG_TARGET_HAS_muls2_i64        0
-#define TCG_TARGET_HAS_muluh_i32        0
-#define TCG_TARGET_HAS_muluh_i64        0
-#define TCG_TARGET_HAS_mulsh_i32        0
-#define TCG_TARGET_HAS_mulsh_i64        0
-#define TCG_TARGET_HAS_extrl_i64_i32    0
-#define TCG_TARGET_HAS_extrh_i64_i32    0
-#define TCG_TARGET_HAS_goto_ptr         0
-
-#define TCG_TARGET_deposit_i32_valid(ofs, len) ((len) <= 16)
-#define TCG_TARGET_deposit_i64_valid(ofs, len) ((len) <= 16)
-
-/* optional instructions automatically implemented */
-#define TCG_TARGET_HAS_neg_i32          0 /* sub r1, r0, r3 */
-#define TCG_TARGET_HAS_neg_i64          0 /* sub r1, r0, r3 */
-#define TCG_TARGET_HAS_not_i32          0 /* xor r1, -1, r3 */
-#define TCG_TARGET_HAS_not_i64          0 /* xor r1, -1, r3 */
-
-static inline void flush_icache_range(uintptr_t start, uintptr_t stop)
-{
-    start = start & ~(32UL - 1UL);
-    stop = (stop + (32UL - 1UL)) & ~(32UL - 1UL);
-
-    for (; start < stop; start += 32UL) {
-        asm volatile ("fc.i %0" :: "r" (start));
-    }
-    asm volatile (";;sync.i;;srlz.i;;");
-}
-
-#endif
diff --git a/disas.c b/disas.c
index d335c55bbf..d6a1eb9c8e 100644
--- a/disas.c
+++ b/disas.c
@@ -313,8 +313,6 @@  void disas(FILE *out, void *code, unsigned long size)
     print_insn = print_insn_s390;
 #elif defined(__hppa__)
     print_insn = print_insn_hppa;
-#elif defined(__ia64__)
-    print_insn = print_insn_ia64;
 #endif
     if (print_insn == NULL) {
         print_insn = print_insn_od_host;
diff --git a/disas/ia64.c b/disas/ia64.c
deleted file mode 100644
index 140754c944..0000000000
--- a/disas/ia64.c
+++ /dev/null
@@ -1,10600 +0,0 @@ 
-/* ia64-dis.c -- Disassemble ia64 instructions
-   Copyright 1998, 1999, 2000, 2002 Free Software Foundation, Inc.
-   Contributed by David Mosberger-Tang <davidm@hpl.hp.com>
-
-   This file is part of GDB, GAS, and the GNU binutils.
-
-   GDB, GAS, and the GNU binutils are free software; you can redistribute
-   them and/or modify them under the terms of the GNU General Public
-   License as published by the Free Software Foundation; either version
-   2, or (at your option) any later version.
-
-   GDB, GAS, and the GNU binutils are distributed in the hope that they
-   will be useful, but WITHOUT ANY WARRANTY; without even the implied
-   warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See
-   the GNU General Public License for more details.
-
-   You should have received a copy of the GNU General Public License
-   along with this file; see the file COPYING.  If not, see
-   <http://www.gnu.org/licenses/>. */
-
-#include "qemu/osdep.h"
-
-#include "disas/bfd.h"
-
-/* ia64.h -- Header file for ia64 opcode table
-   Copyright (C) 1998, 1999, 2000, 2002, 2005, 2006
-   Free Software Foundation, Inc.
-   Contributed by David Mosberger-Tang <davidm@hpl.hp.com> */
-
-
-typedef uint64_t ia64_insn;
-
-enum ia64_insn_type
-  {
-    IA64_TYPE_NIL = 0,	/* illegal type */
-    IA64_TYPE_A,	/* integer alu (I- or M-unit) */
-    IA64_TYPE_I,	/* non-alu integer (I-unit) */
-    IA64_TYPE_M,	/* memory (M-unit) */
-    IA64_TYPE_B,	/* branch (B-unit) */
-    IA64_TYPE_F,	/* floating-point (F-unit) */
-    IA64_TYPE_X,	/* long encoding (X-unit) */
-    IA64_TYPE_DYN,	/* Dynamic opcode */
-    IA64_NUM_TYPES
-  };
-
-enum ia64_unit
-  {
-    IA64_UNIT_NIL = 0,	/* illegal unit */
-    IA64_UNIT_I,	/* integer unit */
-    IA64_UNIT_M,	/* memory unit */
-    IA64_UNIT_B,	/* branching unit */
-    IA64_UNIT_F,	/* floating-point unit */
-    IA64_UNIT_L,	/* long "unit" */
-    IA64_UNIT_X,	/* may be integer or branch unit */
-    IA64_NUM_UNITS
-  };
-
-/* Changes to this enumeration must be propagated to the operand table in
-   bfd/cpu-ia64-opc.c
- */
-enum ia64_opnd
-  {
-    IA64_OPND_NIL,	/* no operand---MUST BE FIRST!*/
-
-    /* constants */
-    IA64_OPND_AR_CSD,	/* application register csd (ar.csd) */
-    IA64_OPND_AR_CCV,	/* application register ccv (ar.ccv) */
-    IA64_OPND_AR_PFS,	/* application register pfs (ar.pfs) */
-    IA64_OPND_C1,	/* the constant 1 */
-    IA64_OPND_C8,	/* the constant 8 */
-    IA64_OPND_C16,	/* the constant 16 */
-    IA64_OPND_GR0,	/* gr0 */
-    IA64_OPND_IP,	/* instruction pointer (ip) */
-    IA64_OPND_PR,	/* predicate register (pr) */
-    IA64_OPND_PR_ROT,	/* rotating predicate register (pr.rot) */
-    IA64_OPND_PSR,	/* processor status register (psr) */
-    IA64_OPND_PSR_L,	/* processor status register L (psr.l) */
-    IA64_OPND_PSR_UM,	/* processor status register UM (psr.um) */
-
-    /* register operands: */
-    IA64_OPND_AR3,	/* third application register # (bits 20-26) */
-    IA64_OPND_B1,	/* branch register # (bits 6-8) */
-    IA64_OPND_B2,	/* branch register # (bits 13-15) */
-    IA64_OPND_CR3,	/* third control register # (bits 20-26) */
-    IA64_OPND_F1,	/* first floating-point register # */
-    IA64_OPND_F2,	/* second floating-point register # */
-    IA64_OPND_F3,	/* third floating-point register # */
-    IA64_OPND_F4,	/* fourth floating-point register # */
-    IA64_OPND_P1,	/* first predicate # */
-    IA64_OPND_P2,	/* second predicate # */
-    IA64_OPND_R1,	/* first register # */
-    IA64_OPND_R2,	/* second register # */
-    IA64_OPND_R3,	/* third register # */
-    IA64_OPND_R3_2,	/* third register # (limited to gr0-gr3) */
-
-    /* memory operands: */
-    IA64_OPND_MR3,	/* memory at addr of third register # */
-
-    /* indirect operands: */
-    IA64_OPND_CPUID_R3,	/* cpuid[reg] */
-    IA64_OPND_DBR_R3,	/* dbr[reg] */
-    IA64_OPND_DTR_R3,	/* dtr[reg] */
-    IA64_OPND_ITR_R3,	/* itr[reg] */
-    IA64_OPND_IBR_R3,	/* ibr[reg] */
-    IA64_OPND_MSR_R3,	/* msr[reg] */
-    IA64_OPND_PKR_R3,	/* pkr[reg] */
-    IA64_OPND_PMC_R3,	/* pmc[reg] */
-    IA64_OPND_PMD_R3,	/* pmd[reg] */
-    IA64_OPND_RR_R3,	/* rr[reg] */
-
-    /* immediate operands: */
-    IA64_OPND_CCNT5,	/* 5-bit count (31 - bits 20-24) */
-    IA64_OPND_CNT2a,	/* 2-bit count (1 + bits 27-28) */
-    IA64_OPND_CNT2b,	/* 2-bit count (bits 27-28): 1, 2, 3 */
-    IA64_OPND_CNT2c,	/* 2-bit count (bits 30-31): 0, 7, 15, or 16 */
-    IA64_OPND_CNT5,	/* 5-bit count (bits 14-18) */
-    IA64_OPND_CNT6,	/* 6-bit count (bits 27-32) */
-    IA64_OPND_CPOS6a,	/* 6-bit count (63 - bits 20-25) */
-    IA64_OPND_CPOS6b,	/* 6-bit count (63 - bits 14-19) */
-    IA64_OPND_CPOS6c,	/* 6-bit count (63 - bits 31-36) */
-    IA64_OPND_IMM1,	/* signed 1-bit immediate (bit 36) */
-    IA64_OPND_IMMU2,	/* unsigned 2-bit immediate (bits 13-14) */
-    IA64_OPND_IMMU5b,	/* unsigned 5-bit immediate (32 + bits 14-18) */
-    IA64_OPND_IMMU7a,	/* unsigned 7-bit immediate (bits 13-19) */
-    IA64_OPND_IMMU7b,	/* unsigned 7-bit immediate (bits 20-26) */
-    IA64_OPND_SOF,	/* 8-bit stack frame size */
-    IA64_OPND_SOL,	/* 8-bit size of locals */
-    IA64_OPND_SOR,	/* 6-bit number of rotating registers (scaled by 8) */
-    IA64_OPND_IMM8,	/* signed 8-bit immediate (bits 13-19 & 36) */
-    IA64_OPND_IMM8U4,	/* cmp4*u signed 8-bit immediate (bits 13-19 & 36) */
-    IA64_OPND_IMM8M1,	/* signed 8-bit immediate -1 (bits 13-19 & 36) */
-    IA64_OPND_IMM8M1U4,	/* cmp4*u signed 8-bit immediate -1 (bits 13-19 & 36)*/
-    IA64_OPND_IMM8M1U8,	/* cmp*u signed 8-bit immediate -1 (bits 13-19 & 36) */
-    IA64_OPND_IMMU9,	/* unsigned 9-bit immediate (bits 33-34, 20-26) */
-    IA64_OPND_IMM9a,	/* signed 9-bit immediate (bits 6-12, 27, 36) */
-    IA64_OPND_IMM9b,	/* signed 9-bit immediate (bits 13-19, 27, 36) */
-    IA64_OPND_IMM14,	/* signed 14-bit immediate (bits 13-19, 27-32, 36) */
-    IA64_OPND_IMM17,	/* signed 17-bit immediate (2*bits 6-12, 24-31, 36) */
-    IA64_OPND_IMMU21,	/* unsigned 21-bit immediate (bits 6-25, 36) */
-    IA64_OPND_IMM22,	/* signed 22-bit immediate (bits 13-19, 22-36) */
-    IA64_OPND_IMMU24,	/* unsigned 24-bit immediate (bits 6-26, 31-32, 36) */
-    IA64_OPND_IMM44,	/* signed 44-bit immediate (2^16*bits 6-32, 36) */
-    IA64_OPND_IMMU62,	/* unsigned 62-bit immediate */
-    IA64_OPND_IMMU64,	/* unsigned 64-bit immediate (lotsa bits...) */
-    IA64_OPND_INC3,	/* signed 3-bit (bits 13-15): +/-1, 4, 8, 16 */
-    IA64_OPND_LEN4,	/* 4-bit count (bits 27-30 + 1) */
-    IA64_OPND_LEN6,	/* 6-bit count (bits 27-32 + 1) */
-    IA64_OPND_MBTYPE4,	/* 4-bit mux type (bits 20-23) */
-    IA64_OPND_MHTYPE8,	/* 8-bit mux type (bits 20-27) */
-    IA64_OPND_POS6,	/* 6-bit count (bits 14-19) */
-    IA64_OPND_TAG13,	/* signed 13-bit tag (ip + 16*bits 6-12, 33-34) */
-    IA64_OPND_TAG13b,	/* signed 13-bit tag (ip + 16*bits 24-32) */
-    IA64_OPND_TGT25,	/* signed 25-bit (ip + 16*bits 6-25, 36) */
-    IA64_OPND_TGT25b,	/* signed 25-bit (ip + 16*bits 6-12, 20-32, 36) */
-    IA64_OPND_TGT25c,	/* signed 25-bit (ip + 16*bits 13-32, 36) */
-    IA64_OPND_TGT64,    /* 64-bit (ip + 16*bits 13-32, 36, 2-40(L)) */
-    IA64_OPND_LDXMOV,	/* any symbol, generates R_IA64_LDXMOV.  */
-
-    IA64_OPND_COUNT	/* # of operand types (MUST BE LAST!) */
-  };
-
-enum ia64_dependency_mode
-{
-  IA64_DV_RAW,
-  IA64_DV_WAW,
-  IA64_DV_WAR,
-};
-
-enum ia64_dependency_semantics
-{
-  IA64_DVS_NONE,
-  IA64_DVS_IMPLIED,
-  IA64_DVS_IMPLIEDF,
-  IA64_DVS_DATA,
-  IA64_DVS_INSTR,
-  IA64_DVS_SPECIFIC,
-  IA64_DVS_STOP,
-  IA64_DVS_OTHER,
-};
-
-enum ia64_resource_specifier
-{
-  IA64_RS_ANY,
-  IA64_RS_AR_K,
-  IA64_RS_AR_UNAT,
-  IA64_RS_AR, /* 8-15, 20, 22-23, 31, 33-35, 37-39, 41-43, 45-47, 67-111 */
-  IA64_RS_ARb, /* 48-63, 112-127 */
-  IA64_RS_BR,
-  IA64_RS_CFM,
-  IA64_RS_CPUID,
-  IA64_RS_CR_IRR,
-  IA64_RS_CR_LRR,
-  IA64_RS_CR, /* 3-7,10-15,18,26-63,75-79,82-127 */
-  IA64_RS_DBR,
-  IA64_RS_FR,
-  IA64_RS_FRb,
-  IA64_RS_GR0,
-  IA64_RS_GR,
-  IA64_RS_IBR,
-  IA64_RS_INSERVICE, /* CR[EOI] or CR[IVR] */
-  IA64_RS_MSR,
-  IA64_RS_PKR,
-  IA64_RS_PMC,
-  IA64_RS_PMD,
-  IA64_RS_PR,  /* non-rotating, 1-15 */
-  IA64_RS_PRr, /* rotating, 16-62 */
-  IA64_RS_PR63,
-  IA64_RS_RR,
-
-  IA64_RS_ARX, /* ARs not in RS_AR or RS_ARb */
-  IA64_RS_CRX, /* CRs not in RS_CR */
-  IA64_RS_PSR, /* PSR bits */
-  IA64_RS_RSE, /* implementation-specific RSE resources */
-  IA64_RS_AR_FPSR,
-};
-
-enum ia64_rse_resource
-{
-  IA64_RSE_N_STACKED_PHYS,
-  IA64_RSE_BOF,
-  IA64_RSE_STORE_REG,
-  IA64_RSE_LOAD_REG,
-  IA64_RSE_BSPLOAD,
-  IA64_RSE_RNATBITINDEX,
-  IA64_RSE_CFLE,
-  IA64_RSE_NDIRTY,
-};
-
-/* Information about a given resource dependency */
-struct ia64_dependency
-{
-  /* Name of the resource */
-  const char *name;
-  /* Does this dependency need further specification? */
-  enum ia64_resource_specifier specifier;
-  /* Mode of dependency */
-  enum ia64_dependency_mode mode;
-  /* Dependency semantics */
-  enum ia64_dependency_semantics semantics;
-  /* Register index, if applicable (distinguishes AR, CR, and PSR deps) */
-#define REG_NONE (-1)
-  int regindex;
-  /* Special info on semantics */
-  const char *info;
-};
-
-/* Two arrays of indexes into the ia64_dependency table.
-   chks are dependencies to check for conflicts when an opcode is
-   encountered; regs are dependencies to register (mark as used) when an
-   opcode is used.  chks correspond to readers (RAW) or writers (WAW or
-   WAR) of a resource, while regs correspond to writers (RAW or WAW) and
-   readers (WAR) of a resource.  */
-struct ia64_opcode_dependency
-{
-  int nchks;
-  const unsigned short *chks;
-  int nregs;
-  const unsigned short *regs;
-};
-
-/* encode/extract the note/index for a dependency */
-#define RDEP(N,X) (((N)<<11)|(X))
-#define NOTE(X) (((X)>>11)&0x1F)
-#define DEP(X) ((X)&0x7FF)
-
-/* A template descriptor describes the execution units that are active
-   for each of the three slots.  It also specifies the location of
-   instruction group boundaries that may be present between two slots.  */
-struct ia64_templ_desc
-  {
-    int group_boundary;	/* 0=no boundary, 1=between slot 0 & 1, etc. */
-    enum ia64_unit exec_unit[3];
-    const char *name;
-  };
-
-/* The opcode table is an array of struct ia64_opcode.  */
-
-struct ia64_opcode
-  {
-    /* The opcode name.  */
-    const char *name;
-
-    /* The type of the instruction: */
-    enum ia64_insn_type type;
-
-    /* Number of output operands: */
-    int num_outputs;
-
-    /* The opcode itself.  Those bits which will be filled in with
-       operands are zeroes.  */
-    ia64_insn opcode;
-
-    /* The opcode mask.  This is used by the disassembler.  This is a
-       mask containing ones indicating those bits which must match the
-       opcode field, and zeroes indicating those bits which need not
-       match (and are presumably filled in by operands).  */
-    ia64_insn mask;
-
-    /* An array of operand codes.  Each code is an index into the
-       operand table.  They appear in the order which the operands must
-       appear in assembly code, and are terminated by a zero.  */
-    enum ia64_opnd operands[5];
-
-    /* One bit flags for the opcode.  These are primarily used to
-       indicate specific processors and environments support the
-       instructions.  The defined values are listed below. */
-    unsigned int flags;
-
-    /* Used by ia64_find_next_opcode (). */
-    short ent_index;
-
-    /* Opcode dependencies. */
-    const struct ia64_opcode_dependency *dependencies;
-  };
-
-/* Values defined for the flags field of a struct ia64_opcode.  */
-
-#define IA64_OPCODE_FIRST	(1<<0)	/* must be first in an insn group */
-#define IA64_OPCODE_X_IN_MLX	(1<<1)	/* insn is allowed in X slot of MLX */
-#define IA64_OPCODE_LAST	(1<<2)	/* must be last in an insn group */
-#define IA64_OPCODE_PRIV	(1<<3)	/* privileged instruct */
-#define IA64_OPCODE_SLOT2	(1<<4)	/* insn allowed in slot 2 only */
-#define IA64_OPCODE_NO_PRED	(1<<5)	/* insn cannot be predicated */
-#define IA64_OPCODE_PSEUDO	(1<<6)	/* insn is a pseudo-op */
-#define IA64_OPCODE_F2_EQ_F3	(1<<7)	/* constraint: F2 == F3 */
-#define IA64_OPCODE_LEN_EQ_64MCNT	(1<<8)	/* constraint: LEN == 64-CNT */
-#define IA64_OPCODE_MOD_RRBS    (1<<9)	/* modifies all rrbs in CFM */
-#define IA64_OPCODE_POSTINC	(1<<10)	/* postincrement MR3 operand */
-
-/* A macro to extract the major opcode from an instruction.  */
-#define IA64_OP(i)	(((i) >> 37) & 0xf)
-
-enum ia64_operand_class
-  {
-    IA64_OPND_CLASS_CST,	/* constant */
-    IA64_OPND_CLASS_REG,	/* register */
-    IA64_OPND_CLASS_IND,	/* indirect register */
-    IA64_OPND_CLASS_ABS,	/* absolute value */
-    IA64_OPND_CLASS_REL,	/* IP-relative value */
-  };
-
-/* The operands table is an array of struct ia64_operand.  */
-
-struct ia64_operand
-{
-  enum ia64_operand_class class;
-
-  /* Set VALUE as the operand bits for the operand of type SELF in the
-     instruction pointed to by CODE.  If an error occurs, *CODE is not
-     modified and the returned string describes the cause of the
-     error.  If no error occurs, NULL is returned.  */
-  const char *(*insert) (const struct ia64_operand *self, ia64_insn value,
-			 ia64_insn *code);
-
-  /* Extract the operand bits for an operand of type SELF from
-     instruction CODE store them in *VALUE.  If an error occurs, the
-     cause of the error is described by the string returned.  If no
-     error occurs, NULL is returned.  */
-  const char *(*extract) (const struct ia64_operand *self, ia64_insn code,
-			  ia64_insn *value);
-
-  /* A string whose meaning depends on the operand class.  */
-
-  const char *str;
-
-  struct bit_field
-    {
-      /* The number of bits in the operand.  */
-      int bits;
-
-      /* How far the operand is left shifted in the instruction.  */
-      int shift;
-    }
-  field[4];		/* no operand has more than this many bit-fields */
-
-  unsigned int flags;
-
-  const char *desc;	/* brief description */
-};
-
-/* Values defined for the flags field of a struct ia64_operand.  */
-
-/* Disassemble as signed decimal (instead of hex): */
-#define IA64_OPND_FLAG_DECIMAL_SIGNED	(1<<0)
-/* Disassemble as unsigned decimal (instead of hex): */
-#define IA64_OPND_FLAG_DECIMAL_UNSIGNED	(1<<1)
-
-#define NELEMS(a)	((int) (sizeof (a) / sizeof (a[0])))
-
-static const char*
-ins_rsvd (const struct ia64_operand *self ATTRIBUTE_UNUSED,
-	  ia64_insn value ATTRIBUTE_UNUSED, ia64_insn *code ATTRIBUTE_UNUSED)
-{
-  return "internal error---this shouldn't happen";
-}
-
-static const char*
-ext_rsvd (const struct ia64_operand *self ATTRIBUTE_UNUSED,
-	  ia64_insn code ATTRIBUTE_UNUSED, ia64_insn *valuep ATTRIBUTE_UNUSED)
-{
-  return "internal error---this shouldn't happen";
-}
-
-static const char*
-ins_const (const struct ia64_operand *self ATTRIBUTE_UNUSED,
-	   ia64_insn value ATTRIBUTE_UNUSED, ia64_insn *code ATTRIBUTE_UNUSED)
-{
-  return 0;
-}
-
-static const char*
-ext_const (const struct ia64_operand *self ATTRIBUTE_UNUSED,
-	   ia64_insn code ATTRIBUTE_UNUSED, ia64_insn *valuep ATTRIBUTE_UNUSED)
-{
-  return 0;
-}
-
-static const char*
-ins_reg (const struct ia64_operand *self, ia64_insn value, ia64_insn *code)
-{
-  if (value >= 1u << self->field[0].bits)
-    return "register number out of range";
-
-  *code |= value << self->field[0].shift;
-  return 0;
-}
-
-static const char*
-ext_reg (const struct ia64_operand *self, ia64_insn code, ia64_insn *valuep)
-{
-  *valuep = ((code >> self->field[0].shift)
-	     & ((1u << self->field[0].bits) - 1));
-  return 0;
-}
-
-static const char*
-ins_immu (const struct ia64_operand *self, ia64_insn value, ia64_insn *code)
-{
-  ia64_insn new = 0;
-  int i;
-
-  for (i = 0; i < NELEMS (self->field) && self->field[i].bits; ++i)
-    {
-      new |= ((value & ((((ia64_insn) 1) << self->field[i].bits) - 1))
-	      << self->field[i].shift);
-      value >>= self->field[i].bits;
-    }
-  if (value)
-    return "integer operand out of range";
-
-  *code |= new;
-  return 0;
-}
-
-static const char*
-ext_immu (const struct ia64_operand *self, ia64_insn code, ia64_insn *valuep)
-{
-  uint64_t value = 0;
-  int i, bits = 0, total = 0;
-
-  for (i = 0; i < NELEMS (self->field) && self->field[i].bits; ++i)
-    {
-      bits = self->field[i].bits;
-      value |= ((code >> self->field[i].shift)
-		& ((((uint64_t) 1) << bits) - 1)) << total;
-      total += bits;
-    }
-  *valuep = value;
-  return 0;
-}
-
-static const char*
-ins_immu5b (const struct ia64_operand *self, ia64_insn value,
-	    ia64_insn *code)
-{
-  if (value < 32 || value > 63)
-    return "value must be between 32 and 63";
-  return ins_immu (self, value - 32, code);
-}
-
-static const char*
-ext_immu5b (const struct ia64_operand *self, ia64_insn code,
-	    ia64_insn *valuep)
-{
-  const char *result;
-
-  result = ext_immu (self, code, valuep);
-  if (result)
-    return result;
-
-  *valuep = *valuep + 32;
-  return 0;
-}
-
-static const char*
-ins_immus8 (const struct ia64_operand *self, ia64_insn value, ia64_insn *code)
-{
-  if (value & 0x7)
-    return "value not an integer multiple of 8";
-  return ins_immu (self, value >> 3, code);
-}
-
-static const char*
-ext_immus8 (const struct ia64_operand *self, ia64_insn code, ia64_insn *valuep)
-{
-  const char *result;
-
-  result = ext_immu (self, code, valuep);
-  if (result)
-    return result;
-
-  *valuep = *valuep << 3;
-  return 0;
-}
-
-static const char*
-ins_imms_scaled (const struct ia64_operand *self, ia64_insn value,
-		 ia64_insn *code, int scale)
-{
-  int64_t svalue = value, sign_bit = 0;
-  ia64_insn new = 0;
-  int i;
-
-  svalue >>= scale;
-
-  for (i = 0; i < NELEMS (self->field) && self->field[i].bits; ++i)
-    {
-      new |= ((svalue & ((((ia64_insn) 1) << self->field[i].bits) - 1))
-	      << self->field[i].shift);
-      sign_bit = (svalue >> (self->field[i].bits - 1)) & 1;
-      svalue >>= self->field[i].bits;
-    }
-  if ((!sign_bit && svalue != 0) || (sign_bit && svalue != -1))
-    return "integer operand out of range";
-
-  *code |= new;
-  return 0;
-}
-
-static const char*
-ext_imms_scaled (const struct ia64_operand *self, ia64_insn code,
-		 ia64_insn *valuep, int scale)
-{
-  int i, bits = 0, total = 0;
-  int64_t val = 0, sign;
-
-  for (i = 0; i < NELEMS (self->field) && self->field[i].bits; ++i)
-    {
-      bits = self->field[i].bits;
-      val |= ((code >> self->field[i].shift)
-	      & ((((uint64_t) 1) << bits) - 1)) << total;
-      total += bits;
-    }
-  /* sign extend: */
-  sign = (int64_t) 1 << (total - 1);
-  val = (val ^ sign) - sign;
-
-  *valuep = (val << scale);
-  return 0;
-}
-
-static const char*
-ins_imms (const struct ia64_operand *self, ia64_insn value, ia64_insn *code)
-{
-  return ins_imms_scaled (self, value, code, 0);
-}
-
-static const char*
-ins_immsu4 (const struct ia64_operand *self, ia64_insn value, ia64_insn *code)
-{
-  value = ((value & 0xffffffff) ^ 0x80000000) - 0x80000000;
-
-  return ins_imms_scaled (self, value, code, 0);
-}
-
-static const char*
-ext_imms (const struct ia64_operand *self, ia64_insn code, ia64_insn *valuep)
-{
-  return ext_imms_scaled (self, code, valuep, 0);
-}
-
-static const char*
-ins_immsm1 (const struct ia64_operand *self, ia64_insn value, ia64_insn *code)
-{
-  --value;
-  return ins_imms_scaled (self, value, code, 0);
-}
-
-static const char*
-ins_immsm1u4 (const struct ia64_operand *self, ia64_insn value,
-	      ia64_insn *code)
-{
-  value = ((value & 0xffffffff) ^ 0x80000000) - 0x80000000;
-
-  --value;
-  return ins_imms_scaled (self, value, code, 0);
-}
-
-static const char*
-ext_immsm1 (const struct ia64_operand *self, ia64_insn code, ia64_insn *valuep)
-{
-  const char *res = ext_imms_scaled (self, code, valuep, 0);
-
-  ++*valuep;
-  return res;
-}
-
-static const char*
-ins_imms1 (const struct ia64_operand *self, ia64_insn value, ia64_insn *code)
-{
-  return ins_imms_scaled (self, value, code, 1);
-}
-
-static const char*
-ext_imms1 (const struct ia64_operand *self, ia64_insn code, ia64_insn *valuep)
-{
-  return ext_imms_scaled (self, code, valuep, 1);
-}
-
-static const char*
-ins_imms4 (const struct ia64_operand *self, ia64_insn value, ia64_insn *code)
-{
-  return ins_imms_scaled (self, value, code, 4);
-}
-
-static const char*
-ext_imms4 (const struct ia64_operand *self, ia64_insn code, ia64_insn *valuep)
-{
-  return ext_imms_scaled (self, code, valuep, 4);
-}
-
-static const char*
-ins_imms16 (const struct ia64_operand *self, ia64_insn value, ia64_insn *code)
-{
-  return ins_imms_scaled (self, value, code, 16);
-}
-
-static const char*
-ext_imms16 (const struct ia64_operand *self, ia64_insn code, ia64_insn *valuep)
-{
-  return ext_imms_scaled (self, code, valuep, 16);
-}
-
-static const char*
-ins_cimmu (const struct ia64_operand *self, ia64_insn value, ia64_insn *code)
-{
-  ia64_insn mask = (((ia64_insn) 1) << self->field[0].bits) - 1;
-  return ins_immu (self, value ^ mask, code);
-}
-
-static const char*
-ext_cimmu (const struct ia64_operand *self, ia64_insn code, ia64_insn *valuep)
-{
-  const char *result;
-  ia64_insn mask;
-
-  mask = (((ia64_insn) 1) << self->field[0].bits) - 1;
-  result = ext_immu (self, code, valuep);
-  if (!result)
-    {
-      mask = (((ia64_insn) 1) << self->field[0].bits) - 1;
-      *valuep ^= mask;
-    }
-  return result;
-}
-
-static const char*
-ins_cnt (const struct ia64_operand *self, ia64_insn value, ia64_insn *code)
-{
-  --value;
-  if (value >= ((uint64_t) 1) << self->field[0].bits)
-    return "count out of range";
-
-  *code |= value << self->field[0].shift;
-  return 0;
-}
-
-static const char*
-ext_cnt (const struct ia64_operand *self, ia64_insn code, ia64_insn *valuep)
-{
-  *valuep = ((code >> self->field[0].shift)
-	     & ((((uint64_t) 1) << self->field[0].bits) - 1)) + 1;
-  return 0;
-}
-
-static const char*
-ins_cnt2b (const struct ia64_operand *self, ia64_insn value, ia64_insn *code)
-{
-  --value;
-
-  if (value > 2)
-    return "count must be in range 1..3";
-
-  *code |= value << self->field[0].shift;
-  return 0;
-}
-
-static const char*
-ext_cnt2b (const struct ia64_operand *self, ia64_insn code, ia64_insn *valuep)
-{
-  *valuep = ((code >> self->field[0].shift) & 0x3) + 1;
-  return 0;
-}
-
-static const char*
-ins_cnt2c (const struct ia64_operand *self, ia64_insn value, ia64_insn *code)
-{
-  switch (value)
-    {
-    case 0:	value = 0; break;
-    case 7:	value = 1; break;
-    case 15:	value = 2; break;
-    case 16:	value = 3; break;
-    default:	return "count must be 0, 7, 15, or 16";
-    }
-  *code |= value << self->field[0].shift;
-  return 0;
-}
-
-static const char*
-ext_cnt2c (const struct ia64_operand *self, ia64_insn code, ia64_insn *valuep)
-{
-  ia64_insn value;
-
-  value = (code >> self->field[0].shift) & 0x3;
-  switch (value)
-    {
-    case 0: value =  0; break;
-    case 1: value =  7; break;
-    case 2: value = 15; break;
-    case 3: value = 16; break;
-    }
-  *valuep = value;
-  return 0;
-}
-
-static const char*
-ins_inc3 (const struct ia64_operand *self, ia64_insn value, ia64_insn *code)
-{
-  int64_t val = value;
-  uint64_t sign = 0;
-
-  if (val < 0)
-    {
-      sign = 0x4;
-      value = -value;
-    }
-  switch (value)
-    {
-    case  1:	value = 3; break;
-    case  4:	value = 2; break;
-    case  8:	value = 1; break;
-    case 16:	value = 0; break;
-    default:	return "count must be +/- 1, 4, 8, or 16";
-    }
-  *code |= (sign | value) << self->field[0].shift;
-  return 0;
-}
-
-static const char*
-ext_inc3 (const struct ia64_operand *self, ia64_insn code, ia64_insn *valuep)
-{
-  int64_t val;
-  int negate;
-
-  val = (code >> self->field[0].shift) & 0x7;
-  negate = val & 0x4;
-  switch (val & 0x3)
-    {
-    case 0: val = 16; break;
-    case 1: val =  8; break;
-    case 2: val =  4; break;
-    case 3: val =  1; break;
-    }
-  if (negate)
-    val = -val;
-
-  *valuep = val;
-  return 0;
-}
-
-/* glib.h defines ABS so we must undefine it to avoid a clash */
-#undef ABS
-
-#define CST	IA64_OPND_CLASS_CST
-#define REG	IA64_OPND_CLASS_REG
-#define IND	IA64_OPND_CLASS_IND
-#define ABS	IA64_OPND_CLASS_ABS
-#define REL	IA64_OPND_CLASS_REL
-
-#define SDEC	IA64_OPND_FLAG_DECIMAL_SIGNED
-#define UDEC	IA64_OPND_FLAG_DECIMAL_UNSIGNED
-
-const struct ia64_operand elf64_ia64_operands[IA64_OPND_COUNT] =
-  {
-    /* constants: */
-    { CST, ins_const, ext_const, "NIL",		{{ 0, 0}}, 0, "<none>" },
-    { CST, ins_const, ext_const, "ar.csd",	{{ 0, 0}}, 0, "ar.csd" },
-    { CST, ins_const, ext_const, "ar.ccv",	{{ 0, 0}}, 0, "ar.ccv" },
-    { CST, ins_const, ext_const, "ar.pfs",	{{ 0, 0}}, 0, "ar.pfs" },
-    { CST, ins_const, ext_const, "1",		{{ 0, 0}}, 0, "1" },
-    { CST, ins_const, ext_const, "8",		{{ 0, 0}}, 0, "8" },
-    { CST, ins_const, ext_const, "16",		{{ 0, 0}}, 0, "16" },
-    { CST, ins_const, ext_const, "r0",		{{ 0, 0}}, 0, "r0" },
-    { CST, ins_const, ext_const, "ip",		{{ 0, 0}}, 0, "ip" },
-    { CST, ins_const, ext_const, "pr",		{{ 0, 0}}, 0, "pr" },
-    { CST, ins_const, ext_const, "pr.rot",	{{ 0, 0}}, 0, "pr.rot" },
-    { CST, ins_const, ext_const, "psr",		{{ 0, 0}}, 0, "psr" },
-    { CST, ins_const, ext_const, "psr.l",	{{ 0, 0}}, 0, "psr.l" },
-    { CST, ins_const, ext_const, "psr.um",	{{ 0, 0}}, 0, "psr.um" },
-
-    /* register operands: */
-    { REG, ins_reg,   ext_reg,	"ar", {{ 7, 20}}, 0,		/* AR3 */
-      "an application register" },
-    { REG, ins_reg,   ext_reg,	 "b", {{ 3,  6}}, 0,		/* B1 */
-      "a branch register" },
-    { REG, ins_reg,   ext_reg,	 "b", {{ 3, 13}}, 0,		/* B2 */
-      "a branch register"},
-    { REG, ins_reg,   ext_reg,	"cr", {{ 7, 20}}, 0,		/* CR */
-      "a control register"},
-    { REG, ins_reg,   ext_reg,	 "f", {{ 7,  6}}, 0,		/* F1 */
-      "a floating-point register" },
-    { REG, ins_reg,   ext_reg,	 "f", {{ 7, 13}}, 0,		/* F2 */
-      "a floating-point register" },
-    { REG, ins_reg,   ext_reg,	 "f", {{ 7, 20}}, 0,		/* F3 */
-      "a floating-point register" },
-    { REG, ins_reg,   ext_reg,	 "f", {{ 7, 27}}, 0,		/* F4 */
-      "a floating-point register" },
-    { REG, ins_reg,   ext_reg,	 "p", {{ 6,  6}}, 0,		/* P1 */
-      "a predicate register" },
-    { REG, ins_reg,   ext_reg,	 "p", {{ 6, 27}}, 0,		/* P2 */
-      "a predicate register" },
-    { REG, ins_reg,   ext_reg,	 "r", {{ 7,  6}}, 0,		/* R1 */
-      "a general register" },
-    { REG, ins_reg,   ext_reg,	 "r", {{ 7, 13}}, 0,		/* R2 */
-      "a general register" },
-    { REG, ins_reg,   ext_reg,	 "r", {{ 7, 20}}, 0,		/* R3 */
-      "a general register" },
-    { REG, ins_reg,   ext_reg,	 "r", {{ 2, 20}}, 0,		/* R3_2 */
-      "a general register r0-r3" },
-
-    /* memory operands: */
-    { IND, ins_reg,   ext_reg,	"",      {{7, 20}}, 0,		/* MR3 */
-      "a memory address" },
-
-    /* indirect operands: */
-    { IND, ins_reg,   ext_reg,	"cpuid", {{7, 20}}, 0,		/* CPUID_R3 */
-      "a cpuid register" },
-    { IND, ins_reg,   ext_reg,	"dbr",   {{7, 20}}, 0,		/* DBR_R3 */
-      "a dbr register" },
-    { IND, ins_reg,   ext_reg,	"dtr",   {{7, 20}}, 0,		/* DTR_R3 */
-      "a dtr register" },
-    { IND, ins_reg,   ext_reg,	"itr",   {{7, 20}}, 0,		/* ITR_R3 */
-      "an itr register" },
-    { IND, ins_reg,   ext_reg,	"ibr",   {{7, 20}}, 0,		/* IBR_R3 */
-      "an ibr register" },
-    { IND, ins_reg,   ext_reg,	"msr",   {{7, 20}}, 0,		/* MSR_R3 */
-      "an msr register" },
-    { IND, ins_reg,   ext_reg,	"pkr",   {{7, 20}}, 0,		/* PKR_R3 */
-      "a pkr register" },
-    { IND, ins_reg,   ext_reg,	"pmc",   {{7, 20}}, 0,		/* PMC_R3 */
-      "a pmc register" },
-    { IND, ins_reg,   ext_reg,	"pmd",   {{7, 20}}, 0,		/* PMD_R3 */
-      "a pmd register" },
-    { IND, ins_reg,   ext_reg,	"rr",    {{7, 20}}, 0,		/* RR_R3 */
-      "an rr register" },
-
-    /* immediate operands: */
-    { ABS, ins_cimmu, ext_cimmu, 0, {{ 5, 20 }}, UDEC,		/* CCNT5 */
-      "a 5-bit count (0-31)" },
-    { ABS, ins_cnt,   ext_cnt,   0, {{ 2, 27 }}, UDEC,		/* CNT2a */
-      "a 2-bit count (1-4)" },
-    { ABS, ins_cnt2b, ext_cnt2b, 0, {{ 2, 27 }}, UDEC,		/* CNT2b */
-      "a 2-bit count (1-3)" },
-    { ABS, ins_cnt2c, ext_cnt2c, 0, {{ 2, 30 }}, UDEC,		/* CNT2c */
-      "a count (0, 7, 15, or 16)" },
-    { ABS, ins_immu,  ext_immu,  0, {{ 5, 14}}, UDEC,		/* CNT5 */
-      "a 5-bit count (0-31)" },
-    { ABS, ins_immu,  ext_immu,  0, {{ 6, 27}}, UDEC,		/* CNT6 */
-      "a 6-bit count (0-63)" },
-    { ABS, ins_cimmu, ext_cimmu, 0, {{ 6, 20}}, UDEC,		/* CPOS6a */
-      "a 6-bit bit pos (0-63)" },
-    { ABS, ins_cimmu, ext_cimmu, 0, {{ 6, 14}}, UDEC,		/* CPOS6b */
-      "a 6-bit bit pos (0-63)" },
-    { ABS, ins_cimmu, ext_cimmu, 0, {{ 6, 31}}, UDEC,		/* CPOS6c */
-      "a 6-bit bit pos (0-63)" },
-    { ABS, ins_imms,  ext_imms,  0, {{ 1, 36}}, SDEC,		/* IMM1 */
-      "a 1-bit integer (-1, 0)" },
-    { ABS, ins_immu,  ext_immu,  0, {{ 2, 13}}, UDEC,		/* IMMU2 */
-      "a 2-bit unsigned (0-3)" },
-    { ABS, ins_immu5b,  ext_immu5b,  0, {{ 5, 14}}, UDEC,	/* IMMU5b */
-      "a 5-bit unsigned (32 + (0-31))" },
-    { ABS, ins_immu,  ext_immu,  0, {{ 7, 13}}, 0,		/* IMMU7a */
-      "a 7-bit unsigned (0-127)" },
-    { ABS, ins_immu,  ext_immu,  0, {{ 7, 20}}, 0,		/* IMMU7b */
-      "a 7-bit unsigned (0-127)" },
-    { ABS, ins_immu,  ext_immu,  0, {{ 7, 13}}, UDEC,		/* SOF */
-      "a frame size (register count)" },
-    { ABS, ins_immu,  ext_immu,  0, {{ 7, 20}}, UDEC,		/* SOL */
-      "a local register count" },
-    { ABS, ins_immus8,ext_immus8,0, {{ 4, 27}}, UDEC,		/* SOR */
-      "a rotating register count (integer multiple of 8)" },
-    { ABS, ins_imms,  ext_imms,  0,				/* IMM8 */
-      {{ 7, 13}, { 1, 36}}, SDEC,
-      "an 8-bit integer (-128-127)" },
-    { ABS, ins_immsu4,  ext_imms,  0,				/* IMM8U4 */
-      {{ 7, 13}, { 1, 36}}, SDEC,
-      "an 8-bit signed integer for 32-bit unsigned compare (-128-127)" },
-    { ABS, ins_immsm1,  ext_immsm1,  0,				/* IMM8M1 */
-      {{ 7, 13}, { 1, 36}}, SDEC,
-      "an 8-bit integer (-127-128)" },
-    { ABS, ins_immsm1u4,  ext_immsm1,  0,			/* IMM8M1U4 */
-      {{ 7, 13}, { 1, 36}}, SDEC,
-      "an 8-bit integer for 32-bit unsigned compare (-127-(-1),1-128,0x100000000)" },
-    { ABS, ins_immsm1,  ext_immsm1,  0,				/* IMM8M1U8 */
-      {{ 7, 13}, { 1, 36}}, SDEC,
-      "an 8-bit integer for 64-bit unsigned compare (-127-(-1),1-128,0x10000000000000000)" },
-    { ABS, ins_immu,  ext_immu,  0, {{ 2, 33}, { 7, 20}}, 0,	/* IMMU9 */
-      "a 9-bit unsigned (0-511)" },
-    { ABS, ins_imms,  ext_imms,  0,				/* IMM9a */
-      {{ 7,  6}, { 1, 27}, { 1, 36}}, SDEC,
-      "a 9-bit integer (-256-255)" },
-    { ABS, ins_imms,  ext_imms, 0,				/* IMM9b */
-      {{ 7, 13}, { 1, 27}, { 1, 36}}, SDEC,
-      "a 9-bit integer (-256-255)" },
-    { ABS, ins_imms,  ext_imms, 0,				/* IMM14 */
-      {{ 7, 13}, { 6, 27}, { 1, 36}}, SDEC,
-      "a 14-bit integer (-8192-8191)" },
-    { ABS, ins_imms1, ext_imms1, 0,				/* IMM17 */
-      {{ 7,  6}, { 8, 24}, { 1, 36}}, 0,
-      "a 17-bit integer (-65536-65535)" },
-    { ABS, ins_immu,  ext_immu,  0, {{20,  6}, { 1, 36}}, 0,	/* IMMU21 */
-      "a 21-bit unsigned" },
-    { ABS, ins_imms,  ext_imms,  0,				/* IMM22 */
-      {{ 7, 13}, { 9, 27}, { 5, 22}, { 1, 36}}, SDEC,
-      "a 22-bit signed integer" },
-    { ABS, ins_immu,  ext_immu,  0,				/* IMMU24 */
-      {{21,  6}, { 2, 31}, { 1, 36}}, 0,
-      "a 24-bit unsigned" },
-    { ABS, ins_imms16,ext_imms16,0, {{27,  6}, { 1, 36}}, 0,	/* IMM44 */
-      "a 44-bit unsigned (least 16 bits ignored/zeroes)" },
-    { ABS, ins_rsvd,  ext_rsvd,	0, {{0,  0}}, 0,		/* IMMU62 */
-      "a 62-bit unsigned" },
-    { ABS, ins_rsvd,  ext_rsvd,	0, {{0,  0}}, 0,		/* IMMU64 */
-      "a 64-bit unsigned" },
-    { ABS, ins_inc3,  ext_inc3,  0, {{ 3, 13}}, SDEC,		/* INC3 */
-      "an increment (+/- 1, 4, 8, or 16)" },
-    { ABS, ins_cnt,   ext_cnt,   0, {{ 4, 27}}, UDEC,		/* LEN4 */
-      "a 4-bit length (1-16)" },
-    { ABS, ins_cnt,   ext_cnt,   0, {{ 6, 27}}, UDEC,		/* LEN6 */
-      "a 6-bit length (1-64)" },
-    { ABS, ins_immu,  ext_immu,  0, {{ 4, 20}},	0,		/* MBTYPE4 */
-      "a mix type (@rev, @mix, @shuf, @alt, or @brcst)" },
-    { ABS, ins_immu,  ext_immu,  0, {{ 8, 20}},	0,		/* MBTYPE8 */
-      "an 8-bit mix type" },
-    { ABS, ins_immu,  ext_immu,  0, {{ 6, 14}}, UDEC,		/* POS6 */
-      "a 6-bit bit pos (0-63)" },
-    { REL, ins_imms4, ext_imms4, 0, {{ 7,  6}, { 2, 33}}, 0,	/* TAG13 */
-      "a branch tag" },
-    { REL, ins_imms4, ext_imms4, 0, {{ 9, 24}}, 0,		/* TAG13b */
-      "a branch tag" },
-    { REL, ins_imms4, ext_imms4, 0, {{20,  6}, { 1, 36}}, 0,	/* TGT25 */
-      "a branch target" },
-    { REL, ins_imms4, ext_imms4, 0,				/* TGT25b */
-      {{ 7,  6}, {13, 20}, { 1, 36}}, 0,
-      "a branch target" },
-    { REL, ins_imms4, ext_imms4, 0, {{20, 13}, { 1, 36}}, 0,	/* TGT25c */
-      "a branch target" },
-    { REL, ins_rsvd, ext_rsvd, 0, {{0, 0}}, 0,                  /* TGT64  */
-      "a branch target" },
-
-    { ABS, ins_const, ext_const, 0, {{0, 0}}, 0,		/* LDXMOV */
-      "ldxmov target" },
-  };
-
-
-/* ia64-asmtab.h -- Header for compacted IA-64 opcode tables.
-   Copyright 1999, 2000 Free Software Foundation, Inc.
-   Contributed by Bob Manson of Cygnus Support <manson@cygnus.com>
-
-   This file is part of GDB, GAS, and the GNU binutils.
-
-   GDB, GAS, and the GNU binutils are free software; you can redistribute
-   them and/or modify them under the terms of the GNU General Public
-   License as published by the Free Software Foundation; either version
-   2, or (at your option) any later version.
-
-   GDB, GAS, and the GNU binutils are distributed in the hope that they
-   will be useful, but WITHOUT ANY WARRANTY; without even the implied
-   warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See
-   the GNU General Public License for more details.
-
-   You should have received a copy of the GNU General Public License
-   along with this file; see the file COPYING.  If not, see
-   <http://www.gnu.org/licenses/>. */
-
-/* The primary opcode table is made up of the following: */
-struct ia64_main_table
-{
-  /* The entry in the string table that corresponds to the name of this
-     opcode. */
-  unsigned short name_index;
-
-  /* The type of opcode; corresponds to the TYPE field in
-     struct ia64_opcode. */
-  unsigned char opcode_type;
-
-  /* The number of outputs for this opcode. */
-  unsigned char num_outputs;
-
-  /* The base insn value for this opcode.  It may be modified by completers. */
-  ia64_insn opcode;
-
-  /* The mask of valid bits in OPCODE. Zeros indicate operand fields. */
-  ia64_insn mask;
-
-  /* The operands of this instruction.  Corresponds to the OPERANDS field
-     in struct ia64_opcode. */
-  unsigned char operands[5];
-
-  /* The flags for this instruction.  Corresponds to the FLAGS field in
-     struct ia64_opcode. */
-  short flags;
-
-  /* The tree of completers for this instruction; this is an offset into
-     completer_table. */
-  short completers;
-};
-
-/* Each instruction has a set of possible "completers", or additional
-   suffixes that can alter the instruction's behavior, and which has
-   potentially different dependencies.
-
-   The completer entries modify certain bits in the instruction opcode.
-   Which bits are to be modified are marked by the BITS, MASK and
-   OFFSET fields.  The completer entry may also note dependencies for the
-   opcode.
-
-   These completers are arranged in a DAG; the pointers are indexes
-   into the completer_table array.  The completer DAG is searched by
-   find_completer () and ia64_find_matching_opcode ().
-
-   Note that each completer needs to be applied in turn, so that if we
-   have the instruction
-	cmp.lt.unc
-   the completer entries for both "lt" and "unc" would need to be applied
-   to the opcode's value.
-
-   Some instructions do not require any completers; these contain an
-   empty completer entry.  Instructions that require a completer do
-   not contain an empty entry.
-
-   Terminal completers (those completers that validly complete an
-   instruction) are marked by having the TERMINAL_COMPLETER flag set.
-
-   Only dependencies listed in the terminal completer for an opcode are
-   considered to apply to that opcode instance. */
-
-struct ia64_completer_table
-{
-  /* The bit value that this completer sets. */
-  unsigned int bits;
-
-  /* And its mask. 1s are bits that are to be modified in the
-     instruction. */
-  unsigned int mask;
-
-  /* The entry in the string table that corresponds to the name of this
-     completer. */
-  unsigned short name_index;
-
-  /* An alternative completer, or -1 if this is the end of the chain. */
-  short alternative;
-
-  /* A pointer to the DAG of completers that can potentially follow
-     this one, or -1. */
-  short subentries;
-
-  /* The bit offset in the instruction where BITS and MASK should be
-     applied. */
-  unsigned char offset : 7;
-
-  unsigned char terminal_completer : 1;
-
-  /* Index into the dependency list table */
-  short dependencies;
-};
-
-/* This contains sufficient information for the disassembler to resolve
-   the complete name of the original instruction.  */
-struct ia64_dis_names
-{
-  /* COMPLETER_INDEX represents the tree of completers that make up
-     the instruction.  The LSB represents the top of the tree for the
-     specified instruction.
-
-     A 0 bit indicates to go to the next alternate completer via the
-     alternative field; a 1 bit indicates that the current completer
-     is part of the instruction, and to go down the subentries index.
-     We know we've reached the final completer when we run out of 1
-     bits.
-
-     There is always at least one 1 bit. */
-  unsigned int completer_index : 20;
-
-  /* The index in the main_table[] array for the instruction. */
-  unsigned short insn_index : 11;
-
-  /* If set, the next entry in this table is an alternate possibility
-     for this instruction encoding.  Which one to use is determined by
-     the instruction type and other factors (see opcode_verify ()).  */
-  unsigned int next_flag : 1;
-
-  /* The disassembly priority of this entry among instructions. */
-  unsigned short priority;
-};
-
-static const char * const ia64_strings[] = {
-  "", "0", "1", "a", "acq", "add", "addl", "addp4", "adds", "alloc", "and",
-  "andcm", "b", "bias", "br", "break", "brl", "brp", "bsw", "c", "call",
-  "cexit", "chk", "cloop", "clr", "clrrrb", "cmp", "cmp4", "cmp8xchg16",
-  "cmpxchg1", "cmpxchg2", "cmpxchg4", "cmpxchg8", "cond", "cover", "ctop",
-  "czx1", "czx2", "d", "dep", "dpnt", "dptk", "e", "epc", "eq", "excl",
-  "exit", "exp", "extr", "f", "fabs", "fadd", "famax", "famin", "fand",
-  "fandcm", "fault", "fc", "fchkf", "fclass", "fclrf", "fcmp", "fcvt",
-  "fetchadd4", "fetchadd8", "few", "fill", "flushrs", "fma", "fmax",
-  "fmerge", "fmin", "fmix", "fmpy", "fms", "fneg", "fnegabs", "fnma",
-  "fnmpy", "fnorm", "for", "fpabs", "fpack", "fpamax", "fpamin", "fpcmp",
-  "fpcvt", "fpma", "fpmax", "fpmerge", "fpmin", "fpmpy", "fpms", "fpneg",
-  "fpnegabs", "fpnma", "fpnmpy", "fprcpa", "fprsqrta", "frcpa", "frsqrta",
-  "fselect", "fsetc", "fsub", "fswap", "fsxt", "fwb", "fx", "fxor", "fxu",
-  "g", "ga", "ge", "getf", "geu", "gt", "gtu", "h", "hint", "hu", "i", "ia",
-  "imp", "invala", "itc", "itr", "l", "ld1", "ld16", "ld2", "ld4", "ld8",
-  "ldf", "ldf8", "ldfd", "ldfe", "ldfp8", "ldfpd", "ldfps", "ldfs", "le",
-  "leu", "lfetch", "loadrs", "loop", "lr", "lt", "ltu", "lu", "m", "many",
-  "mf", "mix1", "mix2", "mix4", "mov", "movl", "mux1", "mux2", "nc", "ne",
-  "neq", "nge", "ngt", "nl", "nle", "nlt", "nm", "nop", "nr", "ns", "nt1",
-  "nt2", "nta", "nz", "or", "orcm", "ord", "pack2", "pack4", "padd1",
-  "padd2", "padd4", "pavg1", "pavg2", "pavgsub1", "pavgsub2", "pcmp1",
-  "pcmp2", "pcmp4", "pmax1", "pmax2", "pmin1", "pmin2", "pmpy2", "pmpyshr2",
-  "popcnt", "pr", "probe", "psad1", "pshl2", "pshl4", "pshladd2", "pshr2",
-  "pshr4", "pshradd2", "psub1", "psub2", "psub4", "ptc", "ptr", "r", "raz",
-  "rel", "ret", "rfi", "rsm", "rum", "rw", "s", "s0", "s1", "s2", "s3",
-  "sa", "se", "setf", "shl", "shladd", "shladdp4", "shr", "shrp", "sig",
-  "spill", "spnt", "sptk", "srlz", "ssm", "sss", "st1", "st16", "st2",
-  "st4", "st8", "stf", "stf8", "stfd", "stfe", "stfs", "sub", "sum", "sxt1",
-  "sxt2", "sxt4", "sync", "tak", "tbit", "tf", "thash", "tnat", "tpa",
-  "trunc", "ttag", "u", "unc", "unord", "unpack1", "unpack2", "unpack4",
-  "uss", "uus", "uuu", "vmsw", "w", "wexit", "wtop", "x", "xchg1", "xchg2",
-  "xchg4", "xchg8", "xf", "xma", "xmpy", "xor", "xuf", "z", "zxt1", "zxt2",
-  "zxt4",
-};
-
-static const struct ia64_dependency
-dependencies[] = {
-  { "ALAT", 0, 0, 0, -1, NULL, },
-  { "AR[BSP]", 26, 0, 2, 17, NULL, },
-  { "AR[BSPSTORE]", 26, 0, 2, 18, NULL, },
-  { "AR[CCV]", 26, 0, 2, 32, NULL, },
-  { "AR[CFLG]", 26, 0, 2, 27, NULL, },
-  { "AR[CSD]", 26, 0, 2, 25, NULL, },
-  { "AR[EC]", 26, 0, 2, 66, NULL, },
-  { "AR[EFLAG]", 26, 0, 2, 24, NULL, },
-  { "AR[FCR]", 26, 0, 2, 21, NULL, },
-  { "AR[FDR]", 26, 0, 2, 30, NULL, },
-  { "AR[FIR]", 26, 0, 2, 29, NULL, },
-  { "AR[FPSR].sf0.controls", 30, 0, 2, -1, NULL, },
-  { "AR[FPSR].sf1.controls", 30, 0, 2, -1, NULL, },
-  { "AR[FPSR].sf2.controls", 30, 0, 2, -1, NULL, },
-  { "AR[FPSR].sf3.controls", 30, 0, 2, -1, NULL, },
-  { "AR[FPSR].sf0.flags", 30, 0, 2, -1, NULL, },
-  { "AR[FPSR].sf1.flags", 30, 0, 2, -1, NULL, },
-  { "AR[FPSR].sf2.flags", 30, 0, 2, -1, NULL, },
-  { "AR[FPSR].sf3.flags", 30, 0, 2, -1, NULL, },
-  { "AR[FPSR].traps", 30, 0, 2, -1, NULL, },
-  { "AR[FPSR].rv", 30, 0, 2, -1, NULL, },
-  { "AR[FSR]", 26, 0, 2, 28, NULL, },
-  { "AR[ITC]", 26, 0, 2, 44, NULL, },
-  { "AR[K%], % in 0 - 7", 1, 0, 2, -1, NULL, },
-  { "AR[LC]", 26, 0, 2, 65, NULL, },
-  { "AR[PFS]", 26, 0, 2, 64, NULL, },
-  { "AR[PFS]", 26, 0, 2, 64, NULL, },
-  { "AR[PFS]", 26, 0, 0, 64, NULL, },
-  { "AR[RNAT]", 26, 0, 2, 19, NULL, },
-  { "AR[RSC]", 26, 0, 2, 16, NULL, },
-  { "AR[SSD]", 26, 0, 2, 26, NULL, },
-  { "AR[UNAT]{%}, % in 0 - 63", 2, 0, 2, -1, NULL, },
-  { "AR%, % in 8-15, 20, 22-23, 31, 33-35, 37-39, 41-43, 45-47, 67-111", 3, 0, 0, -1, NULL, },
-  { "AR%, % in 48-63, 112-127", 4, 0, 2, -1, NULL, },
-  { "BR%, % in 0 - 7", 5, 0, 2, -1, NULL, },
-  { "BR%, % in 0 - 7", 5, 0, 0, -1, NULL, },
-  { "BR%, % in 0 - 7", 5, 0, 2, -1, NULL, },
-  { "CFM", 6, 0, 2, -1, NULL, },
-  { "CFM", 6, 0, 2, -1, NULL, },
-  { "CFM", 6, 0, 2, -1, NULL, },
-  { "CFM", 6, 0, 2, -1, NULL, },
-  { "CFM", 6, 0, 0, -1, NULL, },
-  { "CPUID#", 7, 0, 5, -1, NULL, },
-  { "CR[CMCV]", 27, 0, 3, 74, NULL, },
-  { "CR[DCR]", 27, 0, 3, 0, NULL, },
-  { "CR[EOI]", 27, 0, 7, 67, "SC Section 5.8.3.4, \"End of External Interrupt Register (EOI Ð CR67)\" on page 2:119", },
-  { "CR[GPTA]", 27, 0, 3, 9, NULL, },
-  { "CR[IFA]", 27, 0, 1, 20, NULL, },
-  { "CR[IFA]", 27, 0, 3, 20, NULL, },
-  { "CR[IFS]", 27, 0, 3, 23, NULL, },
-  { "CR[IFS]", 27, 0, 1, 23, NULL, },
-  { "CR[IFS]", 27, 0, 1, 23, NULL, },
-  { "CR[IHA]", 27, 0, 3, 25, NULL, },
-  { "CR[IIM]", 27, 0, 3, 24, NULL, },
-  { "CR[IIP]", 27, 0, 3, 19, NULL, },
-  { "CR[IIP]", 27, 0, 1, 19, NULL, },
-  { "CR[IIPA]", 27, 0, 3, 22, NULL, },
-  { "CR[IPSR]", 27, 0, 3, 16, NULL, },
-  { "CR[IPSR]", 27, 0, 1, 16, NULL, },
-  { "CR[IRR%], % in 0 - 3", 8, 0, 3, -1, NULL, },
-  { "CR[ISR]", 27, 0, 3, 17, NULL, },
-  { "CR[ITIR]", 27, 0, 3, 21, NULL, },
-  { "CR[ITIR]", 27, 0, 1, 21, NULL, },
-  { "CR[ITM]", 27, 0, 3, 1, NULL, },
-  { "CR[ITV]", 27, 0, 3, 72, NULL, },
-  { "CR[IVA]", 27, 0, 4, 2, NULL, },
-  { "CR[IVR]", 27, 0, 7, 65, "SC Section 5.8.3.2, \"External Interrupt Vector Register (IVR Ð CR65)\" on page 2:118", },
-  { "CR[LID]", 27, 0, 7, 64, "SC Section 5.8.3.1, \"Local ID (LID Ð CR64)\" on page 2:117", },
-  { "CR[LRR%], % in 0 - 1", 9, 0, 3, -1, NULL, },
-  { "CR[PMV]", 27, 0, 3, 73, NULL, },
-  { "CR[PTA]", 27, 0, 3, 8, NULL, },
-  { "CR[TPR]", 27, 0, 3, 66, NULL, },
-  { "CR[TPR]", 27, 0, 7, 66, "SC Section 5.8.3.3, \"Task Priority Register (TPR Ð CR66)\" on page 2:119", },
-  { "CR[TPR]", 27, 0, 1, 66, NULL, },
-  { "CR%, % in 3-7, 10-15, 18, 26-63, 75-79, 82-127", 10, 0, 0, -1, NULL, },
-  { "DBR#", 11, 0, 2, -1, NULL, },
-  { "DBR#", 11, 0, 3, -1, NULL, },
-  { "DTC", 0, 0, 3, -1, NULL, },
-  { "DTC", 0, 0, 2, -1, NULL, },
-  { "DTC", 0, 0, 0, -1, NULL, },
-  { "DTC", 0, 0, 2, -1, NULL, },
-  { "DTC_LIMIT*", 0, 0, 2, -1, NULL, },
-  { "DTR", 0, 0, 3, -1, NULL, },
-  { "DTR", 0, 0, 2, -1, NULL, },
-  { "DTR", 0, 0, 3, -1, NULL, },
-  { "DTR", 0, 0, 0, -1, NULL, },
-  { "DTR", 0, 0, 2, -1, NULL, },
-  { "FR%, % in 0 - 1", 12, 0, 0, -1, NULL, },
-  { "FR%, % in 2 - 127", 13, 0, 2, -1, NULL, },
-  { "FR%, % in 2 - 127", 13, 0, 0, -1, NULL, },
-  { "GR0", 14, 0, 0, -1, NULL, },
-  { "GR%, % in 1 - 127", 15, 0, 0, -1, NULL, },
-  { "GR%, % in 1 - 127", 15, 0, 2, -1, NULL, },
-  { "IBR#", 16, 0, 2, -1, NULL, },
-  { "InService*", 17, 0, 3, -1, NULL, },
-  { "InService*", 17, 0, 2, -1, NULL, },
-  { "InService*", 17, 0, 2, -1, NULL, },
-  { "IP", 0, 0, 0, -1, NULL, },
-  { "ITC", 0, 0, 4, -1, NULL, },
-  { "ITC", 0, 0, 2, -1, NULL, },
-  { "ITC", 0, 0, 0, -1, NULL, },
-  { "ITC", 0, 0, 4, -1, NULL, },
-  { "ITC", 0, 0, 2, -1, NULL, },
-  { "ITC_LIMIT*", 0, 0, 2, -1, NULL, },
-  { "ITR", 0, 0, 2, -1, NULL, },
-  { "ITR", 0, 0, 4, -1, NULL, },
-  { "ITR", 0, 0, 2, -1, NULL, },
-  { "ITR", 0, 0, 0, -1, NULL, },
-  { "ITR", 0, 0, 4, -1, NULL, },
-  { "memory", 0, 0, 0, -1, NULL, },
-  { "MSR#", 18, 0, 5, -1, NULL, },
-  { "PKR#", 19, 0, 3, -1, NULL, },
-  { "PKR#", 19, 0, 0, -1, NULL, },
-  { "PKR#", 19, 0, 2, -1, NULL, },
-  { "PKR#", 19, 0, 2, -1, NULL, },
-  { "PMC#", 20, 0, 2, -1, NULL, },
-  { "PMC#", 20, 0, 7, -1, "SC Section 7.2.1, \"Generic Performance Counter Registers\" for PMC[0].fr on page 2:150", },
-  { "PMD#", 21, 0, 2, -1, NULL, },
-  { "PR0", 0, 0, 0, -1, NULL, },
-  { "PR%, % in 1 - 15", 22, 0, 2, -1, NULL, },
-  { "PR%, % in 1 - 15", 22, 0, 2, -1, NULL, },
-  { "PR%, % in 1 - 15", 22, 0, 0, -1, NULL, },
-  { "PR%, % in 16 - 62", 23, 0, 2, -1, NULL, },
-  { "PR%, % in 16 - 62", 23, 0, 2, -1, NULL, },
-  { "PR%, % in 16 - 62", 23, 0, 0, -1, NULL, },
-  { "PR63", 24, 0, 2, -1, NULL, },
-  { "PR63", 24, 0, 2, -1, NULL, },
-  { "PR63", 24, 0, 0, -1, NULL, },
-  { "PSR.ac", 28, 0, 1, 3, NULL, },
-  { "PSR.ac", 28, 0, 3, 3, NULL, },
-  { "PSR.ac", 28, 0, 2, 3, NULL, },
-  { "PSR.ac", 28, 0, 2, 3, NULL, },
-  { "PSR.be", 28, 0, 1, 1, NULL, },
-  { "PSR.be", 28, 0, 3, 1, NULL, },
-  { "PSR.be", 28, 0, 2, 1, NULL, },
-  { "PSR.be", 28, 0, 2, 1, NULL, },
-  { "PSR.bn", 28, 0, 2, 44, NULL, },
-  { "PSR.cpl", 28, 0, 1, 32, NULL, },
-  { "PSR.cpl", 28, 0, 2, 32, NULL, },
-  { "PSR.da", 28, 0, 2, 38, NULL, },
-  { "PSR.db", 28, 0, 3, 24, NULL, },
-  { "PSR.db", 28, 0, 2, 24, NULL, },
-  { "PSR.db", 28, 0, 2, 24, NULL, },
-  { "PSR.dd", 28, 0, 2, 39, NULL, },
-  { "PSR.dfh", 28, 0, 3, 19, NULL, },
-  { "PSR.dfh", 28, 0, 2, 19, NULL, },
-  { "PSR.dfh", 28, 0, 2, 19, NULL, },
-  { "PSR.dfl", 28, 0, 3, 18, NULL, },
-  { "PSR.dfl", 28, 0, 2, 18, NULL, },
-  { "PSR.dfl", 28, 0, 2, 18, NULL, },
-  { "PSR.di", 28, 0, 3, 22, NULL, },
-  { "PSR.di", 28, 0, 2, 22, NULL, },
-  { "PSR.di", 28, 0, 2, 22, NULL, },
-  { "PSR.dt", 28, 0, 3, 17, NULL, },
-  { "PSR.dt", 28, 0, 2, 17, NULL, },
-  { "PSR.dt", 28, 0, 2, 17, NULL, },
-  { "PSR.ed", 28, 0, 2, 43, NULL, },
-  { "PSR.i", 28, 0, 2, 14, NULL, },
-  { "PSR.ia", 28, 0, 0, 14, NULL, },
-  { "PSR.ic", 28, 0, 2, 13, NULL, },
-  { "PSR.ic", 28, 0, 3, 13, NULL, },
-  { "PSR.ic", 28, 0, 2, 13, NULL, },
-  { "PSR.id", 28, 0, 0, 14, NULL, },
-  { "PSR.is", 28, 0, 0, 14, NULL, },
-  { "PSR.it", 28, 0, 2, 14, NULL, },
-  { "PSR.lp", 28, 0, 2, 25, NULL, },
-  { "PSR.lp", 28, 0, 3, 25, NULL, },
-  { "PSR.lp", 28, 0, 2, 25, NULL, },
-  { "PSR.mc", 28, 0, 2, 35, NULL, },
-  { "PSR.mfh", 28, 0, 2, 5, NULL, },
-  { "PSR.mfl", 28, 0, 2, 4, NULL, },
-  { "PSR.pk", 28, 0, 3, 15, NULL, },
-  { "PSR.pk", 28, 0, 2, 15, NULL, },
-  { "PSR.pk", 28, 0, 2, 15, NULL, },
-  { "PSR.pp", 28, 0, 2, 21, NULL, },
-  { "PSR.ri", 28, 0, 0, 41, NULL, },
-  { "PSR.rt", 28, 0, 2, 27, NULL, },
-  { "PSR.rt", 28, 0, 3, 27, NULL, },
-  { "PSR.rt", 28, 0, 2, 27, NULL, },
-  { "PSR.si", 28, 0, 2, 23, NULL, },
-  { "PSR.si", 28, 0, 3, 23, NULL, },
-  { "PSR.si", 28, 0, 2, 23, NULL, },
-  { "PSR.sp", 28, 0, 2, 20, NULL, },
-  { "PSR.sp", 28, 0, 3, 20, NULL, },
-  { "PSR.sp", 28, 0, 2, 20, NULL, },
-  { "PSR.ss", 28, 0, 2, 40, NULL, },
-  { "PSR.tb", 28, 0, 3, 26, NULL, },
-  { "PSR.tb", 28, 0, 2, 26, NULL, },
-  { "PSR.tb", 28, 0, 2, 26, NULL, },
-  { "PSR.up", 28, 0, 2, 2, NULL, },
-  { "PSR.vm", 28, 0, 1, 46, NULL, },
-  { "PSR.vm", 28, 0, 2, 46, NULL, },
-  { "RR#", 25, 0, 3, -1, NULL, },
-  { "RR#", 25, 0, 2, -1, NULL, },
-  { "RSE", 29, 0, 2, -1, NULL, },
-  { "ALAT", 0, 1, 0, -1, NULL, },
-  { "AR[BSP]", 26, 1, 2, 17, NULL, },
-  { "AR[BSPSTORE]", 26, 1, 2, 18, NULL, },
-  { "AR[CCV]", 26, 1, 2, 32, NULL, },
-  { "AR[CFLG]", 26, 1, 2, 27, NULL, },
-  { "AR[CSD]", 26, 1, 2, 25, NULL, },
-  { "AR[EC]", 26, 1, 2, 66, NULL, },
-  { "AR[EFLAG]", 26, 1, 2, 24, NULL, },
-  { "AR[FCR]", 26, 1, 2, 21, NULL, },
-  { "AR[FDR]", 26, 1, 2, 30, NULL, },
-  { "AR[FIR]", 26, 1, 2, 29, NULL, },
-  { "AR[FPSR].sf0.controls", 30, 1, 2, -1, NULL, },
-  { "AR[FPSR].sf1.controls", 30, 1, 2, -1, NULL, },
-  { "AR[FPSR].sf2.controls", 30, 1, 2, -1, NULL, },
-  { "AR[FPSR].sf3.controls", 30, 1, 2, -1, NULL, },
-  { "AR[FPSR].sf0.flags", 30, 1, 0, -1, NULL, },
-  { "AR[FPSR].sf0.flags", 30, 1, 2, -1, NULL, },
-  { "AR[FPSR].sf0.flags", 30, 1, 2, -1, NULL, },
-  { "AR[FPSR].sf1.flags", 30, 1, 0, -1, NULL, },
-  { "AR[FPSR].sf1.flags", 30, 1, 2, -1, NULL, },
-  { "AR[FPSR].sf1.flags", 30, 1, 2, -1, NULL, },
-  { "AR[FPSR].sf2.flags", 30, 1, 0, -1, NULL, },
-  { "AR[FPSR].sf2.flags", 30, 1, 2, -1, NULL, },
-  { "AR[FPSR].sf2.flags", 30, 1, 2, -1, NULL, },
-  { "AR[FPSR].sf3.flags", 30, 1, 0, -1, NULL, },
-  { "AR[FPSR].sf3.flags", 30, 1, 2, -1, NULL, },
-  { "AR[FPSR].sf3.flags", 30, 1, 2, -1, NULL, },
-  { "AR[FPSR].rv", 30, 1, 2, -1, NULL, },
-  { "AR[FPSR].traps", 30, 1, 2, -1, NULL, },
-  { "AR[FSR]", 26, 1, 2, 28, NULL, },
-  { "AR[ITC]", 26, 1, 2, 44, NULL, },
-  { "AR[K%], % in 0 - 7", 1, 1, 2, -1, NULL, },
-  { "AR[LC]", 26, 1, 2, 65, NULL, },
-  { "AR[PFS]", 26, 1, 0, 64, NULL, },
-  { "AR[PFS]", 26, 1, 2, 64, NULL, },
-  { "AR[PFS]", 26, 1, 2, 64, NULL, },
-  { "AR[RNAT]", 26, 1, 2, 19, NULL, },
-  { "AR[RSC]", 26, 1, 2, 16, NULL, },
-  { "AR[SSD]", 26, 1, 2, 26, NULL, },
-  { "AR[UNAT]{%}, % in 0 - 63", 2, 1, 2, -1, NULL, },
-  { "AR%, % in 8-15, 20, 22-23, 31, 33-35, 37-39, 41-43, 45-47, 67-111", 3, 1, 0, -1, NULL, },
-  { "AR%, % in 48 - 63, 112-127", 4, 1, 2, -1, NULL, },
-  { "BR%, % in 0 - 7", 5, 1, 2, -1, NULL, },
-  { "BR%, % in 0 - 7", 5, 1, 2, -1, NULL, },
-  { "BR%, % in 0 - 7", 5, 1, 2, -1, NULL, },
-  { "BR%, % in 0 - 7", 5, 1, 0, -1, NULL, },
-  { "CFM", 6, 1, 2, -1, NULL, },
-  { "CPUID#", 7, 1, 0, -1, NULL, },
-  { "CR[CMCV]", 27, 1, 2, 74, NULL, },
-  { "CR[DCR]", 27, 1, 2, 0, NULL, },
-  { "CR[EOI]", 27, 1, 7, 67, "SC Section 5.8.3.4, \"End of External Interrupt Register (EOI Ð CR67)\" on page 2:119", },
-  { "CR[GPTA]", 27, 1, 2, 9, NULL, },
-  { "CR[IFA]", 27, 1, 2, 20, NULL, },
-  { "CR[IFS]", 27, 1, 2, 23, NULL, },
-  { "CR[IHA]", 27, 1, 2, 25, NULL, },
-  { "CR[IIM]", 27, 1, 2, 24, NULL, },
-  { "CR[IIP]", 27, 1, 2, 19, NULL, },
-  { "CR[IIPA]", 27, 1, 2, 22, NULL, },
-  { "CR[IPSR]", 27, 1, 2, 16, NULL, },
-  { "CR[IRR%], % in 0 - 3", 8, 1, 2, -1, NULL, },
-  { "CR[ISR]", 27, 1, 2, 17, NULL, },
-  { "CR[ITIR]", 27, 1, 2, 21, NULL, },
-  { "CR[ITM]", 27, 1, 2, 1, NULL, },
-  { "CR[ITV]", 27, 1, 2, 72, NULL, },
-  { "CR[IVA]", 27, 1, 2, 2, NULL, },
-  { "CR[IVR]", 27, 1, 7, 65, "SC", },
-  { "CR[LID]", 27, 1, 7, 64, "SC", },
-  { "CR[LRR%], % in 0 - 1", 9, 1, 2, -1, NULL, },
-  { "CR[PMV]", 27, 1, 2, 73, NULL, },
-  { "CR[PTA]", 27, 1, 2, 8, NULL, },
-  { "CR[TPR]", 27, 1, 2, 66, NULL, },
-  { "CR%, % in 3-7, 10-15, 18, 26-63, 75-79, 82-127", 10, 1, 0, -1, NULL, },
-  { "DBR#", 11, 1, 2, -1, NULL, },
-  { "DTC", 0, 1, 0, -1, NULL, },
-  { "DTC", 0, 1, 2, -1, NULL, },
-  { "DTC", 0, 1, 2, -1, NULL, },
-  { "DTC_LIMIT*", 0, 1, 2, -1, NULL, },
-  { "DTR", 0, 1, 2, -1, NULL, },
-  { "DTR", 0, 1, 2, -1, NULL, },
-  { "DTR", 0, 1, 2, -1, NULL, },
-  { "DTR", 0, 1, 0, -1, NULL, },
-  { "FR%, % in 0 - 1", 12, 1, 0, -1, NULL, },
-  { "FR%, % in 2 - 127", 13, 1, 2, -1, NULL, },
-  { "GR0", 14, 1, 0, -1, NULL, },
-  { "GR%, % in 1 - 127", 15, 1, 2, -1, NULL, },
-  { "IBR#", 16, 1, 2, -1, NULL, },
-  { "InService*", 17, 1, 7, -1, "SC", },
-  { "IP", 0, 1, 0, -1, NULL, },
-  { "ITC", 0, 1, 0, -1, NULL, },
-  { "ITC", 0, 1, 2, -1, NULL, },
-  { "ITC", 0, 1, 2, -1, NULL, },
-  { "ITR", 0, 1, 2, -1, NULL, },
-  { "ITR", 0, 1, 2, -1, NULL, },
-  { "ITR", 0, 1, 0, -1, NULL, },
-  { "memory", 0, 1, 0, -1, NULL, },
-  { "MSR#", 18, 1, 7, -1, "SC", },
-  { "PKR#", 19, 1, 0, -1, NULL, },
-  { "PKR#", 19, 1, 0, -1, NULL, },
-  { "PKR#", 19, 1, 2, -1, NULL, },
-  { "PMC#", 20, 1, 2, -1, NULL, },
-  { "PMD#", 21, 1, 2, -1, NULL, },
-  { "PR0", 0, 1, 0, -1, NULL, },
-  { "PR%, % in 1 - 15", 22, 1, 0, -1, NULL, },
-  { "PR%, % in 1 - 15", 22, 1, 0, -1, NULL, },
-  { "PR%, % in 1 - 15", 22, 1, 2, -1, NULL, },
-  { "PR%, % in 1 - 15", 22, 1, 2, -1, NULL, },
-  { "PR%, % in 16 - 62", 23, 1, 0, -1, NULL, },
-  { "PR%, % in 16 - 62", 23, 1, 0, -1, NULL, },
-  { "PR%, % in 16 - 62", 23, 1, 2, -1, NULL, },
-  { "PR%, % in 16 - 62", 23, 1, 2, -1, NULL, },
-  { "PR63", 24, 1, 0, -1, NULL, },
-  { "PR63", 24, 1, 0, -1, NULL, },
-  { "PR63", 24, 1, 2, -1, NULL, },
-  { "PR63", 24, 1, 2, -1, NULL, },
-  { "PSR.ac", 28, 1, 2, 3, NULL, },
-  { "PSR.be", 28, 1, 2, 1, NULL, },
-  { "PSR.bn", 28, 1, 2, 44, NULL, },
-  { "PSR.cpl", 28, 1, 2, 32, NULL, },
-  { "PSR.da", 28, 1, 2, 38, NULL, },
-  { "PSR.db", 28, 1, 2, 24, NULL, },
-  { "PSR.dd", 28, 1, 2, 39, NULL, },
-  { "PSR.dfh", 28, 1, 2, 19, NULL, },
-  { "PSR.dfl", 28, 1, 2, 18, NULL, },
-  { "PSR.di", 28, 1, 2, 22, NULL, },
-  { "PSR.dt", 28, 1, 2, 17, NULL, },
-  { "PSR.ed", 28, 1, 2, 43, NULL, },
-  { "PSR.i", 28, 1, 2, 14, NULL, },
-  { "PSR.ia", 28, 1, 2, 14, NULL, },
-  { "PSR.ic", 28, 1, 2, 13, NULL, },
-  { "PSR.id", 28, 1, 2, 14, NULL, },
-  { "PSR.is", 28, 1, 2, 14, NULL, },
-  { "PSR.it", 28, 1, 2, 14, NULL, },
-  { "PSR.lp", 28, 1, 2, 25, NULL, },
-  { "PSR.mc", 28, 1, 2, 35, NULL, },
-  { "PSR.mfh", 28, 1, 0, 5, NULL, },
-  { "PSR.mfh", 28, 1, 2, 5, NULL, },
-  { "PSR.mfh", 28, 1, 2, 5, NULL, },
-  { "PSR.mfl", 28, 1, 0, 4, NULL, },
-  { "PSR.mfl", 28, 1, 2, 4, NULL, },
-  { "PSR.mfl", 28, 1, 2, 4, NULL, },
-  { "PSR.pk", 28, 1, 2, 15, NULL, },
-  { "PSR.pp", 28, 1, 2, 21, NULL, },
-  { "PSR.ri", 28, 1, 2, 41, NULL, },
-  { "PSR.rt", 28, 1, 2, 27, NULL, },
-  { "PSR.si", 28, 1, 2, 23, NULL, },
-  { "PSR.sp", 28, 1, 2, 20, NULL, },
-  { "PSR.ss", 28, 1, 2, 40, NULL, },
-  { "PSR.tb", 28, 1, 2, 26, NULL, },
-  { "PSR.up", 28, 1, 2, 2, NULL, },
-  { "PSR.vm", 28, 1, 2, 46, NULL, },
-  { "RR#", 25, 1, 2, -1, NULL, },
-  { "RSE", 29, 1, 2, -1, NULL, },
-  { "PR63", 24, 2, 6, -1, NULL, },
-};
-
-static const unsigned short dep0[] = {
-  97, 282, 2140, 2327,
-};
-
-static const unsigned short dep1[] = {
-  40, 41, 97, 158, 162, 175, 185, 282, 2138, 2139, 2140, 2166, 2167, 2170, 2173,
-  2327, 4135, 20616,
-};
-
-static const unsigned short dep2[] = {
-  97, 282, 2166, 2167, 2169, 2170, 2172, 2173, 2175, 2344, 2347, 2348, 2351,
-  2352, 2355, 2356,
-};
-
-static const unsigned short dep3[] = {
-  40, 41, 97, 158, 162, 175, 185, 282, 2138, 2139, 2140, 2166, 2167, 2170, 2173,
-  2344, 2347, 2348, 2351, 2352, 2355, 2356, 4135, 20616,
-};
-
-static const unsigned short dep4[] = {
-  97, 282, 22646, 22647, 22649, 22650, 22652, 22653, 22655, 22824, 22827, 22828,
-  22831, 22832, 22835, 22836,
-};
-
-static const unsigned short dep5[] = {
-  40, 41, 97, 158, 162, 175, 185, 282, 2138, 2139, 2140, 2166, 2167, 2170, 2173,
-  4135, 20616, 22824, 22827, 22828, 22831, 22832, 22835, 22836,
-};
-
-static const unsigned short dep6[] = {
-  97, 282, 2166, 2167, 2169, 2170, 2172, 2173, 2175, 2344, 2345, 2347, 2349,
-  2351, 2353, 2355,
-};
-
-static const unsigned short dep7[] = {
-  40, 41, 97, 158, 162, 175, 185, 282, 2138, 2139, 2140, 2166, 2167, 2170, 2173,
-  2344, 2345, 2348, 2349, 2352, 2353, 2356, 4135, 20616,
-};
-
-static const unsigned short dep8[] = {
-  97, 282, 2166, 2167, 2169, 2170, 2172, 2173, 2175, 2344, 2346, 2348, 2350,
-  2352, 2354, 2356,
-};
-
-static const unsigned short dep9[] = {
-  40, 41, 97, 158, 162, 175, 185, 282, 2138, 2139, 2140, 2166, 2167, 2170, 2173,
-  2344, 2346, 2347, 2350, 2351, 2354, 2355, 4135, 20616,
-};
-
-static const unsigned short dep10[] = {
-  97, 282, 2166, 2167, 2169, 2170, 2172, 2173, 2175, 2344, 2345, 2346, 2347,
-  2348, 2349, 2350, 2351, 2352, 2353, 2354, 2355, 2356,
-};
-
-static const unsigned short dep11[] = {
-  40, 41, 97, 158, 162, 175, 185, 282, 2138, 2139, 2140, 2166, 2167, 2170, 2173,
-  2344, 2345, 2346, 2347, 2348, 2349, 2350, 2351, 2352, 2353, 2354, 2355, 2356,
-  4135, 20616,
-};
-
-static const unsigned short dep12[] = {
-  97, 282, 2395,
-};
-
-static const unsigned short dep13[] = {
-  40, 41, 97, 158, 162, 164, 175, 185, 186, 188, 282, 2082, 2083, 2166, 2168,
-  2169, 2171, 2172, 2174, 2175, 4135,
-};
-
-static const unsigned short dep14[] = {
-  97, 163, 282, 325, 2395, 28866, 29018,
-};
-
-static const unsigned short dep15[] = {
-  1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21,
-  22, 23, 24, 25, 26, 28, 29, 30, 31, 32, 33, 40, 41, 97, 150, 152, 158, 162,
-  164, 175, 185, 186, 188, 282, 325, 2082, 2083, 2166, 2168, 2169, 2171, 2172,
-  2174, 2175, 4135, 28866, 29018,
-};
-
-static const unsigned short dep16[] = {
-  1, 6, 40, 97, 137, 196, 201, 241, 282, 312, 2395, 28866, 29018,
-};
-
-static const unsigned short dep17[] = {
-  1, 25, 27, 38, 40, 41, 97, 158, 162, 164, 166, 167, 175, 185, 186, 188, 196,
-  201, 241, 282, 312, 2082, 2083, 2166, 2168, 2169, 2171, 2172, 2174, 2175,
-  4135, 28866, 29018,
-};
-
-static const unsigned short dep18[] = {
-  1, 40, 51, 97, 196, 241, 248, 282, 28866, 29018,
-};
-
-static const unsigned short dep19[] = {
-  1, 38, 40, 41, 97, 158, 160, 161, 162, 175, 185, 190, 191, 196, 241, 248,
-  282, 4135, 28866, 29018,
-};
-
-static const unsigned short dep20[] = {
-  40, 97, 241, 282,
-};
-
-static const unsigned short dep21[] = {
-  97, 158, 162, 175, 185, 241, 282,
-};
-
-static const unsigned short dep22[] = {
-  1, 40, 97, 131, 135, 136, 138, 139, 142, 143, 146, 149, 152, 155, 156, 157,
-  158, 161, 162, 163, 164, 167, 168, 169, 170, 173, 174, 175, 178, 181, 184,
-  185, 188, 189, 191, 196, 241, 282, 309, 310, 311, 312, 313, 314, 315, 316,
-  317, 318, 319, 320, 321, 322, 323, 324, 325, 326, 327, 328, 330, 331, 333,
-  334, 335, 336, 337, 338, 339, 340, 341, 342, 343, 344, 28866, 29018,
-};
-
-static const unsigned short dep23[] = {
-  1, 38, 40, 41, 50, 51, 55, 58, 73, 97, 137, 138, 158, 162, 175, 185, 190,
-  191, 196, 241, 282, 309, 310, 311, 312, 313, 314, 315, 316, 317, 318, 319,
-  320, 321, 322, 323, 324, 325, 326, 327, 328, 330, 331, 333, 334, 335, 336,
-  337, 338, 339, 340, 341, 342, 343, 344, 4135, 28866, 29018,
-};
-
-static const unsigned short dep24[] = {
-  97, 136, 282, 311,
-};
-
-static const unsigned short dep25[] = {
-  97, 137, 138, 158, 162, 175, 185, 190, 191, 282, 311,
-};
-
-static const unsigned short dep26[] = {
-  97, 137, 282, 312,
-};
-
-static const unsigned short dep27[] = {
-  25, 26, 97, 98, 101, 105, 108, 137, 138, 158, 162, 164, 175, 185, 282, 312,
-
-};
-
-static const unsigned short dep28[] = {
-  97, 190, 282, 344,
-};
-
-static const unsigned short dep29[] = {
-  97, 98, 101, 105, 108, 137, 138, 158, 162, 164, 175, 185, 282, 344,
-};
-
-static const unsigned short dep30[] = {
-  40, 41, 97, 158, 162, 175, 185, 282, 2166, 2168, 2169, 2171, 2172, 2174, 2175,
-  4135,
-};
-
-static const unsigned short dep31[] = {
-  1, 25, 40, 97, 196, 228, 229, 241, 282, 2082, 2285, 2288, 2395, 28866, 29018,
-
-};
-
-static const unsigned short dep32[] = {
-  1, 6, 38, 40, 41, 97, 137, 138, 158, 162, 164, 175, 185, 186, 188, 196, 228,
-  230, 241, 282, 2082, 2083, 2166, 2168, 2169, 2171, 2172, 2174, 2175, 2286,
-  2288, 4135, 28866, 29018,
-};
-
-static const unsigned short dep33[] = {
-  97, 282,
-};
-
-static const unsigned short dep34[] = {
-  97, 158, 162, 175, 185, 282, 2082, 2084,
-};
-
-static const unsigned short dep35[] = {
-  40, 41, 97, 158, 162, 164, 175, 185, 186, 188, 282, 2166, 2168, 2169, 2171,
-  2172, 2174, 2175, 4135,
-};
-
-static const unsigned short dep36[] = {
-  6, 37, 38, 39, 97, 125, 126, 201, 241, 282, 307, 308, 2395,
-};
-
-static const unsigned short dep37[] = {
-  6, 37, 40, 41, 97, 158, 162, 164, 175, 185, 186, 188, 201, 241, 282, 307,
-  308, 347, 2166, 2168, 2169, 2171, 2172, 2174, 2175, 4135,
-};
-
-static const unsigned short dep38[] = {
-  24, 97, 227, 282, 2395,
-};
-
-static const unsigned short dep39[] = {
-  24, 40, 41, 97, 158, 162, 164, 175, 185, 186, 188, 227, 282, 2166, 2168, 2169,
-  2171, 2172, 2174, 2175, 4135,
-};
-
-static const unsigned short dep40[] = {
-  6, 24, 37, 38, 39, 97, 125, 126, 201, 227, 241, 282, 307, 308, 2395,
-};
-
-static const unsigned short dep41[] = {
-  6, 24, 37, 40, 41, 97, 158, 162, 164, 175, 185, 186, 188, 201, 227, 241, 282,
-  307, 308, 347, 2166, 2168, 2169, 2171, 2172, 2174, 2175, 4135,
-};
-
-static const unsigned short dep42[] = {
-  1, 6, 38, 40, 41, 97, 137, 138, 158, 162, 164, 175, 185, 186, 188, 196, 228,
-  230, 241, 282, 2166, 2168, 2169, 2171, 2172, 2174, 2175, 2286, 2288, 4135,
-  28866, 29018,
-};
-
-static const unsigned short dep43[] = {
-  97, 158, 162, 175, 185, 282,
-};
-
-static const unsigned short dep44[] = {
-  15, 97, 210, 211, 282, 2136, 2325, 18601, 18602, 18761, 18762, 18764, 18765,
-  22646, 22647, 22648, 22650, 22651, 22653, 22654, 22824, 22827, 22828, 22831,
-  22832, 22835, 22836,
-};
-
-static const unsigned short dep45[] = {
-  11, 19, 20, 40, 41, 97, 158, 162, 175, 185, 210, 212, 282, 2135, 2136, 2137,
-  2166, 2167, 2170, 2173, 2325, 4135, 16528, 16530, 16531, 16533, 18761, 18763,
-  18764, 18766, 22824, 22827, 22828, 22831, 22832, 22835, 22836,
-};
-
-static const unsigned short dep46[] = {
-  15, 16, 17, 18, 97, 210, 211, 213, 214, 216, 217, 219, 220, 282, 2136, 2325,
-  18601, 18602, 18761, 18762, 18764, 18765, 22646, 22647, 22648, 22650, 22651,
-  22653, 22654, 22824, 22827, 22828, 22831, 22832, 22835, 22836,
-};
-
-static const unsigned short dep47[] = {
-  11, 12, 13, 14, 19, 20, 40, 41, 97, 158, 162, 175, 185, 210, 212, 213, 215,
-  216, 218, 219, 221, 282, 2135, 2136, 2137, 2166, 2167, 2170, 2173, 2325, 4135,
-  16528, 16530, 16531, 16533, 18761, 18763, 18764, 18766, 22824, 22827, 22828,
-  22831, 22832, 22835, 22836,
-};
-
-static const unsigned short dep48[] = {
-  16, 97, 213, 214, 282, 2136, 2325, 18601, 18602, 18761, 18762, 18764, 18765,
-  22646, 22647, 22648, 22650, 22651, 22653, 22654, 22824, 22827, 22828, 22831,
-  22832, 22835, 22836,
-};
-
-static const unsigned short dep49[] = {
-  12, 19, 20, 40, 41, 97, 158, 162, 175, 185, 213, 215, 282, 2135, 2136, 2137,
-  2166, 2167, 2170, 2173, 2325, 4135, 16528, 16530, 16531, 16533, 18761, 18763,
-  18764, 18766, 22824, 22827, 22828, 22831, 22832, 22835, 22836,
-};
-
-static const unsigned short dep50[] = {
-  17, 97, 216, 217, 282, 2136, 2325, 18601, 18602, 18761, 18762, 18764, 18765,
-  22646, 22647, 22648, 22650, 22651, 22653, 22654, 22824, 22827, 22828, 22831,
-  22832, 22835, 22836,
-};
-
-static const unsigned short dep51[] = {
-  13, 19, 20, 40, 41, 97, 158, 162, 175, 185, 216, 218, 282, 2135, 2136, 2137,
-  2166, 2167, 2170, 2173, 2325, 4135, 16528, 16530, 16531, 16533, 18761, 18763,
-  18764, 18766, 22824, 22827, 22828, 22831, 22832, 22835, 22836,
-};
-
-static const unsigned short dep52[] = {
-  18, 97, 219, 220, 282, 2136, 2325, 18601, 18602, 18761, 18762, 18764, 18765,
-  22646, 22647, 22648, 22650, 22651, 22653, 22654, 22824, 22827, 22828, 22831,
-  22832, 22835, 22836,
-};
-
-static const unsigned short dep53[] = {
-  14, 19, 20, 40, 41, 97, 158, 162, 175, 185, 219, 221, 282, 2135, 2136, 2137,
-  2166, 2167, 2170, 2173, 2325, 4135, 16528, 16530, 16531, 16533, 18761, 18763,
-  18764, 18766, 22824, 22827, 22828, 22831, 22832, 22835, 22836,
-};
-
-static const unsigned short dep54[] = {
-  15, 97, 210, 211, 282, 2136, 2325, 18601, 18602, 18761, 18762, 18764, 18765,
-
-};
-
-static const unsigned short dep55[] = {
-  11, 19, 20, 40, 41, 97, 158, 162, 175, 185, 210, 212, 282, 2135, 2136, 2137,
-  2166, 2167, 2170, 2173, 2325, 4135, 16528, 16530, 16531, 16533, 18761, 18763,
-  18764, 18766,
-};
-
-static const unsigned short dep56[] = {
-  15, 16, 17, 18, 97, 210, 211, 213, 214, 216, 217, 219, 220, 282, 2136, 2325,
-  18601, 18602, 18761, 18762, 18764, 18765,
-};
-
-static const unsigned short dep57[] = {
-  11, 12, 13, 14, 19, 20, 40, 41, 97, 158, 162, 175, 185, 210, 212, 213, 215,
-  216, 218, 219, 221, 282, 2135, 2136, 2137, 2166, 2167, 2170, 2173, 2325, 4135,
-  16528, 16530, 16531, 16533, 18761, 18763, 18764, 18766,
-};
-
-static const unsigned short dep58[] = {
-  16, 97, 213, 214, 282, 2136, 2325, 18601, 18602, 18761, 18762, 18764, 18765,
-
-};
-
-static const unsigned short dep59[] = {
-  12, 19, 20, 40, 41, 97, 158, 162, 175, 185, 213, 215, 282, 2135, 2136, 2137,
-  2166, 2167, 2170, 2173, 2325, 4135, 16528, 16530, 16531, 16533, 18761, 18763,
-  18764, 18766,
-};
-
-static const unsigned short dep60[] = {
-  17, 97, 216, 217, 282, 2136, 2325, 18601, 18602, 18761, 18762, 18764, 18765,
-
-};
-
-static const unsigned short dep61[] = {
-  13, 19, 20, 40, 41, 97, 158, 162, 175, 185, 216, 218, 282, 2135, 2136, 2137,
-  2166, 2167, 2170, 2173, 2325, 4135, 16528, 16530, 16531, 16533, 18761, 18763,
-  18764, 18766,
-};
-
-static const unsigned short dep62[] = {
-  18, 97, 219, 220, 282, 2136, 2325, 18601, 18602, 18761, 18762, 18764, 18765,
-
-};
-
-static const unsigned short dep63[] = {
-  14, 19, 20, 40, 41, 97, 158, 162, 175, 185, 219, 221, 282, 2135, 2136, 2137,
-  2166, 2167, 2170, 2173, 2325, 4135, 16528, 16530, 16531, 16533, 18761, 18763,
-  18764, 18766,
-};
-
-static const unsigned short dep64[] = {
-  97, 282, 2136, 2325, 18601, 18602, 18761, 18762, 18764, 18765,
-};
-
-static const unsigned short dep65[] = {
-  40, 41, 97, 158, 162, 175, 185, 282, 2135, 2136, 2137, 2166, 2167, 2170, 2173,
-  2325, 4135, 16528, 16530, 16531, 16533, 18761, 18763, 18764, 18766,
-};
-
-static const unsigned short dep66[] = {
-  11, 97, 206, 282,
-};
-
-static const unsigned short dep67[] = {
-  11, 40, 41, 97, 158, 162, 175, 185, 206, 282, 2166, 2167, 2170, 2173, 4135,
-
-};
-
-static const unsigned short dep68[] = {
-  11, 40, 41, 97, 158, 162, 175, 185, 282, 2166, 2167, 2170, 2173, 4135,
-};
-
-static const unsigned short dep69[] = {
-  12, 97, 207, 282,
-};
-
-static const unsigned short dep70[] = {
-  11, 40, 41, 97, 158, 162, 175, 185, 207, 282, 2166, 2167, 2170, 2173, 4135,
-
-};
-
-static const unsigned short dep71[] = {
-  13, 97, 208, 282,
-};
-
-static const unsigned short dep72[] = {
-  11, 40, 41, 97, 158, 162, 175, 185, 208, 282, 2166, 2167, 2170, 2173, 4135,
-
-};
-
-static const unsigned short dep73[] = {
-  14, 97, 209, 282,
-};
-
-static const unsigned short dep74[] = {
-  11, 40, 41, 97, 158, 162, 175, 185, 209, 282, 2166, 2167, 2170, 2173, 4135,
-
-};
-
-static const unsigned short dep75[] = {
-  15, 97, 211, 212, 282,
-};
-
-static const unsigned short dep76[] = {
-  40, 41, 97, 158, 162, 175, 185, 211, 212, 282, 2166, 2167, 2170, 2173, 4135,
-
-};
-
-static const unsigned short dep77[] = {
-  40, 41, 97, 158, 162, 175, 185, 282, 2166, 2167, 2170, 2173, 4135,
-};
-
-static const unsigned short dep78[] = {
-  16, 97, 214, 215, 282,
-};
-
-static const unsigned short dep79[] = {
-  40, 41, 97, 158, 162, 175, 185, 214, 215, 282, 2166, 2167, 2170, 2173, 4135,
-
-};
-
-static const unsigned short dep80[] = {
-  17, 97, 217, 218, 282,
-};
-
-static const unsigned short dep81[] = {
-  40, 41, 97, 158, 162, 175, 185, 217, 218, 282, 2166, 2167, 2170, 2173, 4135,
-
-};
-
-static const unsigned short dep82[] = {
-  18, 97, 220, 221, 282,
-};
-
-static const unsigned short dep83[] = {
-  40, 41, 97, 158, 162, 175, 185, 220, 221, 282, 2166, 2167, 2170, 2173, 4135,
-
-};
-
-static const unsigned short dep84[] = {
-  15, 19, 20, 40, 41, 97, 158, 162, 164, 175, 185, 186, 188, 282, 2166, 2167,
-  2170, 2173, 4135,
-};
-
-static const unsigned short dep85[] = {
-  15, 16, 19, 20, 40, 41, 97, 158, 162, 164, 175, 185, 186, 188, 282, 2166,
-  2167, 2170, 2173, 4135,
-};
-
-static const unsigned short dep86[] = {
-  15, 17, 19, 20, 40, 41, 97, 158, 162, 164, 175, 185, 186, 188, 282, 2166,
-  2167, 2170, 2173, 4135,
-};
-
-static const unsigned short dep87[] = {
-  15, 18, 19, 20, 40, 41, 97, 158, 162, 164, 175, 185, 186, 188, 282, 2166,
-  2167, 2170, 2173, 4135,
-};
-
-static const unsigned short dep88[] = {
-  15, 97, 210, 211, 282,
-};
-
-static const unsigned short dep89[] = {
-  11, 19, 20, 40, 41, 97, 158, 162, 175, 185, 210, 212, 282, 2166, 2167, 2170,
-  2173, 4135,
-};
-
-static const unsigned short dep90[] = {
-  15, 16, 17, 18, 97, 210, 211, 213, 214, 216, 217, 219, 220, 282,
-};
-
-static const unsigned short dep91[] = {
-  11, 12, 13, 14, 19, 20, 40, 41, 97, 158, 162, 175, 185, 210, 212, 213, 215,
-  216, 218, 219, 221, 282, 2166, 2167, 2170, 2173, 4135,
-};
-
-static const unsigned short dep92[] = {
-  16, 97, 213, 214, 282,
-};
-
-static const unsigned short dep93[] = {
-  12, 19, 20, 40, 41, 97, 158, 162, 175, 185, 213, 215, 282, 2166, 2167, 2170,
-  2173, 4135,
-};
-
-static const unsigned short dep94[] = {
-  17, 97, 216, 217, 282,
-};
-
-static const unsigned short dep95[] = {
-  13, 19, 20, 40, 41, 97, 158, 162, 175, 185, 216, 218, 282, 2166, 2167, 2170,
-  2173, 4135,
-};
-
-static const unsigned short dep96[] = {
-  18, 97, 219, 220, 282,
-};
-
-static const unsigned short dep97[] = {
-  14, 19, 20, 40, 41, 97, 158, 162, 175, 185, 219, 221, 282, 2166, 2167, 2170,
-  2173, 4135,
-};
-
-static const unsigned short dep98[] = {
-  15, 97, 210, 211, 282, 2166, 2167, 2168, 2170, 2171, 2173, 2174, 2344, 2347,
-  2348, 2351, 2352, 2355, 2356,
-};
-
-static const unsigned short dep99[] = {
-  11, 19, 20, 40, 41, 97, 158, 162, 175, 185, 210, 212, 282, 2135, 2136, 2137,
-  2166, 2167, 2170, 2173, 2344, 2347, 2348, 2351, 2352, 2355, 2356, 4135, 16528,
-  16530, 16531, 16533,
-};
-
-static const unsigned short dep100[] = {
-  15, 16, 17, 18, 97, 210, 211, 213, 214, 216, 217, 219, 220, 282, 2166, 2167,
-  2168, 2170, 2171, 2173, 2174, 2344, 2347, 2348, 2351, 2352, 2355, 2356,
-};
-
-static const unsigned short dep101[] = {
-  11, 12, 13, 14, 19, 20, 40, 41, 97, 158, 162, 175, 185, 210, 212, 213, 215,
-  216, 218, 219, 221, 282, 2135, 2136, 2137, 2166, 2167, 2170, 2173, 2344, 2347,
-  2348, 2351, 2352, 2355, 2356, 4135, 16528, 16530, 16531, 16533,
-};
-
-static const unsigned short dep102[] = {
-  16, 97, 213, 214, 282, 2166, 2167, 2168, 2170, 2171, 2173, 2174, 2344, 2347,
-  2348, 2351, 2352, 2355, 2356,
-};
-
-static const unsigned short dep103[] = {
-  12, 19, 20, 40, 41, 97, 158, 162, 175, 185, 213, 215, 282, 2135, 2136, 2137,
-  2166, 2167, 2170, 2173, 2344, 2347, 2348, 2351, 2352, 2355, 2356, 4135, 16528,
-  16530, 16531, 16533,
-};
-
-static const unsigned short dep104[] = {
-  17, 97, 216, 217, 282, 2166, 2167, 2168, 2170, 2171, 2173, 2174, 2344, 2347,
-  2348, 2351, 2352, 2355, 2356,
-};
-
-static const unsigned short dep105[] = {
-  13, 19, 20, 40, 41, 97, 158, 162, 175, 185, 216, 218, 282, 2135, 2136, 2137,
-  2166, 2167, 2170, 2173, 2344, 2347, 2348, 2351, 2352, 2355, 2356, 4135, 16528,
-  16530, 16531, 16533,
-};
-
-static const unsigned short dep106[] = {
-  18, 97, 219, 220, 282, 2166, 2167, 2168, 2170, 2171, 2173, 2174, 2344, 2347,
-  2348, 2351, 2352, 2355, 2356,
-};
-
-static const unsigned short dep107[] = {
-  14, 19, 20, 40, 41, 97, 158, 162, 175, 185, 219, 221, 282, 2135, 2136, 2137,
-  2166, 2167, 2170, 2173, 2344, 2347, 2348, 2351, 2352, 2355, 2356, 4135, 16528,
-  16530, 16531, 16533,
-};
-
-static const unsigned short dep108[] = {
-  15, 97, 210, 211, 282, 22646, 22647, 22648, 22650, 22651, 22653, 22654, 22824,
-  22827, 22828, 22831, 22832, 22835, 22836,
-};
-
-static const unsigned short dep109[] = {
-  11, 19, 20, 40, 41, 97, 158, 162, 175, 185, 210, 212, 282, 2135, 2136, 2137,
-  2166, 2167, 2170, 2173, 4135, 16528, 16530, 16531, 16533, 22824, 22827, 22828,
-  22831, 22832, 22835, 22836,
-};
-
-static const unsigned short dep110[] = {
-  15, 16, 17, 18, 97, 210, 211, 213, 214, 216, 217, 219, 220, 282, 22646, 22647,
-  22648, 22650, 22651, 22653, 22654, 22824, 22827, 22828, 22831, 22832, 22835,
-  22836,
-};
-
-static const unsigned short dep111[] = {
-  11, 12, 13, 14, 19, 20, 40, 41, 97, 158, 162, 175, 185, 210, 212, 213, 215,
-  216, 218, 219, 221, 282, 2135, 2136, 2137, 2166, 2167, 2170, 2173, 4135, 16528,
-  16530, 16531, 16533, 22824, 22827, 22828, 22831, 22832, 22835, 22836,
-};
-
-static const unsigned short dep112[] = {
-  16, 97, 213, 214, 282, 22646, 22647, 22648, 22650, 22651, 22653, 22654, 22824,
-  22827, 22828, 22831, 22832, 22835, 22836,
-};
-
-static const unsigned short dep113[] = {
-  12, 19, 20, 40, 41, 97, 158, 162, 175, 185, 213, 215, 282, 2135, 2136, 2137,
-  2166, 2167, 2170, 2173, 4135, 16528, 16530, 16531, 16533, 22824, 22827, 22828,
-  22831, 22832, 22835, 22836,
-};
-
-static const unsigned short dep114[] = {
-  17, 97, 216, 217, 282, 22646, 22647, 22648, 22650, 22651, 22653, 22654, 22824,
-  22827, 22828, 22831, 22832, 22835, 22836,
-};
-
-static const unsigned short dep115[] = {
-  13, 19, 20, 40, 41, 97, 158, 162, 175, 185, 216, 218, 282, 2135, 2136, 2137,
-  2166, 2167, 2170, 2173, 4135, 16528, 16530, 16531, 16533, 22824, 22827, 22828,
-  22831, 22832, 22835, 22836,
-};
-
-static const unsigned short dep116[] = {
-  18, 97, 219, 220, 282, 22646, 22647, 22648, 22650, 22651, 22653, 22654, 22824,
-  22827, 22828, 22831, 22832, 22835, 22836,
-};
-
-static const unsigned short dep117[] = {
-  14, 19, 20, 40, 41, 97, 158, 162, 175, 185, 219, 221, 282, 2135, 2136, 2137,
-  2166, 2167, 2170, 2173, 4135, 16528, 16530, 16531, 16533, 22824, 22827, 22828,
-  22831, 22832, 22835, 22836,
-};
-
-static const unsigned short dep118[] = {
-  97, 282, 2166, 2167, 2168, 2170, 2171, 2173, 2174, 2344, 2347, 2348, 2351,
-  2352, 2355, 2356,
-};
-
-static const unsigned short dep119[] = {
-  40, 41, 97, 158, 162, 175, 185, 282, 2135, 2136, 2137, 2166, 2167, 2170, 2173,
-  2344, 2347, 2348, 2351, 2352, 2355, 2356, 4135, 16528, 16530, 16531, 16533,
-
-};
-
-static const unsigned short dep120[] = {
-  97, 282, 22646, 22647, 22648, 22650, 22651, 22653, 22654, 22824, 22827, 22828,
-  22831, 22832, 22835, 22836,
-};
-
-static const unsigned short dep121[] = {
-  40, 41, 97, 158, 162, 175, 185, 282, 2135, 2136, 2137, 2166, 2167, 2170, 2173,
-  4135, 16528, 16530, 16531, 16533, 22824, 22827, 22828, 22831, 22832, 22835,
-  22836,
-};
-
-static const unsigned short dep122[] = {
-  19, 20, 40, 41, 97, 158, 162, 175, 185, 282, 2135, 2136, 2137, 2166, 2167,
-  2170, 2173, 2325, 4135, 16528, 16530, 16531, 16533, 18761, 18763, 18764, 18766,
-
-};
-
-static const unsigned short dep123[] = {
-  40, 41, 97, 158, 162, 164, 175, 185, 186, 188, 282, 2138, 2139, 2140, 2166,
-  2167, 2170, 2173, 4135, 20616,
-};
-
-static const unsigned short dep124[] = {
-  97, 282, 2083, 2084, 2286, 2287,
-};
-
-static const unsigned short dep125[] = {
-  40, 41, 97, 158, 162, 175, 185, 282, 2138, 2139, 2140, 2166, 2167, 2170, 2173,
-  2285, 2287, 4135, 20616,
-};
-
-static const unsigned short dep126[] = {
-  40, 41, 97, 158, 162, 175, 185, 282, 2082, 2084, 2166, 2167, 2170, 2173, 2327,
-  4135, 20616,
-};
-
-static const unsigned short dep127[] = {
-  97, 282, 14455, 14457, 14458, 14460, 14461, 14463, 14635, 14636, 14639, 14640,
-  14643, 14644,
-};
-
-static const unsigned short dep128[] = {
-  40, 41, 97, 158, 162, 175, 185, 282, 2138, 2139, 2140, 4135, 14635, 14636,
-  14639, 14640, 14643, 14644, 20616, 24694, 24695, 24698, 24701,
-};
-
-static const unsigned short dep129[] = {
-  97, 122, 124, 125, 127, 282, 303, 304, 307, 308,
-};
-
-static const unsigned short dep130[] = {
-  40, 41, 97, 158, 162, 175, 185, 282, 303, 304, 307, 308, 4135, 24694, 24695,
-  24698, 24701,
-};
-
-static const unsigned short dep131[] = {
-  40, 41, 97, 158, 162, 175, 185, 282, 2166, 2167, 2170, 2173, 2327, 4135, 20616,
-
-};
-
-static const unsigned short dep132[] = {
-  40, 41, 97, 119, 122, 125, 158, 162, 175, 185, 282, 2327, 4135, 20616, 24694,
-
-};
-
-static const unsigned short dep133[] = {
-  6, 24, 26, 27, 97, 201, 227, 230, 282, 2081, 2284,
-};
-
-static const unsigned short dep134[] = {
-  40, 41, 97, 158, 162, 175, 185, 201, 227, 229, 282, 2138, 2139, 2140, 2166,
-  2167, 2170, 2173, 2284, 4135, 20616,
-};
-
-static const unsigned short dep135[] = {
-  6, 24, 25, 26, 40, 41, 97, 158, 162, 175, 185, 282, 2081, 2166, 2167, 2170,
-  2173, 2327, 4135, 20616,
-};
-
-static const unsigned short dep136[] = {
-  40, 41, 97, 158, 162, 175, 185, 282, 2166, 2167, 2170, 2173, 2344, 2347, 2348,
-  2351, 2352, 2355, 2356, 4135,
-};
-
-static const unsigned short dep137[] = {
-  40, 41, 97, 158, 162, 175, 185, 282, 2166, 2167, 2170, 2173, 4135, 22824,
-  22827, 22828, 22831, 22832, 22835, 22836,
-};
-
-static const unsigned short dep138[] = {
-  40, 41, 97, 158, 162, 175, 185, 282, 2166, 2167, 2170, 2173, 2344, 2345, 2348,
-  2349, 2352, 2353, 2356, 4135,
-};
-
-static const unsigned short dep139[] = {
-  40, 41, 97, 158, 162, 175, 185, 282, 2166, 2167, 2170, 2173, 2344, 2346, 2347,
-  2350, 2351, 2354, 2355, 4135,
-};
-
-static const unsigned short dep140[] = {
-  40, 41, 97, 158, 162, 175, 185, 282, 2166, 2167, 2170, 2173, 2344, 2345, 2346,
-  2347, 2348, 2349, 2350, 2351, 2352, 2353, 2354, 2355, 2356, 4135,
-};
-
-static const unsigned short dep141[] = {
-  0, 40, 41, 97, 158, 162, 164, 175, 185, 186, 188, 282, 2166, 2167, 2170, 2173,
-  4135,
-};
-
-static const unsigned short dep142[] = {
-  0, 97, 195, 282,
-};
-
-static const unsigned short dep143[] = {
-  0, 40, 41, 97, 158, 162, 164, 175, 185, 186, 188, 195, 282, 2166, 2167, 2170,
-  2173, 4135,
-};
-
-static const unsigned short dep144[] = {
-  40, 41, 97, 158, 162, 175, 185, 195, 282, 2166, 2167, 2170, 2173, 4135,
-};
-
-static const unsigned short dep145[] = {
-  2, 28, 97, 197, 231, 282, 28866, 29018,
-};
-
-static const unsigned short dep146[] = {
-  1, 2, 28, 29, 97, 158, 162, 175, 177, 178, 185, 197, 231, 282, 28866, 29018,
-
-};
-
-static const unsigned short dep147[] = {
-  1, 28, 29, 38, 40, 41, 97, 158, 162, 175, 177, 178, 185, 197, 231, 282, 4135,
-  28866, 29018,
-};
-
-static const unsigned short dep148[] = {
-  0, 40, 41, 97, 158, 162, 175, 185, 195, 282, 2166, 2167, 2170, 2173, 4135,
-
-};
-
-static const unsigned short dep149[] = {
-  1, 2, 3, 4, 5, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22,
-  28, 29, 30, 31, 97, 196, 197, 198, 199, 200, 202, 203, 204, 205, 206, 207,
-  208, 209, 211, 212, 214, 215, 217, 218, 220, 221, 222, 223, 224, 225, 231,
-  232, 233, 234, 282, 2071, 2081, 2274, 2284, 28866, 29018,
-};
-
-static const unsigned short dep150[] = {
-  29, 40, 41, 97, 137, 138, 158, 162, 175, 185, 190, 191, 196, 197, 198, 199,
-  200, 202, 203, 204, 205, 206, 207, 208, 209, 211, 212, 214, 215, 217, 218,
-  220, 221, 222, 223, 224, 225, 231, 232, 233, 234, 282, 2138, 2139, 2140, 2166,
-  2167, 2170, 2173, 2274, 2284, 4135, 20616, 28866, 29018,
-};
-
-static const unsigned short dep151[] = {
-  97, 282, 14464, 14466, 14468, 14470, 14505, 14506, 14525, 14645, 14646, 14666,
-  14667, 14669, 14670, 14679,
-};
-
-static const unsigned short dep152[] = {
-  40, 41, 97, 158, 162, 175, 183, 184, 185, 282, 2166, 2167, 2170, 2173, 4135,
-  14645, 14646, 14666, 14667, 14669, 14670, 14679,
-};
-
-static const unsigned short dep153[] = {
-  14464, 14466, 14468, 14470, 14505, 14506, 14525, 14645, 14646, 14666, 14667,
-  14669, 14670, 14679,
-};
-
-static const unsigned short dep154[] = {
-  183, 184, 14645, 14646, 14666, 14667, 14669, 14670, 14679,
-};
-
-static const unsigned short dep155[] = {
-  97, 282, 14465, 14466, 14469, 14470, 14480, 14481, 14483, 14484, 14486, 14487,
-  14489, 14490, 14493, 14495, 14496, 14505, 14506, 14507, 14508, 14510, 14515,
-  14516, 14518, 14519, 14525, 14645, 14646, 14652, 14653, 14654, 14655, 14657,
-  14659, 14666, 14667, 14669, 14670, 14671, 14672, 14675, 14676, 14679,
-};
-
-static const unsigned short dep156[] = {
-  40, 41, 97, 137, 138, 158, 162, 175, 185, 190, 191, 282, 2166, 2167, 2170,
-  2173, 4135, 14645, 14646, 14652, 14653, 14654, 14655, 14657, 14659, 14666,
-  14667, 14669, 14670, 14671, 14672, 14675, 14676, 14679, 34888,
-};
-
-static const unsigned short dep157[] = {
-  40, 41, 97, 137, 138, 158, 162, 175, 185, 190, 191, 282, 2166, 2167, 2170,
-  2173, 4135, 14645, 14646, 14652, 14653, 14654, 14655, 14657, 14659, 14666,
-  14667, 14669, 14670, 14671, 14672, 14675, 14676, 14679,
-};
-
-static const unsigned short dep158[] = {
-  1, 2, 3, 4, 5, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22,
-  28, 29, 30, 31, 40, 41, 97, 137, 138, 158, 162, 175, 180, 181, 185, 190, 191,
-  282, 2071, 2081, 2166, 2167, 2170, 2173, 2327, 4135, 20616, 28866,
-};
-
-static const unsigned short dep159[] = {
-  43, 44, 45, 46, 47, 48, 49, 50, 52, 53, 54, 55, 56, 57, 58, 60, 61, 62, 63,
-  64, 65, 67, 69, 70, 71, 72, 73, 94, 96, 97, 243, 244, 245, 246, 247, 248,
-  249, 250, 251, 252, 253, 255, 256, 257, 258, 259, 261, 263, 264, 265, 281,
-  282, 2116, 2310,
-};
-
-static const unsigned short dep160[] = {
-  40, 41, 96, 97, 137, 138, 158, 160, 161, 162, 175, 185, 190, 191, 243, 244,
-  245, 246, 247, 248, 249, 250, 251, 252, 253, 255, 256, 257, 258, 259, 261,
-  263, 264, 265, 281, 282, 2138, 2139, 2140, 2166, 2167, 2170, 2173, 2310, 4135,
-  20616,
-};
-
-static const unsigned short dep161[] = {
-  59, 95, 97, 254, 281, 282, 2140, 2327,
-};
-
-static const unsigned short dep162[] = {
-  40, 41, 43, 44, 46, 48, 49, 51, 52, 53, 54, 56, 57, 60, 61, 63, 64, 65, 66,
-  67, 69, 70, 71, 94, 95, 97, 137, 138, 158, 160, 161, 162, 175, 185, 190, 191,
-  254, 281, 282, 2107, 2116, 2166, 2167, 2170, 2173, 2327, 4135, 20616,
-};
-
-static const unsigned short dep163[] = {
-  2, 28, 41, 97, 197, 231, 241, 282, 2140, 2327, 28866, 29018,
-};
-
-static const unsigned short dep164[] = {
-  2, 25, 26, 28, 29, 38, 40, 41, 97, 158, 162, 175, 177, 178, 185, 197, 231,
-  241, 282, 2327, 4135, 20616, 28866, 29018,
-};
-
-static const unsigned short dep165[] = {
-  97, 129, 130, 133, 134, 140, 141, 144, 145, 147, 148, 150, 151, 153, 154,
-  157, 159, 160, 165, 166, 169, 170, 171, 172, 174, 176, 177, 179, 180, 182,
-  183, 186, 187, 189, 282, 309, 310, 314, 316, 317, 318, 319, 321, 323, 327,
-  330, 331, 333, 334, 335, 336, 338, 339, 340, 342, 343,
-};
-
-static const unsigned short dep166[] = {
-  40, 41, 97, 137, 138, 158, 162, 175, 185, 190, 191, 282, 309, 310, 314, 316,
-  317, 318, 319, 321, 323, 327, 330, 331, 333, 334, 335, 336, 338, 339, 340,
-  342, 343, 2138, 2139, 2140, 2166, 2167, 2170, 2173, 4135, 20616, 34888,
-};
-
-static const unsigned short dep167[] = {
-  97, 128, 130, 132, 134, 169, 170, 189, 282, 309, 310, 330, 331, 333, 334,
-  343,
-};
-
-static const unsigned short dep168[] = {
-  40, 41, 97, 158, 162, 175, 183, 184, 185, 282, 309, 310, 330, 331, 333, 334,
-  343, 2138, 2139, 2140, 2166, 2167, 2170, 2173, 4135, 20616,
-};
-
-static const unsigned short dep169[] = {
-  40, 41, 97, 130, 131, 134, 135, 137, 138, 141, 142, 145, 146, 148, 149, 151,
-  152, 154, 155, 157, 158, 159, 161, 162, 164, 165, 167, 168, 169, 170, 172,
-  173, 174, 175, 176, 178, 179, 181, 182, 184, 185, 187, 188, 189, 190, 191,
-  282, 2166, 2167, 2170, 2173, 2327, 4135, 20616,
-};
-
-static const unsigned short dep170[] = {
-  40, 41, 97, 130, 131, 134, 135, 158, 162, 169, 170, 175, 185, 189, 282, 2166,
-  2167, 2170, 2173, 2327, 4135, 20616,
-};
-
-static const unsigned short dep171[] = {
-  40, 41, 70, 76, 77, 82, 84, 97, 111, 137, 138, 153, 155, 158, 162, 171, 173,
-  175, 185, 192, 282, 2138, 2139, 2140, 2166, 2167, 2170, 2173, 2327, 4135,
-  20616,
-};
-
-static const unsigned short dep172[] = {
-  40, 41, 70, 76, 77, 82, 84, 97, 111, 137, 138, 139, 140, 142, 143, 153, 155,
-  158, 162, 171, 173, 175, 185, 192, 282, 2138, 2139, 2140, 2166, 2167, 2170,
-  2173, 4135, 20616,
-};
-
-static const unsigned short dep173[] = {
-  77, 78, 97, 101, 102, 269, 270, 282, 284, 285,
-};
-
-static const unsigned short dep174[] = {
-  40, 41, 47, 62, 78, 80, 86, 97, 99, 102, 137, 138, 158, 160, 161, 162, 175,
-  185, 190, 191, 192, 269, 270, 282, 284, 285, 2138, 2139, 2140, 2166, 2167,
-  2170, 2173, 4135, 20616,
-};
-
-static const unsigned short dep175[] = {
-  40, 41, 47, 62, 78, 80, 97, 99, 102, 104, 106, 137, 138, 158, 160, 161, 162,
-  175, 185, 190, 191, 192, 269, 270, 282, 284, 285, 2138, 2139, 2140, 2166,
-  2167, 2170, 2173, 4135, 20616,
-};
-
-static const unsigned short dep176[] = {
-  97, 282, 12480, 12481, 12633,
-};
-
-static const unsigned short dep177[] = {
-  40, 41, 97, 137, 138, 158, 162, 175, 185, 190, 191, 282, 2138, 2139, 2140,
-  2166, 2167, 2170, 2173, 4135, 12633, 20616,
-};
-
-static const unsigned short dep178[] = {
-  97, 282, 6219, 6220, 6411,
-};
-
-static const unsigned short dep179[] = {
-  40, 41, 97, 137, 138, 158, 162, 175, 185, 190, 191, 282, 2138, 2139, 2140,
-  2166, 2167, 2170, 2173, 4135, 6411, 20616,
-};
-
-static const unsigned short dep180[] = {
-  97, 282, 6237, 6424,
-};
-
-static const unsigned short dep181[] = {
-  40, 41, 97, 137, 138, 158, 162, 175, 185, 190, 191, 282, 2138, 2139, 2140,
-  2166, 2167, 2170, 2173, 4135, 6424, 20616,
-};
-
-static const unsigned short dep182[] = {
-  97, 282, 6255, 6256, 6257, 6258, 6435, 6437, 8484,
-};
-
-static const unsigned short dep183[] = {
-  40, 41, 97, 137, 138, 158, 162, 175, 185, 190, 191, 282, 2138, 2139, 2140,
-  2166, 2167, 2170, 2173, 4135, 6258, 6436, 6437, 8304, 8483, 20616,
-};
-
-static const unsigned short dep184[] = {
-  97, 282, 6259, 6260, 6438,
-};
-
-static const unsigned short dep185[] = {
-  40, 41, 97, 137, 138, 158, 162, 175, 185, 190, 191, 282, 2138, 2139, 2140,
-  2166, 2167, 2170, 2173, 4135, 6438, 20616,
-};
-
-static const unsigned short dep186[] = {
-  97, 282, 6261, 6439,
-};
-
-static const unsigned short dep187[] = {
-  40, 41, 97, 137, 138, 158, 162, 175, 185, 190, 191, 282, 2138, 2139, 2140,
-  2166, 2167, 2170, 2173, 4135, 6439, 20616,
-};
-
-static const unsigned short dep188[] = {
-  97, 282, 10350, 10530,
-};
-
-static const unsigned short dep189[] = {
-  40, 41, 97, 137, 138, 158, 162, 175, 185, 190, 191, 282, 2138, 2139, 2140,
-  2166, 2167, 2170, 2173, 4135, 10530, 20616,
-};
-
-static const unsigned short dep190[] = {
-  77, 78, 82, 83, 97, 101, 102, 269, 270, 272, 273, 282, 284, 285,
-};
-
-static const unsigned short dep191[] = {
-  40, 41, 47, 62, 78, 80, 83, 86, 97, 99, 102, 137, 138, 158, 160, 161, 162,
-  175, 185, 190, 191, 192, 269, 270, 272, 274, 282, 284, 285, 2138, 2139, 2140,
-  2166, 2167, 2170, 2173, 4135, 20616,
-};
-
-static const unsigned short dep192[] = {
-  77, 78, 97, 101, 102, 104, 105, 269, 270, 282, 284, 285, 286, 287,
-};
-
-static const unsigned short dep193[] = {
-  40, 41, 47, 62, 78, 80, 97, 99, 102, 104, 106, 137, 138, 158, 160, 161, 162,
-  175, 185, 190, 191, 192, 269, 270, 282, 284, 285, 286, 287, 2138, 2139, 2140,
-  2166, 2167, 2170, 2173, 4135, 20616,
-};
-
-static const unsigned short dep194[] = {
-  40, 41, 97, 137, 138, 158, 162, 175, 185, 190, 191, 282, 2138, 2139, 2140,
-  2166, 2167, 2170, 2173, 2327, 4135, 12481, 20616,
-};
-
-static const unsigned short dep195[] = {
-  40, 41, 97, 137, 138, 158, 162, 175, 185, 190, 191, 282, 2138, 2139, 2140,
-  2166, 2167, 2170, 2173, 2327, 4135, 6219, 20616,
-};
-
-static const unsigned short dep196[] = {
-  40, 41, 97, 137, 138, 158, 162, 175, 185, 190, 191, 282, 2138, 2139, 2140,
-  2166, 2167, 2170, 2173, 2327, 4135, 6237, 20616,
-};
-
-static const unsigned short dep197[] = {
-  40, 41, 97, 137, 138, 158, 162, 175, 185, 190, 191, 282, 2138, 2139, 2140,
-  2166, 2167, 2170, 2173, 2327, 4135, 6257, 8303, 20616,
-};
-
-static const unsigned short dep198[] = {
-  40, 41, 97, 137, 138, 158, 162, 175, 185, 190, 191, 282, 2138, 2139, 2140,
-  2166, 2167, 2170, 2173, 2327, 4135, 6259, 20616,
-};
-
-static const unsigned short dep199[] = {
-  40, 41, 97, 137, 138, 158, 162, 175, 183, 184, 185, 282, 2138, 2139, 2140,
-  2166, 2167, 2170, 2173, 2327, 4135, 6260, 6261, 20616,
-};
-
-static const unsigned short dep200[] = {
-  40, 41, 97, 158, 162, 175, 185, 282, 2138, 2139, 2140, 2166, 2167, 2170, 2173,
-  2327, 4135, 10350, 20616,
-};
-
-static const unsigned short dep201[] = {
-  40, 41, 97, 158, 162, 175, 185, 190, 191, 282, 2138, 2139, 2140, 2166, 2167,
-  2170, 2173, 2327, 4135, 6186, 20616,
-};
-
-static const unsigned short dep202[] = {
-  77, 79, 80, 97, 98, 99, 100, 268, 269, 282, 283, 284,
-};
-
-static const unsigned short dep203[] = {
-  40, 41, 78, 79, 83, 85, 97, 100, 102, 104, 107, 137, 138, 158, 162, 175, 185,
-  190, 191, 192, 268, 270, 282, 283, 285, 2138, 2139, 2140, 2166, 2167, 2170,
-  2173, 4135, 20616,
-};
-
-static const unsigned short dep204[] = {
-  77, 79, 80, 81, 97, 98, 99, 100, 103, 268, 269, 271, 282, 283, 284,
-};
-
-static const unsigned short dep205[] = {
-  40, 41, 78, 79, 81, 83, 85, 97, 100, 102, 103, 104, 107, 137, 138, 158, 162,
-  175, 185, 190, 191, 192, 268, 270, 271, 282, 283, 285, 2138, 2139, 2140, 2166,
-  2167, 2170, 2173, 4135, 20616,
-};
-
-static const unsigned short dep206[] = {
-  77, 79, 80, 84, 85, 86, 97, 98, 99, 100, 268, 269, 274, 275, 282, 283, 284,
-
-};
-
-static const unsigned short dep207[] = {
-  40, 41, 78, 79, 83, 85, 97, 100, 102, 137, 138, 158, 162, 175, 185, 190, 191,
-  192, 268, 270, 273, 275, 282, 283, 285, 2138, 2139, 2140, 2166, 2167, 2170,
-  2173, 4135, 20616,
-};
-
-static const unsigned short dep208[] = {
-  77, 79, 80, 97, 98, 99, 100, 106, 107, 108, 268, 269, 282, 283, 284, 287,
-  288,
-};
-
-static const unsigned short dep209[] = {
-  40, 41, 78, 79, 97, 100, 102, 104, 107, 137, 138, 158, 162, 175, 185, 190,
-  191, 192, 268, 270, 282, 283, 285, 286, 288, 2138, 2139, 2140, 2166, 2167,
-  2170, 2173, 4135, 20616,
-};
-
-static const unsigned short dep210[] = {
-  40, 41, 46, 70, 97, 158, 162, 175, 185, 190, 191, 192, 282, 2138, 2139, 2140,
-  2166, 2167, 2170, 2173, 2327, 4135, 20616,
-};
-
-static const unsigned short dep211[] = {
-  40, 41, 97, 158, 162, 175, 185, 190, 191, 192, 282, 2138, 2139, 2140, 2166,
-  2167, 2170, 2173, 2327, 4135, 20616,
-};
-
-static const unsigned short dep212[] = {
-  40, 41, 70, 77, 82, 84, 97, 137, 138, 153, 155, 158, 162, 175, 185, 190, 191,
-  192, 282, 2138, 2139, 2140, 2166, 2167, 2170, 2173, 2327, 4135, 20616,
-};
-
-static const unsigned short dep213[] = {
-  40, 41, 97, 158, 162, 164, 175, 185, 186, 188, 282, 2135, 2136, 2137, 2138,
-  2139, 2140, 2166, 2167, 2170, 2173, 4135, 16528, 16530, 16531, 16533, 20616,
-
-};
-
-static const unsigned short dep214[] = {
-  40, 41, 70, 77, 82, 84, 97, 153, 155, 158, 162, 175, 185, 192, 282, 2138,
-  2139, 2140, 2166, 2167, 2170, 2173, 4135, 20616,
-};
-
-static const unsigned short dep215[] = {
-  40, 41, 78, 79, 97, 100, 137, 138, 158, 162, 175, 185, 190, 191, 268, 270,
-  282, 283, 285, 2138, 2139, 2140, 2166, 2167, 2170, 2173, 4135, 20616,
-};
-
-static const unsigned short dep216[] = {
-  40, 41, 70, 76, 77, 82, 84, 97, 109, 111, 128, 129, 131, 132, 133, 135, 137,
-  138, 139, 140, 142, 143, 153, 155, 158, 162, 171, 173, 175, 185, 190, 191,
-  192, 282, 2138, 2139, 2140, 2166, 2167, 2170, 2173, 2327, 4135, 20616,
-};
-
-static const unsigned short dep217[] = {
-  5, 97, 200, 282, 2140, 2327,
-};
-
-static const unsigned short dep218[] = {
-  40, 41, 70, 76, 77, 82, 84, 97, 109, 111, 128, 129, 131, 132, 133, 135, 137,
-  138, 139, 140, 142, 143, 153, 155, 158, 162, 171, 173, 175, 185, 190, 191,
-  192, 200, 282, 2138, 2139, 2140, 2166, 2167, 2170, 2173, 2327, 4135, 20616,
-
-};
-
-static const unsigned short dep219[] = {
-  40, 41, 44, 70, 76, 77, 82, 84, 97, 109, 111, 128, 129, 131, 132, 133, 135,
-  137, 138, 139, 140, 142, 143, 153, 155, 156, 158, 162, 171, 173, 175, 185,
-  190, 191, 192, 282, 2138, 2139, 2140, 2166, 2167, 2170, 2173, 2327, 4135,
-  20616,
-};
-
-static const unsigned short dep220[] = {
-  0, 97, 195, 282, 2140, 2327,
-};
-
-static const unsigned short dep221[] = {
-  0, 40, 41, 70, 76, 77, 82, 84, 97, 109, 111, 128, 129, 131, 132, 133, 135,
-  137, 138, 139, 140, 142, 143, 153, 155, 158, 162, 171, 173, 175, 185, 190,
-  191, 192, 195, 282, 2138, 2139, 2140, 2166, 2167, 2170, 2173, 2327, 4135,
-  20616,
-};
-
-static const unsigned short dep222[] = {
-  0, 40, 41, 44, 70, 76, 77, 82, 84, 97, 109, 111, 128, 129, 131, 132, 133,
-  135, 137, 138, 139, 140, 142, 143, 153, 155, 156, 158, 162, 171, 173, 175,
-  185, 190, 191, 192, 195, 282, 2138, 2139, 2140, 2166, 2167, 2170, 2173, 2327,
-  4135, 20616,
-};
-
-static const unsigned short dep223[] = {
-  31, 40, 41, 70, 76, 77, 82, 84, 97, 109, 111, 128, 129, 131, 132, 133, 135,
-  137, 138, 139, 140, 142, 143, 153, 155, 158, 162, 171, 173, 175, 185, 190,
-  191, 192, 282, 2138, 2139, 2140, 2166, 2167, 2170, 2173, 2327, 4135, 20616,
-
-};
-
-static const unsigned short dep224[] = {
-  0, 97, 195, 282, 2327, 26715,
-};
-
-static const unsigned short dep225[] = {
-  0, 97, 109, 195, 282, 289,
-};
-
-static const unsigned short dep226[] = {
-  0, 40, 41, 70, 76, 77, 82, 84, 97, 111, 128, 129, 131, 132, 133, 135, 137,
-  138, 139, 140, 142, 143, 153, 155, 158, 162, 171, 173, 175, 185, 190, 191,
-  192, 195, 282, 289, 2138, 2139, 2140, 2166, 2167, 2170, 2173, 4135, 20616,
-
-};
-
-static const unsigned short dep227[] = {
-  0, 5, 40, 41, 70, 76, 77, 82, 84, 97, 111, 128, 129, 131, 132, 133, 135, 137,
-  138, 139, 140, 142, 143, 153, 155, 158, 162, 171, 173, 175, 185, 190, 191,
-  192, 195, 282, 289, 2138, 2139, 2140, 2166, 2167, 2170, 2173, 4135, 20616,
-
-};
-
-static const unsigned short dep228[] = {
-  0, 31, 97, 109, 195, 234, 282, 289,
-};
-
-static const unsigned short dep229[] = {
-  0, 40, 41, 70, 76, 77, 82, 84, 97, 111, 128, 129, 131, 132, 133, 135, 137,
-  138, 139, 140, 142, 143, 153, 155, 158, 162, 171, 173, 175, 185, 190, 191,
-  192, 195, 234, 282, 289, 2138, 2139, 2140, 2166, 2167, 2170, 2173, 4135, 20616,
-
-};
-
-static const unsigned short dep230[] = {
-  0, 97, 109, 195, 282, 289, 2140, 2327,
-};
-
-static const unsigned short dep231[] = {
-  0, 3, 40, 41, 70, 76, 77, 82, 84, 97, 109, 111, 128, 129, 131, 132, 133, 135,
-  137, 138, 139, 140, 142, 143, 153, 155, 158, 162, 171, 173, 175, 185, 190,
-  191, 192, 195, 282, 289, 2138, 2139, 2140, 2166, 2167, 2170, 2173, 2327, 4135,
-  20616,
-};
-
-static const unsigned short dep232[] = {
-  0, 3, 5, 40, 41, 70, 76, 77, 82, 84, 97, 109, 111, 128, 129, 131, 132, 133,
-  135, 137, 138, 139, 140, 142, 143, 153, 155, 158, 162, 171, 173, 175, 185,
-  190, 191, 192, 195, 282, 289, 2138, 2139, 2140, 2166, 2167, 2170, 2173, 2327,
-  4135, 20616,
-};
-
-static const unsigned short dep233[] = {
-  0, 40, 41, 70, 76, 77, 82, 84, 97, 109, 111, 128, 129, 131, 132, 133, 135,
-  137, 138, 139, 140, 142, 143, 153, 155, 158, 162, 171, 173, 175, 185, 190,
-  191, 192, 195, 282, 289, 2138, 2139, 2140, 2166, 2167, 2170, 2173, 2327, 4135,
-  20616,
-};
-
-static const unsigned short dep234[] = {
-  40, 41, 97, 158, 162, 175, 185, 282, 2135, 2136, 2137, 2166, 2167, 2170, 2173,
-  2327, 4135, 16528, 16530, 16531, 16533, 20616,
-};
-
-static const unsigned short dep235[] = {
-  0, 40, 41, 70, 76, 77, 82, 84, 97, 111, 128, 129, 131, 132, 133, 135, 137,
-  138, 139, 140, 142, 143, 153, 155, 158, 162, 171, 173, 175, 185, 190, 191,
-  192, 195, 282, 289, 2138, 2139, 2140, 2166, 2167, 2170, 2173, 2327, 4135,
-  20616,
-};
-
-static const unsigned short dep236[] = {
-  0, 31, 97, 109, 195, 234, 282, 289, 2140, 2327,
-};
-
-static const unsigned short dep237[] = {
-  0, 40, 41, 70, 76, 77, 82, 84, 97, 111, 128, 129, 131, 132, 133, 135, 137,
-  138, 139, 140, 142, 143, 153, 155, 158, 162, 171, 173, 175, 185, 190, 191,
-  192, 195, 234, 282, 289, 2138, 2139, 2140, 2166, 2167, 2170, 2173, 2327, 4135,
-  20616,
-};
-
-static const unsigned short dep238[] = {
-  40, 41, 70, 76, 77, 82, 84, 97, 109, 111, 128, 129, 131, 132, 133, 135, 137,
-  138, 139, 140, 142, 143, 153, 155, 158, 162, 171, 173, 175, 185, 190, 191,
-  192, 282, 2138, 2139, 2140, 2166, 2167, 2170, 2173, 2325, 4135, 16528, 16530,
-  16531, 16533, 18761, 18763, 18764, 18766, 20616,
-};
-
-static const unsigned short dep239[] = {
-  40, 41, 44, 70, 76, 77, 82, 84, 97, 109, 111, 128, 129, 131, 132, 133, 135,
-  137, 138, 139, 140, 142, 143, 153, 155, 156, 158, 162, 171, 173, 175, 185,
-  190, 191, 192, 282, 2138, 2139, 2140, 2166, 2167, 2170, 2173, 2325, 4135,
-  16528, 16530, 16531, 16533, 18761, 18763, 18764, 18766, 20616,
-};
-
-static const unsigned short dep240[] = {
-  0, 97, 195, 282, 2136, 2325, 18601, 18602, 18761, 18762, 18764, 18765,
-};
-
-static const unsigned short dep241[] = {
-  0, 40, 41, 70, 76, 77, 82, 84, 97, 109, 111, 128, 129, 131, 132, 133, 135,
-  137, 138, 139, 140, 142, 143, 153, 155, 158, 162, 171, 173, 175, 185, 190,
-  191, 192, 195, 282, 2138, 2139, 2140, 2166, 2167, 2170, 2173, 2325, 4135,
-  16528, 16530, 16531, 16533, 18761, 18763, 18764, 18766, 20616,
-};
-
-static const unsigned short dep242[] = {
-  0, 40, 41, 44, 70, 76, 77, 82, 84, 97, 109, 111, 128, 129, 131, 132, 133,
-  135, 137, 138, 139, 140, 142, 143, 153, 155, 156, 158, 162, 171, 173, 175,
-  185, 190, 191, 192, 195, 282, 2138, 2139, 2140, 2166, 2167, 2170, 2173, 2325,
-  4135, 16528, 16530, 16531, 16533, 18761, 18763, 18764, 18766, 20616,
-};
-
-static const unsigned short dep243[] = {
-  0, 97, 195, 282, 2137, 2325, 18601, 18602, 18761, 18762, 18764, 18765,
-};
-
-static const unsigned short dep244[] = {
-  97, 282, 2136, 2140, 2325, 2327, 18601, 18602, 18761, 18762, 18764, 18765,
-
-};
-
-static const unsigned short dep245[] = {
-  40, 41, 70, 76, 77, 82, 84, 97, 109, 111, 128, 129, 131, 132, 133, 135, 137,
-  138, 139, 140, 142, 143, 153, 155, 158, 162, 171, 173, 175, 185, 190, 191,
-  192, 282, 2138, 2139, 2140, 2166, 2167, 2170, 2173, 2325, 2327, 4135, 16528,
-  16530, 16531, 16533, 18761, 18763, 18764, 18766, 20616,
-};
-
-static const unsigned short dep246[] = {
-  40, 41, 44, 70, 76, 77, 82, 84, 97, 109, 111, 128, 129, 131, 132, 133, 135,
-  137, 138, 139, 140, 142, 143, 153, 155, 156, 158, 162, 171, 173, 175, 185,
-  190, 191, 192, 282, 2138, 2139, 2140, 2166, 2167, 2170, 2173, 2325, 2327,
-  4135, 16528, 16530, 16531, 16533, 18761, 18763, 18764, 18766, 20616,
-};
-
-static const unsigned short dep247[] = {
-  0, 97, 195, 282, 2136, 2140, 2325, 2327, 18601, 18602, 18761, 18762, 18764,
-  18765,
-};
-
-static const unsigned short dep248[] = {
-  0, 40, 41, 70, 76, 77, 82, 84, 97, 109, 111, 128, 129, 131, 132, 133, 135,
-  137, 138, 139, 140, 142, 143, 153, 155, 158, 162, 171, 173, 175, 185, 190,
-  191, 192, 195, 282, 2138, 2139, 2140, 2166, 2167, 2170, 2173, 2325, 2327,
-  4135, 16528, 16530, 16531, 16533, 18761, 18763, 18764, 18766, 20616,
-};
-
-static const unsigned short dep249[] = {
-  0, 40, 41, 44, 70, 76, 77, 82, 84, 97, 109, 111, 128, 129, 131, 132, 133,
-  135, 137, 138, 139, 140, 142, 143, 153, 155, 156, 158, 162, 171, 173, 175,
-  185, 190, 191, 192, 195, 282, 2138, 2139, 2140, 2166, 2167, 2170, 2173, 2325,
-  2327, 4135, 16528, 16530, 16531, 16533, 18761, 18763, 18764, 18766, 20616,
-
-};
-
-static const unsigned short dep250[] = {
-  0, 97, 195, 282, 2137, 2140, 2325, 2327, 18601, 18602, 18761, 18762, 18764,
-  18765,
-};
-
-static const unsigned short dep251[] = {
-  0, 40, 41, 70, 76, 77, 82, 84, 97, 111, 128, 129, 131, 132, 133, 135, 137,
-  138, 139, 140, 142, 143, 153, 155, 158, 162, 171, 173, 175, 185, 190, 191,
-  192, 195, 282, 289, 2135, 2136, 2137, 2138, 2139, 2140, 2166, 2167, 2170,
-  2173, 4135, 16528, 16530, 16531, 16533, 20616,
-};
-
-static const unsigned short dep252[] = {
-  40, 41, 70, 76, 77, 82, 84, 97, 137, 138, 139, 140, 142, 143, 153, 155, 156,
-  158, 162, 171, 173, 175, 185, 192, 282, 2166, 2167, 2170, 2173, 4135,
-};
-
-static const unsigned short dep253[] = {
-  40, 41, 70, 76, 77, 82, 84, 97, 137, 138, 139, 140, 142, 143, 153, 155, 156,
-  158, 162, 171, 173, 175, 185, 192, 282, 2138, 2139, 2140, 2166, 2167, 2170,
-  2173, 2327, 4135, 20616,
-};
-
-static const unsigned short dep254[] = {
-  40, 41, 97, 158, 162, 175, 185, 282, 2138, 2139, 2140, 2166, 2167, 2170, 2173,
-  2325, 4135, 16528, 16530, 16531, 16533, 18761, 18763, 18764, 18766, 20616,
-
-};
-
-static const unsigned short dep255[] = {
-  0, 40, 41, 70, 76, 77, 82, 84, 97, 111, 128, 129, 131, 132, 133, 135, 137,
-  138, 139, 140, 142, 143, 153, 155, 158, 162, 171, 173, 175, 185, 190, 191,
-  192, 195, 282, 289, 2135, 2136, 2137, 2138, 2139, 2140, 2166, 2167, 2170,
-  2173, 2327, 4135, 16528, 16530, 16531, 16533, 20616,
-};
-
-static const unsigned short dep256[] = {
-  1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21,
-  22, 24, 26, 27, 28, 29, 30, 31, 97, 196, 197, 198, 199, 200, 201, 202, 203,
-  204, 205, 206, 207, 208, 209, 211, 212, 214, 215, 217, 218, 220, 221, 222,
-  223, 224, 225, 227, 230, 231, 232, 233, 234, 282, 2071, 2081, 2140, 2274,
-  2284, 2327, 28866, 29018,
-};
-
-static const unsigned short dep257[] = {
-  1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21,
-  22, 24, 25, 26, 28, 29, 30, 31, 40, 41, 97, 137, 138, 158, 162, 175, 180,
-  181, 185, 190, 191, 196, 197, 198, 199, 200, 201, 202, 203, 204, 205, 206,
-  207, 208, 209, 211, 212, 214, 215, 217, 218, 220, 221, 222, 223, 224, 225,
-  227, 229, 231, 232, 233, 234, 282, 2071, 2081, 2138, 2139, 2140, 2166, 2167,
-  2170, 2173, 2274, 2284, 2327, 4135, 20616, 28866, 29018,
-};
-
-#define NELS(X) (sizeof(X)/sizeof(X[0]))
-static const struct ia64_opcode_dependency
-op_dependencies[] = {
-  { NELS(dep1), dep1, NELS(dep0), dep0, },
-  { NELS(dep3), dep3, NELS(dep2), dep2, },
-  { NELS(dep5), dep5, NELS(dep4), dep4, },
-  { NELS(dep7), dep7, NELS(dep6), dep6, },
-  { NELS(dep9), dep9, NELS(dep8), dep8, },
-  { NELS(dep11), dep11, NELS(dep10), dep10, },
-  { NELS(dep13), dep13, NELS(dep12), dep12, },
-  { NELS(dep15), dep15, NELS(dep14), dep14, },
-  { NELS(dep17), dep17, NELS(dep16), dep16, },
-  { NELS(dep19), dep19, NELS(dep18), dep18, },
-  { NELS(dep21), dep21, NELS(dep20), dep20, },
-  { NELS(dep23), dep23, NELS(dep22), dep22, },
-  { NELS(dep25), dep25, NELS(dep24), dep24, },
-  { NELS(dep27), dep27, NELS(dep26), dep26, },
-  { NELS(dep29), dep29, NELS(dep28), dep28, },
-  { NELS(dep30), dep30, NELS(dep12), dep12, },
-  { NELS(dep32), dep32, NELS(dep31), dep31, },
-  { NELS(dep34), dep34, NELS(dep33), dep33, },
-  { NELS(dep35), dep35, NELS(dep12), dep12, },
-  { NELS(dep37), dep37, NELS(dep36), dep36, },
-  { NELS(dep39), dep39, NELS(dep38), dep38, },
-  { NELS(dep41), dep41, NELS(dep40), dep40, },
-  { NELS(dep42), dep42, NELS(dep31), dep31, },
-  { NELS(dep43), dep43, NELS(dep33), dep33, },
-  { NELS(dep45), dep45, NELS(dep44), dep44, },
-  { NELS(dep47), dep47, NELS(dep46), dep46, },
-  { NELS(dep49), dep49, NELS(dep48), dep48, },
-  { NELS(dep51), dep51, NELS(dep50), dep50, },
-  { NELS(dep53), dep53, NELS(dep52), dep52, },
-  { NELS(dep55), dep55, NELS(dep54), dep54, },
-  { NELS(dep57), dep57, NELS(dep56), dep56, },
-  { NELS(dep59), dep59, NELS(dep58), dep58, },
-  { NELS(dep61), dep61, NELS(dep60), dep60, },
-  { NELS(dep63), dep63, NELS(dep62), dep62, },
-  { NELS(dep65), dep65, NELS(dep64), dep64, },
-  { NELS(dep67), dep67, NELS(dep66), dep66, },
-  { NELS(dep68), dep68, NELS(dep33), dep33, },
-  { NELS(dep70), dep70, NELS(dep69), dep69, },
-  { NELS(dep72), dep72, NELS(dep71), dep71, },
-  { NELS(dep74), dep74, NELS(dep73), dep73, },
-  { NELS(dep76), dep76, NELS(dep75), dep75, },
-  { NELS(dep77), dep77, NELS(dep33), dep33, },
-  { NELS(dep79), dep79, NELS(dep78), dep78, },
-  { NELS(dep81), dep81, NELS(dep80), dep80, },
-  { NELS(dep83), dep83, NELS(dep82), dep82, },
-  { NELS(dep84), dep84, NELS(dep33), dep33, },
-  { NELS(dep85), dep85, NELS(dep33), dep33, },
-  { NELS(dep86), dep86, NELS(dep33), dep33, },
-  { NELS(dep87), dep87, NELS(dep33), dep33, },
-  { NELS(dep89), dep89, NELS(dep88), dep88, },
-  { NELS(dep91), dep91, NELS(dep90), dep90, },
-  { NELS(dep93), dep93, NELS(dep92), dep92, },
-  { NELS(dep95), dep95, NELS(dep94), dep94, },
-  { NELS(dep97), dep97, NELS(dep96), dep96, },
-  { NELS(dep99), dep99, NELS(dep98), dep98, },
-  { NELS(dep101), dep101, NELS(dep100), dep100, },
-  { NELS(dep103), dep103, NELS(dep102), dep102, },
-  { NELS(dep105), dep105, NELS(dep104), dep104, },
-  { NELS(dep107), dep107, NELS(dep106), dep106, },
-  { NELS(dep109), dep109, NELS(dep108), dep108, },
-  { NELS(dep111), dep111, NELS(dep110), dep110, },
-  { NELS(dep113), dep113, NELS(dep112), dep112, },
-  { NELS(dep115), dep115, NELS(dep114), dep114, },
-  { NELS(dep117), dep117, NELS(dep116), dep116, },
-  { NELS(dep119), dep119, NELS(dep118), dep118, },
-  { NELS(dep121), dep121, NELS(dep120), dep120, },
-  { NELS(dep122), dep122, NELS(dep64), dep64, },
-  { NELS(dep123), dep123, NELS(dep33), dep33, },
-  { NELS(dep125), dep125, NELS(dep124), dep124, },
-  { NELS(dep126), dep126, NELS(dep0), dep0, },
-  { NELS(dep128), dep128, NELS(dep127), dep127, },
-  { NELS(dep130), dep130, NELS(dep129), dep129, },
-  { NELS(dep131), dep131, NELS(dep0), dep0, },
-  { NELS(dep132), dep132, NELS(dep0), dep0, },
-  { NELS(dep134), dep134, NELS(dep133), dep133, },
-  { NELS(dep135), dep135, NELS(dep0), dep0, },
-  { NELS(dep136), dep136, NELS(dep2), dep2, },
-  { NELS(dep137), dep137, NELS(dep4), dep4, },
-  { NELS(dep138), dep138, NELS(dep6), dep6, },
-  { NELS(dep139), dep139, NELS(dep8), dep8, },
-  { NELS(dep140), dep140, NELS(dep10), dep10, },
-  { NELS(dep141), dep141, NELS(dep33), dep33, },
-  { NELS(dep143), dep143, NELS(dep142), dep142, },
-  { NELS(dep144), dep144, NELS(dep142), dep142, },
-  { NELS(dep146), dep146, NELS(dep145), dep145, },
-  { NELS(dep147), dep147, NELS(dep145), dep145, },
-  { NELS(dep148), dep148, NELS(dep142), dep142, },
-  { NELS(dep150), dep150, NELS(dep149), dep149, },
-  { NELS(dep152), dep152, NELS(dep151), dep151, },
-  { NELS(dep154), dep154, NELS(dep153), dep153, },
-  { NELS(dep156), dep156, NELS(dep155), dep155, },
-  { NELS(dep157), dep157, NELS(dep155), dep155, },
-  { NELS(dep158), dep158, NELS(dep0), dep0, },
-  { NELS(dep160), dep160, NELS(dep159), dep159, },
-  { NELS(dep162), dep162, NELS(dep161), dep161, },
-  { NELS(dep164), dep164, NELS(dep163), dep163, },
-  { NELS(dep166), dep166, NELS(dep165), dep165, },
-  { NELS(dep168), dep168, NELS(dep167), dep167, },
-  { NELS(dep169), dep169, NELS(dep0), dep0, },
-  { NELS(dep170), dep170, NELS(dep0), dep0, },
-  { NELS(dep171), dep171, NELS(dep0), dep0, },
-  { NELS(dep172), dep172, NELS(dep33), dep33, },
-  { NELS(dep174), dep174, NELS(dep173), dep173, },
-  { NELS(dep175), dep175, NELS(dep173), dep173, },
-  { NELS(dep177), dep177, NELS(dep176), dep176, },
-  { NELS(dep179), dep179, NELS(dep178), dep178, },
-  { NELS(dep181), dep181, NELS(dep180), dep180, },
-  { NELS(dep183), dep183, NELS(dep182), dep182, },
-  { NELS(dep185), dep185, NELS(dep184), dep184, },
-  { NELS(dep187), dep187, NELS(dep186), dep186, },
-  { NELS(dep189), dep189, NELS(dep188), dep188, },
-  { NELS(dep191), dep191, NELS(dep190), dep190, },
-  { NELS(dep193), dep193, NELS(dep192), dep192, },
-  { NELS(dep194), dep194, NELS(dep0), dep0, },
-  { NELS(dep195), dep195, NELS(dep0), dep0, },
-  { NELS(dep196), dep196, NELS(dep0), dep0, },
-  { NELS(dep197), dep197, NELS(dep0), dep0, },
-  { NELS(dep198), dep198, NELS(dep0), dep0, },
-  { NELS(dep199), dep199, NELS(dep0), dep0, },
-  { NELS(dep200), dep200, NELS(dep0), dep0, },
-  { NELS(dep201), dep201, NELS(dep0), dep0, },
-  { NELS(dep203), dep203, NELS(dep202), dep202, },
-  { NELS(dep205), dep205, NELS(dep204), dep204, },
-  { NELS(dep207), dep207, NELS(dep206), dep206, },
-  { NELS(dep209), dep209, NELS(dep208), dep208, },
-  { NELS(dep210), dep210, NELS(dep0), dep0, },
-  { NELS(dep211), dep211, NELS(dep0), dep0, },
-  { NELS(dep212), dep212, NELS(dep0), dep0, },
-  { NELS(dep213), dep213, NELS(dep33), dep33, },
-  { NELS(dep214), dep214, NELS(dep33), dep33, },
-  { NELS(dep215), dep215, NELS(dep202), dep202, },
-  { NELS(dep216), dep216, NELS(dep0), dep0, },
-  { NELS(dep218), dep218, NELS(dep217), dep217, },
-  { NELS(dep219), dep219, NELS(dep0), dep0, },
-  { NELS(dep221), dep221, NELS(dep220), dep220, },
-  { NELS(dep222), dep222, NELS(dep220), dep220, },
-  { NELS(dep223), dep223, NELS(dep0), dep0, },
-  { NELS(dep221), dep221, NELS(dep224), dep224, },
-  { NELS(dep226), dep226, NELS(dep225), dep225, },
-  { NELS(dep227), dep227, NELS(dep225), dep225, },
-  { NELS(dep229), dep229, NELS(dep228), dep228, },
-  { NELS(dep231), dep231, NELS(dep230), dep230, },
-  { NELS(dep232), dep232, NELS(dep230), dep230, },
-  { NELS(dep233), dep233, NELS(dep230), dep230, },
-  { NELS(dep234), dep234, NELS(dep0), dep0, },
-  { NELS(dep235), dep235, NELS(dep230), dep230, },
-  { NELS(dep237), dep237, NELS(dep236), dep236, },
-  { NELS(dep238), dep238, NELS(dep64), dep64, },
-  { NELS(dep239), dep239, NELS(dep64), dep64, },
-  { NELS(dep241), dep241, NELS(dep240), dep240, },
-  { NELS(dep242), dep242, NELS(dep240), dep240, },
-  { NELS(dep241), dep241, NELS(dep243), dep243, },
-  { NELS(dep245), dep245, NELS(dep244), dep244, },
-  { NELS(dep246), dep246, NELS(dep244), dep244, },
-  { NELS(dep248), dep248, NELS(dep247), dep247, },
-  { NELS(dep249), dep249, NELS(dep247), dep247, },
-  { NELS(dep248), dep248, NELS(dep250), dep250, },
-  { NELS(dep251), dep251, NELS(dep225), dep225, },
-  { NELS(dep252), dep252, NELS(dep33), dep33, },
-  { NELS(dep253), dep253, NELS(dep0), dep0, },
-  { NELS(dep254), dep254, NELS(dep64), dep64, },
-  { NELS(dep255), dep255, NELS(dep230), dep230, },
-  { 0, NULL, 0, NULL, },
-  { NELS(dep257), dep257, NELS(dep256), dep256, },
-};
-
-static const struct ia64_completer_table
-completer_table[] = {
-  { 0x0, 0x0, 0, -1, -1, 0, 1, 0 },
-  { 0x0, 0x0, 0, -1, -1, 0, 1, 0 },
-  { 0x0, 0x0, 0, -1, -1, 0, 1, 0 },
-  { 0x0, 0x0, 0, -1, -1, 0, 1, 0 },
-  { 0x0, 0x0, 0, -1, -1, 0, 1, 0 },
-  { 0x0, 0x0, 0, -1, -1, 0, 1, 0 },
-  { 0x0, 0x0, 0, -1, -1, 0, 1, 0 },
-  { 0x0, 0x0, 0, -1, -1, 0, 1, 0 },
-  { 0x0, 0x0, 0, -1, -1, 0, 1, 95 },
-  { 0x0, 0x0, 0, -1, -1, 0, 1, 95 },
-  { 0x0, 0x0, 0, -1, -1, 0, 1, 0 },
-  { 0x0, 0x0, 0, -1, -1, 0, 1, 0 },
-  { 0x0, 0x0, 0, -1, -1, 0, 1, 0 },
-  { 0x0, 0x0, 0, -1, -1, 0, 1, 0 },
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-  { 0x200001, 0x200001, 176, -1, -1, 12, 1, 5 },
-  { 0x0, 0x0, 176, -1, -1, 0, 1, 5 },
-  { 0x1, 0x1, 176, -1, -1, 12, 1, 5 },
-  { 0x1, 0x1, 176, -1, -1, 33, 1, 5 },
-  { 0x200001, 0x200001, 176, -1, -1, 12, 1, 5 },
-  { 0x0, 0x0, 176, -1, -1, 0, 1, 5 },
-  { 0x1, 0x1, 176, -1, -1, 12, 1, 5 },
-  { 0x2200001, 0x6200001, 176, 2924, -1, 12, 1, 4 },
-  { 0x11, 0x11, 176, 2040, -1, 33, 1, 4 },
-  { 0x1, 0x1, 176, -1, -1, 33, 1, 5 },
-  { 0x4200001, 0x4200001, 176, -1, -1, 12, 1, 5 },
-  { 0x1, 0x1, 176, -1, -1, 37, 1, 4 },
-  { 0x2000001, 0x2000001, 176, -1, -1, 12, 1, 4 },
-  { 0x2000001, 0x2000001, 176, -1, -1, 12, 1, 4 },
-  { 0x1, 0x1, 176, 2046, -1, 37, 1, 4 },
-  { 0x2200001, 0x2200001, 176, -1, -1, 12, 1, 4 },
-  { 0x11, 0x11, 176, 2048, -1, 33, 1, 4 },
-  { 0x2000001, 0x2000001, 176, -1, -1, 12, 1, 4 },
-  { 0x1, 0x1, 176, 2050, -1, 37, 1, 4 },
-  { 0x2200001, 0x2200001, 176, -1, -1, 12, 1, 4 },
-  { 0x11, 0x11, 176, 2052, -1, 33, 1, 4 },
-  { 0x2000001, 0x2000001, 176, -1, -1, 12, 1, 4 },
-  { 0x1, 0x1, 176, 2054, -1, 37, 1, 4 },
-  { 0x2200001, 0x2200001, 176, -1, -1, 12, 1, 4 },
-  { 0x11, 0x11, 176, 2056, -1, 33, 1, 4 },
-  { 0x1, 0x1, 176, -1, -1, 37, 1, 4 },
-  { 0x2000001, 0x2000001, 176, -1, -1, 12, 1, 4 },
-  { 0x11, 0x11, 176, -1, -1, 33, 1, 4 },
-  { 0x2200001, 0x2200001, 176, -1, -1, 12, 1, 4 },
-  { 0x2200001, 0x6200001, 176, 2943, -1, 12, 1, 4 },
-  { 0x11, 0x11, 176, 2060, -1, 33, 1, 4 },
-  { 0x1, 0x1, 176, -1, -1, 33, 1, 5 },
-  { 0x4200001, 0x4200001, 176, -1, -1, 12, 1, 5 },
-  { 0x1, 0x1, 176, -1, -1, 37, 1, 4 },
-  { 0x2000001, 0x2000001, 176, -1, -1, 12, 1, 4 },
-  { 0x0, 0x0, 176, -1, -1, 0, 1, 5 },
-  { 0x1, 0x1, 176, -1, -1, 12, 1, 5 },
-  { 0x0, 0x0, 176, -1, -1, 0, 1, 5 },
-  { 0x1, 0x1, 176, -1, -1, 12, 1, 5 },
-  { 0x1, 0x1, 176, -1, -1, 33, 1, 5 },
-  { 0x200001, 0x200001, 176, -1, -1, 12, 1, 5 },
-  { 0x0, 0x0, 176, -1, -1, 0, 1, 5 },
-  { 0x1, 0x1, 176, -1, -1, 12, 1, 5 },
-  { 0x1, 0x1, 176, -1, -1, 33, 1, 5 },
-  { 0x200001, 0x200001, 176, -1, -1, 12, 1, 5 },
-  { 0x0, 0x0, 176, -1, -1, 0, 1, 5 },
-  { 0x1, 0x1, 176, -1, -1, 12, 1, 5 },
-  { 0x1, 0x1, 176, -1, -1, 33, 1, 5 },
-  { 0x200001, 0x200001, 176, -1, -1, 12, 1, 5 },
-  { 0x0, 0x0, 176, -1, -1, 0, 1, 5 },
-  { 0x1, 0x1, 176, -1, -1, 12, 1, 5 },
-  { 0x1, 0x1, 176, -1, -1, 33, 1, 5 },
-  { 0x200001, 0x200001, 176, -1, -1, 12, 1, 5 },
-  { 0x0, 0x0, 176, -1, -1, 0, 1, 5 },
-  { 0x1, 0x1, 176, -1, -1, 12, 1, 5 },
-  { 0x9, 0x9, 176, -1, -1, 33, 1, 5 },
-  { 0x1, 0x1, 176, 397, -1, 33, 1, 4 },
-  { 0x1200001, 0x1200001, 176, -1, -1, 12, 1, 5 },
-  { 0x200001, 0x200001, 176, 398, -1, 12, 1, 4 },
-  { 0x9, 0x9, 176, -1, -1, 33, 1, 5 },
-  { 0x1, 0x1, 176, 399, -1, 33, 1, 4 },
-  { 0x1200001, 0x1200001, 176, -1, -1, 12, 1, 5 },
-  { 0x200001, 0x200001, 176, 400, -1, 12, 1, 4 },
-  { 0x9, 0x9, 176, -1, -1, 33, 1, 80 },
-  { 0x1, 0x1, 176, 405, -1, 33, 1, 79 },
-  { 0x1200001, 0x1200001, 176, -1, -1, 12, 1, 80 },
-  { 0x200001, 0x200001, 176, 406, -1, 12, 1, 79 },
-  { 0x9, 0x9, 176, -1, -1, 33, 1, 80 },
-  { 0x1, 0x1, 176, 407, -1, 33, 1, 79 },
-  { 0x1200001, 0x1200001, 176, -1, -1, 12, 1, 80 },
-  { 0x200001, 0x200001, 176, 408, -1, 12, 1, 79 },
-  { 0x9, 0x9, 176, -1, -1, 33, 1, 5 },
-  { 0x1, 0x1, 176, 413, -1, 33, 1, 4 },
-  { 0x1200001, 0x1200001, 176, -1, -1, 12, 1, 5 },
-  { 0x200001, 0x200001, 176, 414, -1, 12, 1, 4 },
-  { 0x9, 0x9, 176, -1, -1, 33, 1, 5 },
-  { 0x1, 0x1, 176, 415, -1, 33, 1, 4 },
-  { 0x1200001, 0x1200001, 176, -1, -1, 12, 1, 5 },
-  { 0x200001, 0x200001, 176, 416, -1, 12, 1, 4 },
-  { 0x0, 0x0, 177, -1, 2327, 0, 0, -1 },
-  { 0x9, 0x9, 177, -1, 2335, 33, 1, 50 },
-  { 0x9, 0x9, 177, -1, 2993, 33, 1, 50 },
-  { 0x0, 0x0, 177, -1, 2380, 0, 0, -1 },
-  { 0x7, 0x7, 177, -1, -1, 27, 1, 50 },
-  { 0x1, 0x1, 197, -1, -1, 27, 1, 10 },
-  { 0x1, 0x1, 211, -1, -1, 29, 1, 0 },
-  { 0x1, 0x1, 211, -1, -1, 29, 1, 0 },
-  { 0x2, 0x3, 211, 1169, -1, 27, 1, 34 },
-  { 0x0, 0x0, 211, 1170, -1, 0, 1, 34 },
-  { 0x0, 0x0, 211, 1171, -1, 0, 1, 0 },
-  { 0x0, 0x0, 211, 1172, -1, 0, 1, 0 },
-  { 0x0, 0x0, 211, 1173, -1, 0, 1, 0 },
-  { 0x0, 0x0, 211, 1174, -1, 0, 1, 0 },
-  { 0x0, 0x0, 211, 3026, -1, 0, 1, 100 },
-  { 0x0, 0x0, 211, 3027, -1, 0, 1, 100 },
-  { 0x0, 0x0, 211, 3028, 967, 0, 0, -1 },
-  { 0x1, 0x1, 212, -1, -1, 27, 1, 0 },
-  { 0x1, 0x1, 212, -1, -1, 27, 1, 0 },
-  { 0x1, 0x1, 213, -1, 1426, 32, 1, 142 },
-  { 0x1, 0x1, 213, -1, 1428, 32, 1, 142 },
-  { 0x1, 0x1, 213, -1, 1430, 32, 1, 141 },
-  { 0x1, 0x1, 213, -1, 1432, 32, 1, 141 },
-  { 0x1, 0x1, 213, -1, 1434, 32, 1, 141 },
-  { 0x1, 0x1, 213, -1, 1436, 32, 1, 141 },
-  { 0x1, 0x1, 213, -1, 1438, 32, 1, 141 },
-  { 0x1, 0x1, 213, -1, 1440, 32, 1, 141 },
-  { 0x1, 0x1, 213, -1, 1442, 32, 1, 141 },
-  { 0x1, 0x1, 213, -1, 1444, 32, 1, 141 },
-  { 0x1, 0x1, 213, -1, 1446, 32, 1, 143 },
-  { 0x1, 0x1, 213, -1, 1448, 32, 1, 143 },
-  { 0x1, 0x1, 213, -1, 1965, 32, 1, 138 },
-  { 0x1, 0x1, 213, -1, 1967, 32, 1, 145 },
-  { 0x1, 0x1, 213, -1, 1969, 32, 1, 139 },
-  { 0x1, 0x1, 213, -1, 1971, 32, 1, 139 },
-  { 0x1, 0x1, 213, -1, 1973, 32, 1, 138 },
-  { 0x1, 0x1, 213, -1, 1975, 32, 1, 145 },
-  { 0x1, 0x1, 213, -1, 1977, 32, 1, 138 },
-  { 0x1, 0x1, 213, -1, 1979, 32, 1, 145 },
-  { 0x1, 0x1, 213, 2783, 1981, 32, 1, 138 },
-  { 0x1, 0x1, 213, 2784, 1984, 32, 1, 145 },
-  { 0x0, 0x0, 214, -1, 2825, 0, 0, -1 },
-  { 0x0, 0x0, 214, -1, 2826, 0, 0, -1 },
-  { 0x0, 0x0, 214, -1, 2851, 0, 0, -1 },
-  { 0x5, 0x5, 214, -1, 2854, 20, 1, 68 },
-  { 0x0, 0x0, 218, 2209, 966, 0, 0, -1 },
-  { 0x0, 0x0, 219, -1, 1139, 0, 0, -1 },
-  { 0x0, 0x0, 219, -1, 1264, 0, 0, -1 },
-  { 0x0, 0x0, 219, -1, -1, 0, 1, 128 },
-  { 0x0, 0x0, 219, -1, -1, 0, 1, 67 },
-  { 0x1, 0x1, 219, 833, 2289, 36, 1, 66 },
-  { 0x1, 0x1, 219, 834, 2348, 36, 1, 66 },
-  { 0x0, 0x0, 219, 835, 2351, 0, 0, -1 },
-  { 0x1, 0x1, 219, 836, -1, 36, 1, 66 },
-  { 0x0, 0x0, 219, 1423, -1, 0, 1, 34 },
-  { 0x1, 0x1, 219, 837, 2356, 36, 1, 66 },
-  { 0x0, 0x0, 219, 838, 2359, 0, 0, -1 },
-  { 0x1, 0x1, 219, 839, -1, 36, 1, 66 },
-  { 0x0, 0x0, 219, 840, 2362, 0, 0, -1 },
-  { 0x1, 0x1, 219, 841, -1, 36, 1, 66 },
-  { 0x1, 0x1, 219, 842, 2365, 36, 1, 66 },
-  { 0x1, 0x1, 219, 843, 2368, 36, 1, 66 },
-  { 0x0, 0x0, 219, 1424, -1, 0, 1, 34 },
-  { 0x1, 0x1, 219, 844, 2401, 36, 1, 66 },
-  { 0x1, 0x1, 219, 845, -1, 31, 1, 144 },
-  { 0x1, 0x1, 219, 228, 1449, 32, 1, 133 },
-  { 0x1, 0x1, 219, 229, 1458, 32, 1, 133 },
-  { 0x1, 0x1, 219, 230, 1467, 32, 1, 133 },
-  { 0x1, 0x1, 219, 231, 1480, 32, 1, 133 },
-  { 0x1, 0x1, 219, 232, 1489, 32, 1, 133 },
-  { 0x1, 0x1, 219, 233, 1498, 32, 1, 133 },
-  { 0x1, 0x1, 219, 234, 1507, 32, 1, 133 },
-  { 0x1, 0x1, 219, 235, 1516, 32, 1, 133 },
-  { 0x1, 0x1, 219, 236, 1525, 32, 1, 133 },
-  { 0x1, 0x1, 219, 237, 1534, 32, 1, 133 },
-  { 0x1, 0x1, 219, 238, 1544, 32, 1, 133 },
-  { 0x1, 0x1, 219, 239, 1554, 32, 1, 133 },
-  { 0x1, 0x1, 219, 240, 1567, 32, 1, 148 },
-  { 0x1, 0x1, 219, 241, 1573, 32, 1, 153 },
-  { 0x1, 0x1, 219, 242, 1579, 32, 1, 153 },
-  { 0x1, 0x1, 219, 243, 1585, 32, 1, 148 },
-  { 0x1, 0x1, 219, 244, 1591, 32, 1, 153 },
-  { 0x1, 0x1, 219, 245, 1597, 32, 1, 153 },
-  { 0x1, 0x1, 219, 246, 1603, 32, 1, 148 },
-  { 0x1, 0x1, 219, 247, 1609, 32, 1, 153 },
-  { 0x1, 0x1, 219, 248, 1615, 32, 1, 153 },
-  { 0x1, 0x1, 219, 249, 1621, 32, 1, 148 },
-  { 0x1, 0x1, 219, 250, 1627, 32, 1, 153 },
-  { 0x1, 0x1, 219, 251, 1633, 32, 1, 148 },
-  { 0x1, 0x1, 219, 252, 1639, 32, 1, 153 },
-  { 0x1, 0x1, 219, 253, 1645, 32, 1, 148 },
-  { 0x1, 0x1, 219, 254, 1651, 32, 1, 153 },
-  { 0x1, 0x1, 219, 255, 1657, 32, 1, 148 },
-  { 0x1, 0x1, 219, 256, 1663, 32, 1, 153 },
-  { 0x1, 0x1, 219, 257, 1669, 32, 1, 153 },
-  { 0x1, 0x1, 219, 849, -1, 31, 1, 160 },
-  { 0x0, 0x0, 220, 2404, -1, 0, 1, 66 },
-  { 0x0, 0x0, 220, 2405, -1, 0, 1, 29 },
-  { 0x0, 0x0, 220, 25, -1, 0, 1, 29 },
-  { 0x0, 0x0, 220, 2407, -1, 0, 1, 29 },
-  { 0x0, 0x0, 220, 2408, -1, 0, 1, 29 },
-  { 0x0, 0x0, 220, 2409, -1, 0, 1, 45 },
-  { 0x0, 0x0, 220, 2410, -1, 0, 1, 40 },
-  { 0x1, 0x1, 220, 2411, -1, 12, 1, 59 },
-  { 0x0, 0x0, 220, 2412, -1, 0, 1, 54 },
-  { 0x1000001, 0x1000001, 220, 2413, -1, 12, 1, 59 },
-  { 0x1, 0x1, 220, 2414, -1, 36, 1, 54 },
-  { 0x200001, 0x200001, 220, 2415, -1, 12, 1, 59 },
-  { 0x1, 0x1, 220, 2416, -1, 33, 1, 54 },
-  { 0x1200001, 0x1200001, 220, 2417, -1, 12, 1, 49 },
-  { 0x9, 0x9, 220, 2418, -1, 33, 1, 49 },
-  { 0x0, 0x0, 220, 2419, -1, 0, 1, 59 },
-  { 0x0, 0x0, 220, 2420, -1, 0, 1, 54 },
-  { 0x0, 0x0, 220, 2421, -1, 0, 1, 59 },
-  { 0x0, 0x0, 220, 2422, -1, 0, 1, 54 },
-  { 0x0, 0x0, 220, 2423, -1, 0, 1, 59 },
-  { 0x0, 0x0, 220, 2424, -1, 0, 1, 54 },
-  { 0x0, 0x0, 220, 2425, -1, 0, 1, 49 },
-  { 0x0, 0x0, 220, 2426, -1, 0, 1, 49 },
-  { 0x1, 0x1, 220, 2427, -1, 12, 1, 59 },
-  { 0x0, 0x0, 220, 2428, -1, 0, 1, 54 },
-  { 0x200001, 0x1200001, 220, 2429, -1, 12, 1, 59 },
-  { 0x1, 0x9, 220, 2430, -1, 33, 1, 54 },
-  { 0x0, 0x0, 220, 2431, -1, 0, 1, 59 },
-  { 0x0, 0x0, 220, 2432, -1, 0, 1, 54 },
-  { 0x0, 0x0, 220, 2433, -1, 0, 1, 59 },
-  { 0x0, 0x0, 220, 2434, -1, 0, 1, 54 },
-  { 0x1, 0x1, 220, 2435, -1, 12, 1, 59 },
-  { 0x0, 0x0, 220, 2436, -1, 0, 1, 54 },
-  { 0x1000001, 0x1000001, 220, 2437, -1, 12, 1, 59 },
-  { 0x1, 0x1, 220, 2438, -1, 36, 1, 54 },
-  { 0x200001, 0x200001, 220, 2439, -1, 12, 1, 59 },
-  { 0x1, 0x1, 220, 2440, -1, 33, 1, 54 },
-  { 0x1200001, 0x1200001, 220, 2441, -1, 12, 1, 49 },
-  { 0x9, 0x9, 220, 2442, -1, 33, 1, 49 },
-  { 0x0, 0x0, 220, 2443, -1, 0, 1, 59 },
-  { 0x0, 0x0, 220, 2444, -1, 0, 1, 54 },
-  { 0x0, 0x0, 220, 2445, -1, 0, 1, 59 },
-  { 0x0, 0x0, 220, 2446, -1, 0, 1, 54 },
-  { 0x0, 0x0, 220, 2447, -1, 0, 1, 59 },
-  { 0x0, 0x0, 220, 2448, -1, 0, 1, 54 },
-  { 0x0, 0x0, 220, 2449, -1, 0, 1, 49 },
-  { 0x0, 0x0, 220, 2450, -1, 0, 1, 49 },
-  { 0x1, 0x1, 220, 2451, -1, 12, 1, 59 },
-  { 0x0, 0x0, 220, 2452, -1, 0, 1, 54 },
-  { 0x200001, 0x1200001, 220, 2453, -1, 12, 1, 59 },
-  { 0x1, 0x9, 220, 2454, -1, 33, 1, 54 },
-  { 0x0, 0x0, 220, 2455, -1, 0, 1, 59 },
-  { 0x0, 0x0, 220, 2456, -1, 0, 1, 54 },
-  { 0x0, 0x0, 220, 2457, -1, 0, 1, 59 },
-  { 0x0, 0x0, 220, 2458, -1, 0, 1, 54 },
-  { 0x1, 0x1, 220, 2459, -1, 28, 1, 29 },
-  { 0x0, 0x0, 220, 2460, -1, 0, 1, 29 },
-  { 0x3, 0x3, 220, 2461, -1, 27, 1, 29 },
-  { 0x1, 0x1, 220, 2462, -1, 27, 1, 29 },
-  { 0x0, 0x0, 220, 2463, -1, 0, 1, 66 },
-  { 0x0, 0x0, 220, 2464, -1, 0, 1, 29 },
-  { 0x0, 0x0, 220, 2465, -1, 0, 1, 29 },
-  { 0x1, 0x1, 220, 2466, -1, 36, 1, 66 },
-  { 0x1, 0x1, 220, 2467, -1, 37, 1, 29 },
-  { 0x0, 0x0, 220, 2468, -1, 0, 1, 29 },
-  { 0x0, 0x0, 220, 2469, -1, 0, 1, 29 },
-  { 0x0, 0x0, 220, 2470, -1, 0, 1, 29 },
-  { 0x0, 0x0, 220, 2471, -1, 0, 1, 66 },
-  { 0x0, 0x0, 220, 2472, -1, 0, 1, 29 },
-  { 0x0, 0x0, 220, 37, -1, 0, 1, 29 },
-  { 0x1, 0x1, 220, 2474, -1, 36, 1, 66 },
-  { 0x1, 0x1, 220, 2475, -1, 37, 1, 29 },
-  { 0x0, 0x0, 220, 2476, -1, 0, 1, 29 },
-  { 0x1, 0x1, 220, 2477, -1, 36, 1, 66 },
-  { 0x1, 0x1, 220, 2478, -1, 37, 1, 29 },
-  { 0x0, 0x0, 220, 2479, -1, 0, 1, 29 },
-  { 0x0, 0x0, 220, 2480, -1, 0, 1, 66 },
-  { 0x0, 0x0, 220, 2481, -1, 0, 1, 29 },
-  { 0x0, 0x0, 220, 42, -1, 0, 1, 29 },
-  { 0x0, 0x0, 220, 2483, -1, 0, 1, 66 },
-  { 0x0, 0x0, 220, 2484, -1, 0, 1, 29 },
-  { 0x0, 0x0, 220, 43, -1, 0, 1, 29 },
-  { 0x0, 0x0, 220, 2486, -1, 0, 1, 29 },
-  { 0x0, 0x0, 220, 2487, -1, 0, 1, 29 },
-  { 0x0, 0x0, 220, 2488, -1, 0, 1, 49 },
-  { 0x1, 0x1, 220, 2489, -1, 27, 1, 49 },
-  { 0x1, 0x1, 220, 2490, -1, 28, 1, 49 },
-  { 0x3, 0x3, 220, 2491, -1, 27, 1, 49 },
-  { 0x1, 0x1, 220, 2492, -1, 29, 1, 49 },
-  { 0x5, 0x5, 220, 2493, -1, 27, 1, 49 },
-  { 0x3, 0x3, 220, 2494, -1, 28, 1, 49 },
-  { 0x7, 0x7, 220, 2495, -1, 27, 1, 49 },
-  { 0x0, 0x0, 220, 2496, -1, 0, 1, 49 },
-  { 0x0, 0x0, 220, 2497, -1, 0, 1, 49 },
-  { 0x0, 0x0, 220, 2498, -1, 0, 1, 49 },
-  { 0x0, 0x0, 220, 2499, -1, 0, 1, 49 },
-  { 0x1, 0x1, 220, 2500, -1, 28, 1, 29 },
-  { 0x0, 0x0, 220, 2501, -1, 0, 1, 29 },
-  { 0x3, 0x3, 220, 2502, -1, 27, 1, 29 },
-  { 0x1, 0x1, 220, 2503, -1, 27, 1, 29 },
-  { 0x0, 0x0, 220, 2504, -1, 0, 1, 29 },
-  { 0x0, 0x0, 220, 2505, -1, 0, 1, 29 },
-  { 0x0, 0x0, 220, 2506, -1, 0, 1, 29 },
-  { 0x0, 0x0, 220, 52, -1, 0, 1, 29 },
-  { 0x0, 0x0, 220, 2508, -1, 0, 1, 29 },
-  { 0x0, 0x0, 220, 2509, -1, 0, 1, 29 },
-  { 0x0, 0x0, 220, 57, -1, 0, 1, 29 },
-  { 0x0, 0x0, 220, 2511, -1, 0, 1, 24 },
-  { 0x0, 0x0, 220, 2512, -1, 0, 1, 24 },
-  { 0x0, 0x0, 220, 2513, -1, 0, 1, 24 },
-  { 0x0, 0x0, 220, 2514, -1, 0, 1, 24 },
-  { 0x0, 0x0, 220, 2515, -1, 0, 1, 35 },
-  { 0x0, 0x0, 220, 2516, -1, 0, 1, 66 },
-  { 0x0, 0x0, 220, 2517, -1, 0, 1, 29 },
-  { 0x0, 0x0, 220, 64, -1, 0, 1, 29 },
-  { 0x1, 0x1, 221, 2519, -1, 34, 1, 66 },
-  { 0x1, 0x1, 221, 2520, -1, 34, 1, 31 },
-  { 0x1, 0x1, 221, 2521, -1, 34, 1, 31 },
-  { 0x1, 0x1, 221, 2522, -1, 34, 1, 31 },
-  { 0x1, 0x1, 221, 2523, -1, 34, 1, 31 },
-  { 0x1, 0x1, 221, 2524, -1, 34, 1, 46 },
-  { 0x1, 0x1, 221, 2525, -1, 34, 1, 42 },
-  { 0x400001, 0x400001, 221, 2526, -1, 12, 1, 61 },
-  { 0x1, 0x1, 221, 2527, -1, 34, 1, 56 },
-  { 0x1400001, 0x1400001, 221, 2528, -1, 12, 1, 61 },
-  { 0x5, 0x5, 221, 2529, -1, 34, 1, 56 },
-  { 0x600001, 0x600001, 221, 2530, -1, 12, 1, 61 },
-  { 0x3, 0x3, 221, 2531, -1, 33, 1, 56 },
-  { 0x1600001, 0x1600001, 221, 2532, -1, 12, 1, 51 },
-  { 0xb, 0xb, 221, 2533, -1, 33, 1, 51 },
-  { 0x1, 0x1, 221, 2534, -1, 34, 1, 61 },
-  { 0x1, 0x1, 221, 2535, -1, 34, 1, 56 },
-  { 0x1, 0x1, 221, 2536, -1, 34, 1, 61 },
-  { 0x1, 0x1, 221, 2537, -1, 34, 1, 56 },
-  { 0x1, 0x1, 221, 2538, -1, 34, 1, 61 },
-  { 0x1, 0x1, 221, 2539, -1, 34, 1, 56 },
-  { 0x1, 0x1, 221, 2540, -1, 34, 1, 51 },
-  { 0x1, 0x1, 221, 2541, -1, 34, 1, 51 },
-  { 0x400001, 0x400001, 221, 2542, -1, 12, 1, 61 },
-  { 0x1, 0x1, 221, 2543, -1, 34, 1, 56 },
-  { 0x600001, 0x1600001, 221, 2544, -1, 12, 1, 61 },
-  { 0x3, 0xb, 221, 2545, -1, 33, 1, 56 },
-  { 0x1, 0x1, 221, 2546, -1, 34, 1, 61 },
-  { 0x1, 0x1, 221, 2547, -1, 34, 1, 56 },
-  { 0x1, 0x1, 221, 2548, -1, 34, 1, 61 },
-  { 0x1, 0x1, 221, 2549, -1, 34, 1, 56 },
-  { 0x400001, 0x400001, 221, 2550, -1, 12, 1, 61 },
-  { 0x1, 0x1, 221, 2551, -1, 34, 1, 56 },
-  { 0x1400001, 0x1400001, 221, 2552, -1, 12, 1, 61 },
-  { 0x5, 0x5, 221, 2553, -1, 34, 1, 56 },
-  { 0x600001, 0x600001, 221, 2554, -1, 12, 1, 61 },
-  { 0x3, 0x3, 221, 2555, -1, 33, 1, 56 },
-  { 0x1600001, 0x1600001, 221, 2556, -1, 12, 1, 51 },
-  { 0xb, 0xb, 221, 2557, -1, 33, 1, 51 },
-  { 0x1, 0x1, 221, 2558, -1, 34, 1, 61 },
-  { 0x1, 0x1, 221, 2559, -1, 34, 1, 56 },
-  { 0x1, 0x1, 221, 2560, -1, 34, 1, 61 },
-  { 0x1, 0x1, 221, 2561, -1, 34, 1, 56 },
-  { 0x1, 0x1, 221, 2562, -1, 34, 1, 61 },
-  { 0x1, 0x1, 221, 2563, -1, 34, 1, 56 },
-  { 0x1, 0x1, 221, 2564, -1, 34, 1, 51 },
-  { 0x1, 0x1, 221, 2565, -1, 34, 1, 51 },
-  { 0x400001, 0x400001, 221, 2566, -1, 12, 1, 61 },
-  { 0x1, 0x1, 221, 2567, -1, 34, 1, 56 },
-  { 0x600001, 0x1600001, 221, 2568, -1, 12, 1, 61 },
-  { 0x3, 0xb, 221, 2569, -1, 33, 1, 56 },
-  { 0x1, 0x1, 221, 2570, -1, 34, 1, 61 },
-  { 0x1, 0x1, 221, 2571, -1, 34, 1, 56 },
-  { 0x1, 0x1, 221, 2572, -1, 34, 1, 61 },
-  { 0x1, 0x1, 221, 2573, -1, 34, 1, 56 },
-  { 0x41, 0x41, 221, 2574, -1, 28, 1, 31 },
-  { 0x1, 0x1, 221, 2575, -1, 34, 1, 31 },
-  { 0x83, 0x83, 221, 2576, -1, 27, 1, 31 },
-  { 0x81, 0x81, 221, 2577, -1, 27, 1, 31 },
-  { 0x1, 0x1, 221, 2578, -1, 34, 1, 66 },
-  { 0x1, 0x1, 221, 2579, -1, 34, 1, 31 },
-  { 0x1, 0x1, 221, 2580, -1, 34, 1, 31 },
-  { 0x5, 0x5, 221, 2581, -1, 34, 1, 66 },
-  { 0x9, 0x9, 221, 2582, -1, 34, 1, 31 },
-  { 0x1, 0x1, 221, 2583, -1, 34, 1, 31 },
-  { 0x1, 0x1, 221, 2584, -1, 34, 1, 31 },
-  { 0x1, 0x1, 221, 2585, -1, 34, 1, 31 },
-  { 0x1, 0x1, 221, 2586, -1, 34, 1, 66 },
-  { 0x1, 0x1, 221, 2587, -1, 34, 1, 31 },
-  { 0x1, 0x1, 221, 2588, -1, 34, 1, 31 },
-  { 0x5, 0x5, 221, 2589, -1, 34, 1, 66 },
-  { 0x9, 0x9, 221, 2590, -1, 34, 1, 31 },
-  { 0x1, 0x1, 221, 2591, -1, 34, 1, 31 },
-  { 0x5, 0x5, 221, 2592, -1, 34, 1, 66 },
-  { 0x9, 0x9, 221, 2593, -1, 34, 1, 31 },
-  { 0x1, 0x1, 221, 2594, -1, 34, 1, 31 },
-  { 0x1, 0x1, 221, 2595, -1, 34, 1, 66 },
-  { 0x1, 0x1, 221, 2596, -1, 34, 1, 31 },
-  { 0x1, 0x1, 221, 2597, -1, 34, 1, 31 },
-  { 0x1, 0x1, 221, 2598, -1, 34, 1, 66 },
-  { 0x1, 0x1, 221, 2599, -1, 34, 1, 31 },
-  { 0x1, 0x1, 221, 2600, -1, 34, 1, 31 },
-  { 0x1, 0x1, 221, 2601, -1, 34, 1, 31 },
-  { 0x1, 0x1, 221, 2602, -1, 34, 1, 31 },
-  { 0x1, 0x1, 221, 2603, -1, 34, 1, 51 },
-  { 0x81, 0x81, 221, 2604, -1, 27, 1, 51 },
-  { 0x41, 0x41, 221, 2605, -1, 28, 1, 51 },
-  { 0x83, 0x83, 221, 2606, -1, 27, 1, 51 },
-  { 0x21, 0x21, 221, 2607, -1, 29, 1, 51 },
-  { 0x85, 0x85, 221, 2608, -1, 27, 1, 51 },
-  { 0x43, 0x43, 221, 2609, -1, 28, 1, 51 },
-  { 0x87, 0x87, 221, 2610, -1, 27, 1, 51 },
-  { 0x1, 0x1, 221, 2611, -1, 34, 1, 51 },
-  { 0x1, 0x1, 221, 2612, -1, 34, 1, 51 },
-  { 0x1, 0x1, 221, 2613, -1, 34, 1, 51 },
-  { 0x1, 0x1, 221, 2614, -1, 34, 1, 51 },
-  { 0x41, 0x41, 221, 2615, -1, 28, 1, 31 },
-  { 0x1, 0x1, 221, 2616, -1, 34, 1, 31 },
-  { 0x83, 0x83, 221, 2617, -1, 27, 1, 31 },
-  { 0x81, 0x81, 221, 2618, -1, 27, 1, 31 },
-  { 0x1, 0x1, 221, 2619, -1, 34, 1, 31 },
-  { 0x1, 0x1, 221, 2620, -1, 34, 1, 31 },
-  { 0x1, 0x1, 221, 2621, -1, 34, 1, 31 },
-  { 0x1, 0x1, 221, 2622, -1, 34, 1, 31 },
-  { 0x1, 0x1, 221, 2623, -1, 34, 1, 31 },
-  { 0x1, 0x1, 221, 2624, -1, 34, 1, 31 },
-  { 0x1, 0x1, 221, 2625, -1, 34, 1, 31 },
-  { 0x1, 0x1, 221, 2626, -1, 34, 1, 26 },
-  { 0x1, 0x1, 221, 2627, -1, 34, 1, 26 },
-  { 0x1, 0x1, 221, 2628, -1, 34, 1, 26 },
-  { 0x1, 0x1, 221, 2629, -1, 34, 1, 26 },
-  { 0x1, 0x1, 221, 2630, -1, 34, 1, 37 },
-  { 0x1, 0x1, 221, 2631, -1, 34, 1, 66 },
-  { 0x1, 0x1, 221, 2632, -1, 34, 1, 31 },
-  { 0x1, 0x1, 221, 2633, -1, 34, 1, 31 },
-  { 0x1, 0x1, 222, 2634, -1, 35, 1, 66 },
-  { 0x1, 0x1, 222, 2635, -1, 35, 1, 32 },
-  { 0x1, 0x1, 222, 2636, -1, 35, 1, 32 },
-  { 0x1, 0x1, 222, 2637, -1, 35, 1, 32 },
-  { 0x1, 0x1, 222, 2638, -1, 35, 1, 32 },
-  { 0x1, 0x1, 222, 2639, -1, 35, 1, 47 },
-  { 0x1, 0x1, 222, 2640, -1, 35, 1, 43 },
-  { 0x800001, 0x800001, 222, 2641, -1, 12, 1, 62 },
-  { 0x1, 0x1, 222, 2642, -1, 35, 1, 57 },
-  { 0x1800001, 0x1800001, 222, 2643, -1, 12, 1, 62 },
-  { 0x3, 0x3, 222, 2644, -1, 35, 1, 57 },
-  { 0xa00001, 0xa00001, 222, 2645, -1, 12, 1, 62 },
-  { 0x5, 0x5, 222, 2646, -1, 33, 1, 57 },
-  { 0x1a00001, 0x1a00001, 222, 2647, -1, 12, 1, 52 },
-  { 0xd, 0xd, 222, 2648, -1, 33, 1, 52 },
-  { 0x1, 0x1, 222, 2649, -1, 35, 1, 62 },
-  { 0x1, 0x1, 222, 2650, -1, 35, 1, 57 },
-  { 0x1, 0x1, 222, 2651, -1, 35, 1, 62 },
-  { 0x1, 0x1, 222, 2652, -1, 35, 1, 57 },
-  { 0x1, 0x1, 222, 2653, -1, 35, 1, 62 },
-  { 0x1, 0x1, 222, 2654, -1, 35, 1, 57 },
-  { 0x1, 0x1, 222, 2655, -1, 35, 1, 52 },
-  { 0x1, 0x1, 222, 2656, -1, 35, 1, 52 },
-  { 0x800001, 0x800001, 222, 2657, -1, 12, 1, 62 },
-  { 0x1, 0x1, 222, 2658, -1, 35, 1, 57 },
-  { 0xa00001, 0x1a00001, 222, 2659, -1, 12, 1, 62 },
-  { 0x5, 0xd, 222, 2660, -1, 33, 1, 57 },
-  { 0x1, 0x1, 222, 2661, -1, 35, 1, 62 },
-  { 0x1, 0x1, 222, 2662, -1, 35, 1, 57 },
-  { 0x1, 0x1, 222, 2663, -1, 35, 1, 62 },
-  { 0x1, 0x1, 222, 2664, -1, 35, 1, 57 },
-  { 0x800001, 0x800001, 222, 2665, -1, 12, 1, 62 },
-  { 0x1, 0x1, 222, 2666, -1, 35, 1, 57 },
-  { 0x1800001, 0x1800001, 222, 2667, -1, 12, 1, 62 },
-  { 0x3, 0x3, 222, 2668, -1, 35, 1, 57 },
-  { 0xa00001, 0xa00001, 222, 2669, -1, 12, 1, 62 },
-  { 0x5, 0x5, 222, 2670, -1, 33, 1, 57 },
-  { 0x1a00001, 0x1a00001, 222, 2671, -1, 12, 1, 52 },
-  { 0xd, 0xd, 222, 2672, -1, 33, 1, 52 },
-  { 0x1, 0x1, 222, 2673, -1, 35, 1, 62 },
-  { 0x1, 0x1, 222, 2674, -1, 35, 1, 57 },
-  { 0x1, 0x1, 222, 2675, -1, 35, 1, 62 },
-  { 0x1, 0x1, 222, 2676, -1, 35, 1, 57 },
-  { 0x1, 0x1, 222, 2677, -1, 35, 1, 62 },
-  { 0x1, 0x1, 222, 2678, -1, 35, 1, 57 },
-  { 0x1, 0x1, 222, 2679, -1, 35, 1, 52 },
-  { 0x1, 0x1, 222, 2680, -1, 35, 1, 52 },
-  { 0x800001, 0x800001, 222, 2681, -1, 12, 1, 62 },
-  { 0x1, 0x1, 222, 2682, -1, 35, 1, 57 },
-  { 0xa00001, 0x1a00001, 222, 2683, -1, 12, 1, 62 },
-  { 0x5, 0xd, 222, 2684, -1, 33, 1, 57 },
-  { 0x1, 0x1, 222, 2685, -1, 35, 1, 62 },
-  { 0x1, 0x1, 222, 2686, -1, 35, 1, 57 },
-  { 0x1, 0x1, 222, 2687, -1, 35, 1, 62 },
-  { 0x1, 0x1, 222, 2688, -1, 35, 1, 57 },
-  { 0x81, 0x81, 222, 2689, -1, 28, 1, 32 },
-  { 0x1, 0x1, 222, 2690, -1, 35, 1, 32 },
-  { 0x103, 0x103, 222, 2691, -1, 27, 1, 32 },
-  { 0x101, 0x101, 222, 2692, -1, 27, 1, 32 },
-  { 0x1, 0x1, 222, 2693, -1, 35, 1, 66 },
-  { 0x1, 0x1, 222, 2694, -1, 35, 1, 32 },
-  { 0x1, 0x1, 222, 2695, -1, 35, 1, 32 },
-  { 0x3, 0x3, 222, 2696, -1, 35, 1, 66 },
-  { 0x5, 0x5, 222, 2697, -1, 35, 1, 32 },
-  { 0x1, 0x1, 222, 2698, -1, 35, 1, 32 },
-  { 0x1, 0x1, 222, 2699, -1, 35, 1, 32 },
-  { 0x1, 0x1, 222, 2700, -1, 35, 1, 32 },
-  { 0x1, 0x1, 222, 2701, -1, 35, 1, 66 },
-  { 0x1, 0x1, 222, 2702, -1, 35, 1, 32 },
-  { 0x1, 0x1, 222, 2703, -1, 35, 1, 32 },
-  { 0x3, 0x3, 222, 2704, -1, 35, 1, 66 },
-  { 0x5, 0x5, 222, 2705, -1, 35, 1, 32 },
-  { 0x1, 0x1, 222, 2706, -1, 35, 1, 32 },
-  { 0x3, 0x3, 222, 2707, -1, 35, 1, 66 },
-  { 0x5, 0x5, 222, 2708, -1, 35, 1, 32 },
-  { 0x1, 0x1, 222, 2709, -1, 35, 1, 32 },
-  { 0x1, 0x1, 222, 2710, -1, 35, 1, 66 },
-  { 0x1, 0x1, 222, 2711, -1, 35, 1, 32 },
-  { 0x1, 0x1, 222, 2712, -1, 35, 1, 32 },
-  { 0x1, 0x1, 222, 2713, -1, 35, 1, 66 },
-  { 0x1, 0x1, 222, 2714, -1, 35, 1, 32 },
-  { 0x1, 0x1, 222, 2715, -1, 35, 1, 32 },
-  { 0x1, 0x1, 222, 2716, -1, 35, 1, 32 },
-  { 0x1, 0x1, 222, 2717, -1, 35, 1, 32 },
-  { 0x1, 0x1, 222, 2718, -1, 35, 1, 52 },
-  { 0x101, 0x101, 222, 2719, -1, 27, 1, 52 },
-  { 0x81, 0x81, 222, 2720, -1, 28, 1, 52 },
-  { 0x103, 0x103, 222, 2721, -1, 27, 1, 52 },
-  { 0x41, 0x41, 222, 2722, -1, 29, 1, 52 },
-  { 0x105, 0x105, 222, 2723, -1, 27, 1, 52 },
-  { 0x83, 0x83, 222, 2724, -1, 28, 1, 52 },
-  { 0x107, 0x107, 222, 2725, -1, 27, 1, 52 },
-  { 0x1, 0x1, 222, 2726, -1, 35, 1, 52 },
-  { 0x1, 0x1, 222, 2727, -1, 35, 1, 52 },
-  { 0x1, 0x1, 222, 2728, -1, 35, 1, 52 },
-  { 0x1, 0x1, 222, 2729, -1, 35, 1, 52 },
-  { 0x81, 0x81, 222, 2730, -1, 28, 1, 32 },
-  { 0x1, 0x1, 222, 2731, -1, 35, 1, 32 },
-  { 0x103, 0x103, 222, 2732, -1, 27, 1, 32 },
-  { 0x101, 0x101, 222, 2733, -1, 27, 1, 32 },
-  { 0x1, 0x1, 222, 2734, -1, 35, 1, 32 },
-  { 0x1, 0x1, 222, 2735, -1, 35, 1, 32 },
-  { 0x1, 0x1, 222, 2736, -1, 35, 1, 32 },
-  { 0x1, 0x1, 222, 2737, -1, 35, 1, 32 },
-  { 0x1, 0x1, 222, 2738, -1, 35, 1, 32 },
-  { 0x1, 0x1, 222, 2739, -1, 35, 1, 32 },
-  { 0x1, 0x1, 222, 2740, -1, 35, 1, 32 },
-  { 0x1, 0x1, 222, 2741, -1, 35, 1, 27 },
-  { 0x1, 0x1, 222, 2742, -1, 35, 1, 27 },
-  { 0x1, 0x1, 222, 2743, -1, 35, 1, 27 },
-  { 0x1, 0x1, 222, 2744, -1, 35, 1, 27 },
-  { 0x1, 0x1, 222, 2745, -1, 35, 1, 38 },
-  { 0x1, 0x1, 222, 2746, -1, 35, 1, 66 },
-  { 0x1, 0x1, 222, 2747, -1, 35, 1, 32 },
-  { 0x1, 0x1, 222, 2748, -1, 35, 1, 32 },
-  { 0x3, 0x3, 223, -1, -1, 34, 1, 66 },
-  { 0x3, 0x3, 223, -1, -1, 34, 1, 33 },
-  { 0x3, 0x3, 223, 2243, -1, 34, 1, 33 },
-  { 0x3, 0x3, 223, -1, -1, 34, 1, 33 },
-  { 0x3, 0x3, 223, -1, -1, 34, 1, 33 },
-  { 0x3, 0x3, 223, -1, -1, 34, 1, 48 },
-  { 0x3, 0x3, 223, -1, -1, 34, 1, 44 },
-  { 0xc00001, 0xc00001, 223, -1, -1, 12, 1, 63 },
-  { 0x3, 0x3, 223, 2964, -1, 34, 1, 58 },
-  { 0x1c00001, 0x1c00001, 223, -1, -1, 12, 1, 63 },
-  { 0x7, 0x7, 223, 2965, -1, 34, 1, 58 },
-  { 0xe00001, 0xe00001, 223, -1, -1, 12, 1, 63 },
-  { 0x7, 0x7, 223, 2966, -1, 33, 1, 58 },
-  { 0x1e00001, 0x1e00001, 223, -1, -1, 12, 1, 53 },
-  { 0xf, 0xf, 223, 2967, -1, 33, 1, 53 },
-  { 0x3, 0x3, 223, -1, -1, 34, 1, 63 },
-  { 0x3, 0x3, 223, 2968, -1, 34, 1, 58 },
-  { 0x3, 0x3, 223, -1, -1, 34, 1, 63 },
-  { 0x3, 0x3, 223, 2969, -1, 34, 1, 58 },
-  { 0x3, 0x3, 223, -1, -1, 34, 1, 63 },
-  { 0x3, 0x3, 223, 2970, -1, 34, 1, 58 },
-  { 0x3, 0x3, 223, -1, -1, 34, 1, 53 },
-  { 0x3, 0x3, 223, 2971, -1, 34, 1, 53 },
-  { 0xc00001, 0xc00001, 223, -1, -1, 12, 1, 63 },
-  { 0x3, 0x3, 223, 2976, -1, 34, 1, 58 },
-  { 0xe00001, 0x1e00001, 223, -1, -1, 12, 1, 63 },
-  { 0x7, 0xf, 223, 2977, -1, 33, 1, 58 },
-  { 0x3, 0x3, 223, -1, -1, 34, 1, 63 },
-  { 0x3, 0x3, 223, 2978, -1, 34, 1, 58 },
-  { 0x3, 0x3, 223, -1, -1, 34, 1, 63 },
-  { 0x3, 0x3, 223, 2979, -1, 34, 1, 58 },
-  { 0xc00001, 0xc00001, 223, -1, -1, 12, 1, 63 },
-  { 0x3, 0x3, 223, 2982, -1, 34, 1, 58 },
-  { 0x1c00001, 0x1c00001, 223, -1, -1, 12, 1, 63 },
-  { 0x7, 0x7, 223, 2983, -1, 34, 1, 58 },
-  { 0xe00001, 0xe00001, 223, -1, -1, 12, 1, 63 },
-  { 0x7, 0x7, 223, 2984, -1, 33, 1, 58 },
-  { 0x1e00001, 0x1e00001, 223, -1, -1, 12, 1, 53 },
-  { 0xf, 0xf, 223, 2985, -1, 33, 1, 53 },
-  { 0x3, 0x3, 223, -1, -1, 34, 1, 63 },
-  { 0x3, 0x3, 223, 2986, -1, 34, 1, 58 },
-  { 0x3, 0x3, 223, -1, -1, 34, 1, 63 },
-  { 0x3, 0x3, 223, 2987, -1, 34, 1, 58 },
-  { 0x3, 0x3, 223, -1, -1, 34, 1, 63 },
-  { 0x3, 0x3, 223, 2988, -1, 34, 1, 58 },
-  { 0x3, 0x3, 223, -1, -1, 34, 1, 53 },
-  { 0x3, 0x3, 223, 2989, -1, 34, 1, 53 },
-  { 0xc00001, 0xc00001, 223, -1, -1, 12, 1, 63 },
-  { 0x3, 0x3, 223, 2994, -1, 34, 1, 58 },
-  { 0xe00001, 0x1e00001, 223, -1, -1, 12, 1, 63 },
-  { 0x7, 0xf, 223, 2995, -1, 33, 1, 58 },
-  { 0x3, 0x3, 223, -1, -1, 34, 1, 63 },
-  { 0x3, 0x3, 223, 2996, -1, 34, 1, 58 },
-  { 0x3, 0x3, 223, -1, -1, 34, 1, 63 },
-  { 0x3, 0x3, 223, 2997, -1, 34, 1, 58 },
-  { 0xc1, 0xc1, 223, -1, -1, 28, 1, 33 },
-  { 0x3, 0x3, 223, 2862, -1, 34, 1, 33 },
-  { 0x183, 0x183, 223, -1, -1, 27, 1, 33 },
-  { 0x181, 0x181, 223, 2863, -1, 27, 1, 33 },
-  { 0x3, 0x3, 223, -1, -1, 34, 1, 66 },
-  { 0x3, 0x3, 223, -1, -1, 34, 1, 33 },
-  { 0x3, 0x3, 223, 2244, -1, 34, 1, 33 },
-  { 0x7, 0x7, 223, -1, -1, 34, 1, 66 },
-  { 0xb, 0xb, 223, -1, -1, 34, 1, 33 },
-  { 0x3, 0x3, 223, 2245, -1, 34, 1, 33 },
-  { 0x3, 0x3, 223, -1, -1, 34, 1, 33 },
-  { 0x3, 0x3, 223, -1, -1, 34, 1, 33 },
-  { 0x3, 0x3, 223, -1, -1, 34, 1, 66 },
-  { 0x3, 0x3, 223, -1, -1, 34, 1, 33 },
-  { 0x3, 0x3, 223, 2248, -1, 34, 1, 33 },
-  { 0x7, 0x7, 223, -1, -1, 34, 1, 66 },
-  { 0xb, 0xb, 223, -1, -1, 34, 1, 33 },
-  { 0x3, 0x3, 223, 2249, -1, 34, 1, 33 },
-  { 0x7, 0x7, 223, -1, -1, 34, 1, 66 },
-  { 0xb, 0xb, 223, -1, -1, 34, 1, 33 },
-  { 0x3, 0x3, 223, 2251, -1, 34, 1, 33 },
-  { 0x3, 0x3, 223, -1, -1, 34, 1, 66 },
-  { 0x3, 0x3, 223, -1, -1, 34, 1, 33 },
-  { 0x3, 0x3, 223, 2253, -1, 34, 1, 33 },
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-  { 0x0, 0x0, 265, -1, 2303, 0, 0, -1 },
-  { 0x9, 0x9, 265, -1, 2311, 33, 1, 50 },
-  { 0x9, 0x9, 265, -1, 2975, 33, 1, 50 },
-  { 0x0, 0x0, 265, 1399, 2376, 0, 0, -1 },
-  { 0x3, 0x3, 265, 1400, -1, 27, 1, 50 },
-  { 0x0, 0x0, 269, 2856, -1, 0, 1, 0 },
-  { 0x3, 0x3, 270, -1, -1, 27, 1, 0 },
-  { 0x3, 0x3, 270, -1, -1, 27, 1, 0 },
-  { 0x3, 0x3, 270, -1, -1, 27, 1, 0 },
-  { 0x3, 0x3, 270, -1, -1, 27, 1, 0 },
-  { 0x1, 0x1, 271, 3018, -1, 28, 1, 0 },
-  { 0x1, 0x1, 271, 3019, -1, 28, 1, 0 },
-  { 0x1, 0x1, 271, 3020, -1, 28, 1, 0 },
-  { 0x1, 0x1, 271, 3021, -1, 28, 1, 0 },
-  { 0x1, 0x1, 273, -1, -1, 27, 1, 100 },
-  { 0x1, 0x1, 273, -1, -1, 27, 1, 100 },
-  { 0x0, 0x0, 273, -1, 968, 0, 0, -1 },
-  { 0x0, 0x0, 274, 3031, 2833, 0, 0, -1 },
-  { 0x0, 0x0, 274, 3032, 2835, 0, 0, -1 },
-  { 0x0, 0x0, 275, -1, 2834, 0, 0, -1 },
-  { 0x0, 0x0, 275, -1, 2836, 0, 0, -1 },
-  { 0x0, 0x0, 276, -1, -1, 0, 1, 41 },
-  { 0x0, 0x0, 276, -1, -1, 0, 1, 41 },
-  { 0x0, 0x0, 276, -1, -1, 0, 1, 41 },
-  { 0x0, 0x0, 281, -1, -1, 0, 1, 34 },
-  { 0x0, 0x0, 285, -1, 2350, 0, 1, 30 },
-  { 0x0, 0x0, 286, -1, -1, 0, 1, 0 },
-  { 0x0, 0x0, 286, -1, -1, 0, 1, 72 },
-  { 0x0, 0x0, 286, 2001, 3000, 0, 1, 1 },
-  { 0x0, 0x0, 286, 2002, 3001, 0, 1, 1 },
-  { 0x0, 0x0, 286, -1, 518, 0, 0, -1 },
-  { 0x0, 0x0, 286, -1, 520, 0, 0, -1 },
-  { 0x0, 0x0, 286, 2005, 3004, 0, 1, 76 },
-  { 0x0, 0x0, 286, 2006, 3005, 0, 1, 76 },
-  { 0x0, 0x0, 286, -1, 526, 0, 0, -1 },
-  { 0x0, 0x0, 286, -1, 528, 0, 0, -1 },
-  { 0x0, 0x0, 286, 2009, 3008, 0, 1, 1 },
-  { 0x0, 0x0, 286, 2010, 3009, 0, 1, 1 },
-  { 0x0, 0x0, 286, -1, 534, 0, 0, -1 },
-  { 0x0, 0x0, 286, -1, 536, 0, 0, -1 },
-};
-
-static const struct ia64_main_table
-main_table[] = {
-  { 5, 1, 1, 0x0000010000000000ull, 0x000001eff8000000ull, { 24, 25, 26, 0, 0 }, 0x0, 0, },
-  { 5, 1, 1, 0x0000010008000000ull, 0x000001eff8000000ull, { 24, 25, 26, 4, 0 }, 0x0, 1, },
-  { 5, 7, 1, 0x0000000000000000ull, 0x0000000000000000ull, { 24, 67, 27, 0, 0 }, 0x0, 2, },
-  { 5, 7, 1, 0x0000000000000000ull, 0x0000000000000000ull, { 24, 64, 26, 0, 0 }, 0x0, 3, },
-  { 6, 1, 1, 0x0000012000000000ull, 0x000001e000000000ull, { 24, 67, 27, 0, 0 }, 0x0, 4, },
-  { 7, 1, 1, 0x0000010040000000ull, 0x000001eff8000000ull, { 24, 25, 26, 0, 0 }, 0x0, 5, },
-  { 7, 1, 1, 0x0000010c00000000ull, 0x000001ee00000000ull, { 24, 64, 26, 0, 0 }, 0x0, 6, },
-  { 8, 1, 1, 0x0000010800000000ull, 0x000001ee00000000ull, { 24, 64, 26, 0, 0 }, 0x0, 7, },
-  { 9, 3, 1, 0x0000002c00000000ull, 0x000001ee00000000ull, { 24, 3, 53, 54, 55 }, 0x221, 8, },
-  { 9, 3, 1, 0x0000002c00000000ull, 0x000001ee00000000ull, { 24, 53, 54, 55, 0 }, 0x261, 9, },
-  { 10, 1, 1, 0x0000010060000000ull, 0x000001eff8000000ull, { 24, 25, 26, 0, 0 }, 0x0, 10, },
-  { 10, 1, 1, 0x0000010160000000ull, 0x000001eff8000000ull, { 24, 56, 26, 0, 0 }, 0x0, 11, },
-  { 11, 1, 1, 0x0000010068000000ull, 0x000001eff8000000ull, { 24, 25, 26, 0, 0 }, 0x0, 12, },
-  { 11, 1, 1, 0x0000010168000000ull, 0x000001eff8000000ull, { 24, 56, 26, 0, 0 }, 0x0, 13, },
-  { 14, 4, 0, 0x0000000100000000ull, 0x000001eff80011ffull, { 16, 0, 0, 0, 0 }, 0x40, 969, },
-  { 14, 4, 0, 0x0000000100000000ull, 0x000001eff80011c0ull, { 16, 0, 0, 0, 0 }, 0x0, 825, },
-  { 14, 4, 0, 0x0000000100000000ull, 0x000001eff80011c0ull, { 16, 0, 0, 0, 0 }, 0x40, 826, },
-  { 14, 4, 0, 0x0000000108000100ull, 0x000001eff80011c0ull, { 16, 0, 0, 0, 0 }, 0x200, 2234, },
-  { 14, 4, 0, 0x0000000108000100ull, 0x000001eff80011c0ull, { 16, 0, 0, 0, 0 }, 0x240, 2235, },
-  { 14, 4, 1, 0x0000002100000000ull, 0x000001ef00001000ull, { 15, 16, 0, 0, 0 }, 0x0, 582, },
-  { 14, 4, 1, 0x0000002100000000ull, 0x000001ef00001000ull, { 15, 16, 0, 0, 0 }, 0x40, 583, },
-  { 14, 4, 0, 0x0000008000000000ull, 0x000001ee000011ffull, { 82, 0, 0, 0, 0 }, 0x40, 990, },
-  { 14, 4, 0, 0x0000008000000000ull, 0x000001ee000011c0ull, { 82, 0, 0, 0, 0 }, 0x0, 827, },
-  { 14, 4, 0, 0x0000008000000000ull, 0x000001ee000011c0ull, { 82, 0, 0, 0, 0 }, 0x40, 828, },
-  { 14, 4, 0, 0x0000008000000080ull, 0x000001ee000011c0ull, { 82, 0, 0, 0, 0 }, 0x210, 3029, },
-  { 14, 4, 0, 0x0000008000000080ull, 0x000001ee000011c0ull, { 82, 0, 0, 0, 0 }, 0x250, 3030, },
-  { 14, 4, 0, 0x0000008000000140ull, 0x000001ee000011c0ull, { 82, 0, 0, 0, 0 }, 0x30, 590, },
-  { 14, 4, 0, 0x0000008000000140ull, 0x000001ee000011c0ull, { 82, 0, 0, 0, 0 }, 0x70, 591, },
-  { 14, 4, 0, 0x0000008000000180ull, 0x000001ee000011c0ull, { 82, 0, 0, 0, 0 }, 0x230, 588, },
-  { 14, 4, 0, 0x0000008000000180ull, 0x000001ee000011c0ull, { 82, 0, 0, 0, 0 }, 0x270, 589, },
-  { 14, 4, 1, 0x000000a000000000ull, 0x000001ee00001000ull, { 15, 82, 0, 0, 0 }, 0x0, 584, },
-  { 14, 4, 1, 0x000000a000000000ull, 0x000001ee00001000ull, { 15, 82, 0, 0, 0 }, 0x40, 585, },
-  { 15, 4, 0, 0x0000000000000000ull, 0x000001e1f8000000ull, { 66, 0, 0, 0, 0 }, 0x0, 537, },
-  { 15, 5, 0, 0x0000000000000000ull, 0x000001e3f8000000ull, { 66, 0, 0, 0, 0 }, 0x0, 960, },
-  { 15, 2, 0, 0x0000000000000000ull, 0x000001eff8000000ull, { 66, 0, 0, 0, 0 }, 0x2, 1138, },
-  { 15, 3, 0, 0x0000000000000000ull, 0x000001eff8000000ull, { 66, 0, 0, 0, 0 }, 0x0, 1263, },
-  { 15, 6, 0, 0x0000000000000000ull, 0x000001eff8000000ull, { 70, 0, 0, 0, 0 }, 0x0, 3033, },
-  { 15, 7, 0, 0x0000000000000000ull, 0x0000000000000000ull, { 66, 0, 0, 0, 0 }, 0x0, 16, },
-  { 16, 6, 0, 0x0000018000000000ull, 0x000001ee000011ffull, { 83, 0, 0, 0, 0 }, 0x40, 1023, },
-  { 16, 6, 0, 0x0000018000000000ull, 0x000001ee000011c0ull, { 83, 0, 0, 0, 0 }, 0x0, 829, },
-  { 16, 6, 0, 0x0000018000000000ull, 0x000001ee000011c0ull, { 83, 0, 0, 0, 0 }, 0x40, 830, },
-  { 16, 6, 1, 0x000001a000000000ull, 0x000001ee00001000ull, { 15, 83, 0, 0, 0 }, 0x0, 586, },
-  { 16, 6, 1, 0x000001a000000000ull, 0x000001ee00001000ull, { 15, 83, 0, 0, 0 }, 0x40, 587, },
-  { 17, 4, 0, 0x0000004080000000ull, 0x000001e9f8000018ull, { 16, 78, 0, 0, 0 }, 0x20, 2852, },
-  { 17, 4, 0, 0x000000e000000000ull, 0x000001e800000018ull, { 82, 78, 0, 0, 0 }, 0x20, 2853, },
-  { 18, 4, 0, 0x0000000060000000ull, 0x000001e1f8000000ull, { 0, 0, 0, 0, 0 }, 0x2c, 222, },
-  { 22, 2, 0, 0x0000000200000000ull, 0x000001ee00000000ull, { 25, 81, 0, 0, 0 }, 0x0, 2239, },
-  { 22, 3, 0, 0x0000000800000000ull, 0x000001ee00000000ull, { 24, 82, 0, 0, 0 }, 0x0, 226, },
-  { 22, 3, 0, 0x0000000c00000000ull, 0x000001ee00000000ull, { 18, 82, 0, 0, 0 }, 0x0, 227, },
-  { 22, 3, 0, 0x0000002200000000ull, 0x000001ee00000000ull, { 25, 81, 0, 0, 0 }, 0x0, 2240, },
-  { 22, 3, 0, 0x0000002600000000ull, 0x000001ee00000000ull, { 19, 81, 0, 0, 0 }, 0x0, 2241, },
-  { 22, 7, 0, 0x0000000000000000ull, 0x0000000000000000ull, { 25, 81, 0, 0, 0 }, 0x0, 2242, },
-  { 25, 4, 0, 0x0000000020000000ull, 0x000001e1f8000000ull, { 0, 0, 0, 0, 0 }, 0x224, 18, },
-  { 26, 1, 2, 0x0000018000000000ull, 0x000001fe00001000ull, { 22, 23, 25, 26, 0 }, 0x0, 1222, },
-  { 26, 1, 1, 0x0000018000000000ull, 0x000001fe00001000ull, { 22, 25, 26, 0, 0 }, 0x40, 1223, },
-  { 26, 1, 2, 0x0000018000000000ull, 0x000001fe00001000ull, { 23, 22, 26, 25, 0 }, 0x0, 1181, },
-  { 26, 1, 1, 0x0000018000000000ull, 0x000001fe00001000ull, { 23, 26, 25, 0, 0 }, 0x40, 1182, },
-  { 26, 1, 2, 0x0000018000000000ull, 0x000001fe00001000ull, { 22, 23, 26, 25, 0 }, 0x0, 1090, },
-  { 26, 1, 1, 0x0000018000000000ull, 0x000001fe00001000ull, { 22, 26, 25, 0, 0 }, 0x40, 1091, },
-  { 26, 1, 2, 0x0000018000000000ull, 0x000001fe00001000ull, { 23, 22, 25, 26, 0 }, 0x0, 1052, },
-  { 26, 1, 1, 0x0000018000000000ull, 0x000001fe00001000ull, { 23, 25, 26, 0, 0 }, 0x40, 1053, },
-  { 26, 1, 2, 0x0000018200000000ull, 0x000001fe00001000ull, { 22, 23, 25, 26, 0 }, 0x40, 1376, },
-  { 26, 1, 2, 0x0000019000000000ull, 0x000001fe00001000ull, { 22, 23, 7, 26, 0 }, 0x0, 1092, },
-  { 26, 1, 1, 0x0000019000000000ull, 0x000001fe00001000ull, { 22, 7, 26, 0, 0 }, 0x40, 1093, },
-  { 26, 1, 2, 0x0000019000000000ull, 0x000001fe00001000ull, { 22, 23, 26, 7, 0 }, 0x40, 1226, },
-  { 26, 1, 1, 0x0000019000000000ull, 0x000001fe00001000ull, { 22, 26, 7, 0, 0 }, 0x40, 1227, },
-  { 26, 1, 2, 0x0000019000000000ull, 0x000001fe00001000ull, { 22, 23, 7, 26, 0 }, 0x40, 1187, },
-  { 26, 1, 2, 0x0000018800000000ull, 0x000001ee00001000ull, { 22, 23, 56, 26, 0 }, 0x0, 1229, },
-  { 26, 1, 1, 0x0000018800000000ull, 0x000001ee00001000ull, { 22, 56, 26, 0, 0 }, 0x40, 1230, },
-  { 26, 1, 2, 0x0000018800000000ull, 0x000001ee00001000ull, { 22, 23, 58, 26, 0 }, 0x0, 1188, },
-  { 26, 1, 1, 0x0000018800000000ull, 0x000001ee00001000ull, { 22, 58, 26, 0, 0 }, 0x40, 1189, },
-  { 26, 1, 2, 0x0000018800000000ull, 0x000001ee00001000ull, { 23, 22, 58, 26, 0 }, 0x0, 1097, },
-  { 26, 1, 1, 0x0000018800000000ull, 0x000001ee00001000ull, { 23, 58, 26, 0, 0 }, 0x40, 1098, },
-  { 26, 1, 2, 0x0000018800000000ull, 0x000001ee00001000ull, { 23, 22, 56, 26, 0 }, 0x0, 1059, },
-  { 26, 1, 1, 0x0000018800000000ull, 0x000001ee00001000ull, { 23, 56, 26, 0, 0 }, 0x40, 1060, },
-  { 26, 1, 2, 0x0000018a00000000ull, 0x000001ee00001000ull, { 22, 23, 56, 26, 0 }, 0x40, 1381, },
-  { 26, 1, 2, 0x000001a800000000ull, 0x000001ee00001000ull, { 22, 23, 60, 26, 0 }, 0x0, 1214, },
-  { 26, 1, 1, 0x000001a800000000ull, 0x000001ee00001000ull, { 22, 60, 26, 0, 0 }, 0x40, 1215, },
-  { 26, 1, 2, 0x000001a800000000ull, 0x000001ee00001000ull, { 23, 22, 60, 26, 0 }, 0x0, 1125, },
-  { 26, 1, 1, 0x000001a800000000ull, 0x000001ee00001000ull, { 23, 60, 26, 0, 0 }, 0x40, 1126, },
-  { 26, 1, 2, 0x000001c200000000ull, 0x000001fe00001000ull, { 23, 22, 25, 26, 0 }, 0x40, 1382, },
-  { 26, 1, 2, 0x000001d000000000ull, 0x000001fe00001000ull, { 23, 22, 7, 26, 0 }, 0x40, 1190, },
-  { 26, 1, 1, 0x000001d000000000ull, 0x000001fe00001000ull, { 23, 7, 26, 0, 0 }, 0x40, 1191, },
-  { 26, 1, 2, 0x000001d000000000ull, 0x000001fe00001000ull, { 23, 22, 26, 7, 0 }, 0x40, 1063, },
-  { 26, 1, 1, 0x000001d000000000ull, 0x000001fe00001000ull, { 23, 26, 7, 0, 0 }, 0x40, 1064, },
-  { 26, 1, 2, 0x000001ca00000000ull, 0x000001ee00001000ull, { 23, 22, 56, 26, 0 }, 0x40, 1383, },
-  { 27, 1, 2, 0x0000018400000000ull, 0x000001fe00001000ull, { 22, 23, 25, 26, 0 }, 0x0, 1235, },
-  { 27, 1, 1, 0x0000018400000000ull, 0x000001fe00001000ull, { 22, 25, 26, 0, 0 }, 0x40, 1236, },
-  { 27, 1, 2, 0x0000018400000000ull, 0x000001fe00001000ull, { 23, 22, 26, 25, 0 }, 0x0, 1194, },
-  { 27, 1, 1, 0x0000018400000000ull, 0x000001fe00001000ull, { 23, 26, 25, 0, 0 }, 0x40, 1195, },
-  { 27, 1, 2, 0x0000018400000000ull, 0x000001fe00001000ull, { 22, 23, 26, 25, 0 }, 0x0, 1103, },
-  { 27, 1, 1, 0x0000018400000000ull, 0x000001fe00001000ull, { 22, 26, 25, 0, 0 }, 0x40, 1104, },
-  { 27, 1, 2, 0x0000018400000000ull, 0x000001fe00001000ull, { 23, 22, 25, 26, 0 }, 0x0, 1065, },
-  { 27, 1, 1, 0x0000018400000000ull, 0x000001fe00001000ull, { 23, 25, 26, 0, 0 }, 0x40, 1066, },
-  { 27, 1, 2, 0x0000018600000000ull, 0x000001fe00001000ull, { 22, 23, 25, 26, 0 }, 0x40, 1388, },
-  { 27, 1, 2, 0x0000019400000000ull, 0x000001fe00001000ull, { 22, 23, 7, 26, 0 }, 0x0, 1105, },
-  { 27, 1, 1, 0x0000019400000000ull, 0x000001fe00001000ull, { 22, 7, 26, 0, 0 }, 0x40, 1106, },
-  { 27, 1, 2, 0x0000019400000000ull, 0x000001fe00001000ull, { 22, 23, 26, 7, 0 }, 0x40, 1239, },
-  { 27, 1, 1, 0x0000019400000000ull, 0x000001fe00001000ull, { 22, 26, 7, 0, 0 }, 0x40, 1240, },
-  { 27, 1, 2, 0x0000019400000000ull, 0x000001fe00001000ull, { 22, 23, 7, 26, 0 }, 0x40, 1200, },
-  { 27, 1, 2, 0x0000018c00000000ull, 0x000001ee00001000ull, { 22, 23, 56, 26, 0 }, 0x0, 1242, },
-  { 27, 1, 1, 0x0000018c00000000ull, 0x000001ee00001000ull, { 22, 56, 26, 0, 0 }, 0x40, 1243, },
-  { 27, 1, 2, 0x0000018c00000000ull, 0x000001ee00001000ull, { 22, 23, 58, 26, 0 }, 0x0, 1201, },
-  { 27, 1, 1, 0x0000018c00000000ull, 0x000001ee00001000ull, { 22, 58, 26, 0, 0 }, 0x40, 1202, },
-  { 27, 1, 2, 0x0000018c00000000ull, 0x000001ee00001000ull, { 23, 22, 58, 26, 0 }, 0x0, 1110, },
-  { 27, 1, 1, 0x0000018c00000000ull, 0x000001ee00001000ull, { 23, 58, 26, 0, 0 }, 0x40, 1111, },
-  { 27, 1, 2, 0x0000018c00000000ull, 0x000001ee00001000ull, { 23, 22, 56, 26, 0 }, 0x0, 1072, },
-  { 27, 1, 1, 0x0000018c00000000ull, 0x000001ee00001000ull, { 23, 56, 26, 0, 0 }, 0x40, 1073, },
-  { 27, 1, 2, 0x0000018e00000000ull, 0x000001ee00001000ull, { 22, 23, 56, 26, 0 }, 0x40, 1393, },
-  { 27, 1, 2, 0x000001ac00000000ull, 0x000001ee00001000ull, { 22, 23, 57, 26, 0 }, 0x0, 1259, },
-  { 27, 1, 1, 0x000001ac00000000ull, 0x000001ee00001000ull, { 22, 57, 26, 0, 0 }, 0x40, 1260, },
-  { 27, 1, 2, 0x000001ac00000000ull, 0x000001ee00001000ull, { 22, 23, 59, 26, 0 }, 0x0, 1218, },
-  { 27, 1, 1, 0x000001ac00000000ull, 0x000001ee00001000ull, { 22, 59, 26, 0, 0 }, 0x40, 1219, },
-  { 27, 1, 2, 0x000001ac00000000ull, 0x000001ee00001000ull, { 23, 22, 59, 26, 0 }, 0x0, 1129, },
-  { 27, 1, 1, 0x000001ac00000000ull, 0x000001ee00001000ull, { 23, 59, 26, 0, 0 }, 0x40, 1130, },
-  { 27, 1, 2, 0x000001ac00000000ull, 0x000001ee00001000ull, { 23, 22, 57, 26, 0 }, 0x0, 1088, },
-  { 27, 1, 1, 0x000001ac00000000ull, 0x000001ee00001000ull, { 23, 57, 26, 0, 0 }, 0x40, 1089, },
-  { 27, 1, 2, 0x000001c600000000ull, 0x000001fe00001000ull, { 23, 22, 25, 26, 0 }, 0x40, 1394, },
-  { 27, 1, 2, 0x000001d400000000ull, 0x000001fe00001000ull, { 23, 22, 7, 26, 0 }, 0x40, 1203, },
-  { 27, 1, 1, 0x000001d400000000ull, 0x000001fe00001000ull, { 23, 7, 26, 0, 0 }, 0x40, 1204, },
-  { 27, 1, 2, 0x000001d400000000ull, 0x000001fe00001000ull, { 23, 22, 26, 7, 0 }, 0x40, 1076, },
-  { 27, 1, 1, 0x000001d400000000ull, 0x000001fe00001000ull, { 23, 26, 7, 0, 0 }, 0x40, 1077, },
-  { 27, 1, 2, 0x000001ce00000000ull, 0x000001ee00001000ull, { 23, 22, 56, 26, 0 }, 0x40, 1395, },
-  { 28, 3, 1, 0x0000008808000000ull, 0x000001fff8000000ull, { 24, 28, 25, 1, 2 }, 0x0, 259, },
-  { 28, 3, 1, 0x0000008808000000ull, 0x000001fff8000000ull, { 24, 28, 25, 0, 0 }, 0x40, 260, },
-  { 29, 3, 1, 0x0000008008000000ull, 0x000001fff8000000ull, { 24, 28, 25, 2, 0 }, 0x0, 261, },
-  { 29, 3, 1, 0x0000008008000000ull, 0x000001fff8000000ull, { 24, 28, 25, 0, 0 }, 0x40, 262, },
-  { 30, 3, 1, 0x0000008048000000ull, 0x000001fff8000000ull, { 24, 28, 25, 2, 0 }, 0x0, 263, },
-  { 30, 3, 1, 0x0000008048000000ull, 0x000001fff8000000ull, { 24, 28, 25, 0, 0 }, 0x40, 264, },
-  { 31, 3, 1, 0x0000008088000000ull, 0x000001fff8000000ull, { 24, 28, 25, 2, 0 }, 0x0, 265, },
-  { 31, 3, 1, 0x0000008088000000ull, 0x000001fff8000000ull, { 24, 28, 25, 0, 0 }, 0x40, 266, },
-  { 32, 3, 1, 0x00000080c8000000ull, 0x000001fff8000000ull, { 24, 28, 25, 2, 0 }, 0x0, 267, },
-  { 32, 3, 1, 0x00000080c8000000ull, 0x000001fff8000000ull, { 24, 28, 25, 0, 0 }, 0x40, 268, },
-  { 34, 4, 0, 0x0000000010000000ull, 0x000001e1f8000000ull, { 0, 0, 0, 0, 0 }, 0x224, 19, },
-  { 36, 2, 1, 0x00000000c0000000ull, 0x000001eff8000000ull, { 24, 26, 0, 0, 0 }, 0x0, 1167, },
-  { 37, 2, 1, 0x00000000c8000000ull, 0x000001eff8000000ull, { 24, 26, 0, 0, 0 }, 0x0, 1168, },
-  { 39, 2, 1, 0x0000008000000000ull, 0x000001e000000000ull, { 24, 25, 26, 47, 73 }, 0x0, 20, },
-  { 39, 2, 1, 0x000000a600000000ull, 0x000001ee04000000ull, { 24, 25, 45, 74, 0 }, 0x0, 3038, },
-  { 39, 2, 1, 0x000000a604000000ull, 0x000001ee04000000ull, { 24, 56, 45, 74, 0 }, 0x0, 3039, },
-  { 39, 2, 1, 0x000000ae00000000ull, 0x000001ee00000000ull, { 24, 48, 26, 46, 74 }, 0x0, 21, },
-  { 43, 4, 0, 0x0000000080000000ull, 0x000001e1f8000000ull, { 0, 0, 0, 0, 0 }, 0x20, 22, },
-  { 48, 2, 1, 0x000000a400000000ull, 0x000001ee00002000ull, { 24, 26, 77, 74, 0 }, 0x0, 2870, },
-  { 50, 5, 1, 0x0000000080000000ull, 0x000001e3f80fe000ull, { 18, 20, 0, 0, 0 }, 0x40, 24, },
-  { 51, 5, 1, 0x0000010008000000ull, 0x000001fff8000000ull, { 18, 20, 19, 0, 0 }, 0x40, 2291, },
-  { 52, 5, 1, 0x00000000b8000000ull, 0x000001eff8000000ull, { 18, 19, 20, 0, 0 }, 0x0, 2292, },
-  { 52, 5, 1, 0x00000000b8000000ull, 0x000001eff8000000ull, { 18, 19, 20, 0, 0 }, 0x40, 26, },
-  { 53, 5, 1, 0x00000000b0000000ull, 0x000001eff8000000ull, { 18, 19, 20, 0, 0 }, 0x0, 2293, },
-  { 53, 5, 1, 0x00000000b0000000ull, 0x000001eff8000000ull, { 18, 19, 20, 0, 0 }, 0x40, 27, },
-  { 54, 5, 1, 0x0000000160000000ull, 0x000001e3f8000000ull, { 18, 19, 20, 0, 0 }, 0x0, 28, },
-  { 55, 5, 1, 0x0000000168000000ull, 0x000001e3f8000000ull, { 18, 19, 20, 0, 0 }, 0x0, 29, },
-  { 57, 3, 0, 0x0000002180000000ull, 0x000001fff8000000ull, { 26, 0, 0, 0, 0 }, 0x0, 30, },
-  { 58, 5, 0, 0x0000000040000000ull, 0x000001eff8000000ull, { 80, 0, 0, 0, 0 }, 0x0, 2294, },
-  { 58, 5, 0, 0x0000000040000000ull, 0x000001eff8000000ull, { 80, 0, 0, 0, 0 }, 0x40, 31, },
-  { 59, 5, 2, 0x000000a000000000ull, 0x000001e000001000ull, { 22, 23, 19, 61, 0 }, 0x0, 1265, },
-  { 59, 5, 1, 0x000000a000000000ull, 0x000001e000001000ull, { 22, 19, 61, 0, 0 }, 0x40, 1266, },
-  { 59, 5, 2, 0x000000a000000000ull, 0x000001e000001000ull, { 23, 22, 19, 61, 0 }, 0x40, 1420, },
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-  { 155, 7, 1, 0x0000000000000000ull, 0x0000000000000000ull, { 14, 56, 0, 0, 0 }, 0x0, 140, },
-  { 155, 7, 1, 0x0000000000000000ull, 0x0000000000000000ull, { 14, 25, 0, 0, 0 }, 0x0, 141, },
-  { 156, 6, 1, 0x000000c000000000ull, 0x000001e000100000ull, { 24, 71, 0, 0, 0 }, 0x0, 142, },
-  { 157, 2, 1, 0x000000eca0000000ull, 0x000001fff0000000ull, { 24, 25, 75, 0, 0 }, 0x0, 143, },
-  { 158, 2, 1, 0x000000eea0000000ull, 0x000001fff0000000ull, { 24, 25, 76, 0, 0 }, 0x0, 144, },
-  { 168, 4, 0, 0x0000004000000000ull, 0x000001e1f8000000ull, { 66, 0, 0, 0, 0 }, 0x0, 539, },
-  { 168, 5, 0, 0x0000000008000000ull, 0x000001e3fc000000ull, { 66, 0, 0, 0, 0 }, 0x0, 962, },
-  { 168, 2, 0, 0x0000000008000000ull, 0x000001effc000000ull, { 66, 0, 0, 0, 0 }, 0x2, 1147, },
-  { 168, 3, 0, 0x0000000008000000ull, 0x000001effc000000ull, { 66, 0, 0, 0, 0 }, 0x0, 1271, },
-  { 168, 6, 0, 0x0000000008000000ull, 0x000001effc000000ull, { 70, 0, 0, 0, 0 }, 0x0, 3035, },
-  { 168, 7, 0, 0x0000000000000000ull, 0x0000000000000000ull, { 66, 0, 0, 0, 0 }, 0x0, 145, },
-  { 175, 1, 1, 0x0000010070000000ull, 0x000001eff8000000ull, { 24, 25, 26, 0, 0 }, 0x0, 146, },
-  { 175, 1, 1, 0x0000010170000000ull, 0x000001eff8000000ull, { 24, 56, 26, 0, 0 }, 0x0, 147, },
-  { 178, 2, 1, 0x000000ea00000000ull, 0x000001fff0000000ull, { 24, 25, 26, 0, 0 }, 0x0, 3017, },
-  { 179, 2, 1, 0x000000f820000000ull, 0x000001fff0000000ull, { 24, 25, 26, 0, 0 }, 0x0, 2857, },
-  { 180, 1, 1, 0x0000010400000000ull, 0x000001fff8000000ull, { 24, 25, 26, 0, 0 }, 0x0, 148, },
-  { 181, 1, 1, 0x0000010600000000ull, 0x000001fff8000000ull, { 24, 25, 26, 0, 0 }, 0x0, 149, },
-  { 182, 1, 1, 0x0000011400000000ull, 0x000001fff8000000ull, { 24, 25, 26, 0, 0 }, 0x0, 150, },
-  { 183, 1, 1, 0x0000010450000000ull, 0x000001fff8000000ull, { 24, 25, 26, 0, 0 }, 0x0, 151, },
-  { 184, 1, 1, 0x0000010650000000ull, 0x000001fff8000000ull, { 24, 25, 26, 0, 0 }, 0x0, 152, },
-  { 185, 1, 1, 0x0000010470000000ull, 0x000001fff8000000ull, { 24, 25, 26, 0, 0 }, 0x0, 153, },
-  { 186, 1, 1, 0x0000010670000000ull, 0x000001fff8000000ull, { 24, 25, 26, 0, 0 }, 0x0, 154, },
-  { 187, 1, 1, 0x0000010520000000ull, 0x000001fff8000000ull, { 24, 25, 26, 0, 0 }, 0x0, 948, },
-  { 188, 1, 1, 0x0000010720000000ull, 0x000001fff8000000ull, { 24, 25, 26, 0, 0 }, 0x0, 949, },
-  { 189, 1, 1, 0x0000011520000000ull, 0x000001fff8000000ull, { 24, 25, 26, 0, 0 }, 0x0, 950, },
-  { 190, 2, 1, 0x000000e850000000ull, 0x000001fff0000000ull, { 24, 25, 26, 0, 0 }, 0x0, 2871, },
-  { 191, 2, 1, 0x000000ea70000000ull, 0x000001fff0000000ull, { 24, 25, 26, 0, 0 }, 0x0, 155, },
-  { 192, 2, 1, 0x000000e810000000ull, 0x000001fff0000000ull, { 24, 25, 26, 0, 0 }, 0x0, 2872, },
-  { 193, 2, 1, 0x000000ea30000000ull, 0x000001fff0000000ull, { 24, 25, 26, 0, 0 }, 0x0, 156, },
-  { 194, 2, 1, 0x000000ead0000000ull, 0x000001fff0000000ull, { 24, 25, 26, 0, 0 }, 0x0, 2206, },
-  { 195, 2, 1, 0x000000e230000000ull, 0x000001ff30000000ull, { 24, 25, 26, 42, 0 }, 0x0, 157, },
-  { 196, 2, 1, 0x000000e690000000ull, 0x000001fff0000000ull, { 24, 26, 0, 0, 0 }, 0x0, 158, },
-  { 198, 3, 1, 0x00000021c0000000ull, 0x000001eff8000000ull, { 24, 26, 25, 0, 0 }, 0x0, 2207, },
-  { 198, 3, 1, 0x00000020c0000000ull, 0x000001eff8000000ull, { 24, 26, 49, 0, 0 }, 0x0, 2208, },
-  { 198, 3, 0, 0x0000002188000000ull, 0x000001eff8000000ull, { 26, 49, 0, 0, 0 }, 0x0, 2238, },
-  { 199, 2, 1, 0x000000e8b0000000ull, 0x000001fff0000000ull, { 24, 25, 26, 0, 0 }, 0x0, 159, },
-  { 200, 2, 1, 0x000000e240000000ull, 0x000001fff0000000ull, { 24, 25, 26, 0, 0 }, 0x0, 160, },
-  { 200, 2, 1, 0x000000ee50000000ull, 0x000001fff0000000ull, { 24, 25, 39, 0, 0 }, 0x0, 161, },
-  { 201, 2, 1, 0x000000f040000000ull, 0x000001fff0000000ull, { 24, 25, 26, 0, 0 }, 0x0, 162, },
-  { 201, 2, 1, 0x000000fc50000000ull, 0x000001fff0000000ull, { 24, 25, 39, 0, 0 }, 0x0, 163, },
-  { 202, 1, 1, 0x0000010680000000ull, 0x000001ffe0000000ull, { 24, 25, 41, 26, 0 }, 0x0, 164, },
-  { 203, 2, 1, 0x000000e220000000ull, 0x000001fff0000000ull, { 24, 26, 25, 0, 0 }, 0x0, 165, },
-  { 203, 2, 1, 0x000000e630000000ull, 0x000001fff0000000ull, { 24, 26, 43, 0, 0 }, 0x0, 166, },
-  { 204, 2, 1, 0x000000f020000000ull, 0x000001fff0000000ull, { 24, 26, 25, 0, 0 }, 0x0, 167, },
-  { 204, 2, 1, 0x000000f430000000ull, 0x000001fff0000000ull, { 24, 26, 43, 0, 0 }, 0x0, 168, },
-  { 205, 1, 1, 0x00000106c0000000ull, 0x000001ffe0000000ull, { 24, 25, 41, 26, 0 }, 0x0, 169, },
-  { 206, 1, 1, 0x0000010420000000ull, 0x000001fff8000000ull, { 24, 25, 26, 0, 0 }, 0x0, 170, },
-  { 207, 1, 1, 0x0000010620000000ull, 0x000001fff8000000ull, { 24, 25, 26, 0, 0 }, 0x0, 171, },
-  { 208, 1, 1, 0x0000011420000000ull, 0x000001fff8000000ull, { 24, 25, 26, 0, 0 }, 0x0, 172, },
-  { 209, 3, 0, 0x0000002048000000ull, 0x000001eff8000000ull, { 26, 25, 0, 0, 0 }, 0x8, 1175, },
-  { 209, 3, 0, 0x0000002050000000ull, 0x000001eff8000000ull, { 26, 25, 0, 0, 0 }, 0xc, 1050, },
-  { 209, 3, 0, 0x00000021a0000000ull, 0x000001eff8000000ull, { 26, 0, 0, 0, 0 }, 0x8, 922, },
-  { 210, 3, 0, 0x0000002060000000ull, 0x000001eff8000000ull, { 26, 25, 0, 0, 0 }, 0x8, 848, },
-  { 215, 4, 0, 0x0000000040000000ull, 0x000001e1f8000000ull, { 0, 0, 0, 0, 0 }, 0x22c, 173, },
-  { 216, 3, 0, 0x0000000038000000ull, 0x000001ee78000000ull, { 68, 0, 0, 0, 0 }, 0x8, 174, },
-  { 217, 3, 0, 0x0000000028000000ull, 0x000001ee78000000ull, { 68, 0, 0, 0, 0 }, 0x0, 175, },
-  { 226, 3, 1, 0x000000c708000000ull, 0x000001ffc8000000ull, { 18, 25, 0, 0, 0 }, 0x0, 2782, },
-  { 227, 2, 1, 0x000000a600000000ull, 0x000001ee04000000ull, { 24, 25, 45, 0, 0 }, 0x140, 176, },
-  { 227, 2, 1, 0x000000f240000000ull, 0x000001fff0000000ull, { 24, 25, 26, 0, 0 }, 0x0, 177, },
-  { 228, 1, 1, 0x0000010080000000ull, 0x000001efe0000000ull, { 24, 25, 40, 26, 0 }, 0x0, 178, },
-  { 229, 1, 1, 0x00000100c0000000ull, 0x000001efe0000000ull, { 24, 25, 40, 26, 0 }, 0x0, 179, },
-  { 230, 2, 1, 0x000000a400000000ull, 0x000001ee00002000ull, { 24, 26, 77, 0, 0 }, 0x140, 2878, },
-  { 230, 2, 1, 0x000000f220000000ull, 0x000001fff0000000ull, { 24, 26, 25, 0, 0 }, 0x0, 181, },
-  { 231, 2, 1, 0x000000ac00000000ull, 0x000001ee00000000ull, { 24, 25, 26, 44, 0 }, 0x0, 182, },
-  { 236, 3, 0, 0x0000000180000000ull, 0x000001eff8000000ull, { 0, 0, 0, 0, 0 }, 0x0, 850, },
-  { 237, 3, 0, 0x0000000030000000ull, 0x000001ee78000000ull, { 68, 0, 0, 0, 0 }, 0x8, 183, },
-  { 239, 3, 1, 0x0000008c00000000ull, 0x000001fff8000000ull, { 28, 25, 0, 0, 0 }, 0x0, 184, },
-  { 239, 3, 1, 0x000000ac00000000ull, 0x000001eff0000000ull, { 28, 25, 62, 0, 0 }, 0x400, 185, },
-  { 240, 3, 1, 0x0000008c08000000ull, 0x000001fff8000000ull, { 28, 25, 1, 0, 0 }, 0x0, 186, },
-  { 240, 3, 1, 0x0000008c08000000ull, 0x000001fff8000000ull, { 28, 25, 0, 0, 0 }, 0x40, 187, },
-  { 241, 3, 1, 0x0000008c40000000ull, 0x000001fff8000000ull, { 28, 25, 0, 0, 0 }, 0x0, 188, },
-  { 241, 3, 1, 0x000000ac40000000ull, 0x000001eff0000000ull, { 28, 25, 62, 0, 0 }, 0x400, 189, },
-  { 242, 3, 1, 0x0000008c80000000ull, 0x000001fff8000000ull, { 28, 25, 0, 0, 0 }, 0x0, 190, },
-  { 242, 3, 1, 0x000000ac80000000ull, 0x000001eff0000000ull, { 28, 25, 62, 0, 0 }, 0x400, 191, },
-  { 243, 3, 1, 0x0000008cc0000000ull, 0x000001fff8000000ull, { 28, 25, 0, 0, 0 }, 0x0, 192, },
-  { 243, 3, 1, 0x000000acc0000000ull, 0x000001eff0000000ull, { 28, 25, 62, 0, 0 }, 0x400, 193, },
-  { 244, 3, 1, 0x000000cec0000000ull, 0x000001fff8000000ull, { 28, 19, 0, 0, 0 }, 0x0, 2785, },
-  { 244, 3, 1, 0x000000eec0000000ull, 0x000001eff0000000ull, { 28, 19, 62, 0, 0 }, 0x400, 2786, },
-  { 245, 3, 1, 0x000000cc40000000ull, 0x000001fff8000000ull, { 28, 19, 0, 0, 0 }, 0x0, 194, },
-  { 245, 3, 1, 0x000000ec40000000ull, 0x000001eff0000000ull, { 28, 19, 62, 0, 0 }, 0x400, 195, },
-  { 246, 3, 1, 0x000000ccc0000000ull, 0x000001fff8000000ull, { 28, 19, 0, 0, 0 }, 0x0, 196, },
-  { 246, 3, 1, 0x000000ecc0000000ull, 0x000001eff0000000ull, { 28, 19, 62, 0, 0 }, 0x400, 197, },
-  { 247, 3, 1, 0x000000cc00000000ull, 0x000001fff8000000ull, { 28, 19, 0, 0, 0 }, 0x0, 198, },
-  { 247, 3, 1, 0x000000ec00000000ull, 0x000001eff0000000ull, { 28, 19, 62, 0, 0 }, 0x400, 199, },
-  { 248, 3, 1, 0x000000cc80000000ull, 0x000001fff8000000ull, { 28, 19, 0, 0, 0 }, 0x0, 200, },
-  { 248, 3, 1, 0x000000ec80000000ull, 0x000001eff0000000ull, { 28, 19, 62, 0, 0 }, 0x400, 201, },
-  { 249, 1, 1, 0x0000010028000000ull, 0x000001eff8000000ull, { 24, 25, 26, 0, 0 }, 0x0, 202, },
-  { 249, 1, 1, 0x0000010020000000ull, 0x000001eff8000000ull, { 24, 25, 26, 4, 0 }, 0x0, 203, },
-  { 249, 1, 1, 0x0000010128000000ull, 0x000001eff8000000ull, { 24, 56, 26, 0, 0 }, 0x0, 204, },
-  { 250, 3, 0, 0x0000000020000000ull, 0x000001ee78000000ull, { 68, 0, 0, 0, 0 }, 0x0, 205, },
-  { 251, 2, 1, 0x00000000a0000000ull, 0x000001eff8000000ull, { 24, 26, 0, 0, 0 }, 0x0, 206, },
-  { 252, 2, 1, 0x00000000a8000000ull, 0x000001eff8000000ull, { 24, 26, 0, 0, 0 }, 0x0, 207, },
-  { 253, 2, 1, 0x00000000b0000000ull, 0x000001eff8000000ull, { 24, 26, 0, 0, 0 }, 0x0, 208, },
-  { 254, 3, 0, 0x0000000198000000ull, 0x000001eff8000000ull, { 0, 0, 0, 0, 0 }, 0x0, 1150, },
-  { 255, 3, 1, 0x00000020f8000000ull, 0x000001eff8000000ull, { 24, 26, 0, 0, 0 }, 0x8, 209, },
-  { 256, 2, 2, 0x000000a000000000ull, 0x000001fe00003000ull, { 22, 23, 26, 77, 0 }, 0x0, 3040, },
-  { 256, 2, 1, 0x000000a000000000ull, 0x000001fe00003000ull, { 22, 26, 77, 0, 0 }, 0x40, 3041, },
-  { 256, 2, 2, 0x000000a000000000ull, 0x000001fe00003000ull, { 23, 22, 26, 77, 0 }, 0x40, 2003, },
-  { 256, 2, 1, 0x000000a000000000ull, 0x000001fe00003000ull, { 23, 26, 77, 0, 0 }, 0x40, 2004, },
-  { 257, 2, 2, 0x000000a000082000ull, 0x000001fe00083000ull, { 22, 23, 50, 0, 0 }, 0x0, 3044, },
-  { 257, 2, 1, 0x000000a000082000ull, 0x000001fe00083000ull, { 22, 50, 0, 0, 0 }, 0x40, 3045, },
-  { 257, 2, 2, 0x000000a000082000ull, 0x000001fe00083000ull, { 23, 22, 50, 0, 0 }, 0x40, 2007, },
-  { 257, 2, 1, 0x000000a000082000ull, 0x000001fe00083000ull, { 23, 50, 0, 0, 0 }, 0x40, 2008, },
-  { 258, 3, 1, 0x00000020d0000000ull, 0x000001eff8000000ull, { 24, 26, 0, 0, 0 }, 0x0, 210, },
-  { 259, 2, 2, 0x000000a000002000ull, 0x000001fe00003000ull, { 22, 23, 26, 0, 0 }, 0x0, 3048, },
-  { 259, 2, 1, 0x000000a000002000ull, 0x000001fe00003000ull, { 22, 26, 0, 0, 0 }, 0x40, 3049, },
-  { 259, 2, 2, 0x000000a000002000ull, 0x000001fe00003000ull, { 23, 22, 26, 0, 0 }, 0x40, 2011, },
-  { 259, 2, 1, 0x000000a000002000ull, 0x000001fe00003000ull, { 23, 26, 0, 0, 0 }, 0x40, 2012, },
-  { 260, 3, 1, 0x00000020f0000000ull, 0x000001eff8000000ull, { 24, 26, 0, 0, 0 }, 0x8, 211, },
-  { 262, 3, 1, 0x00000020d8000000ull, 0x000001eff8000000ull, { 24, 26, 0, 0, 0 }, 0x0, 212, },
-  { 266, 2, 1, 0x000000e840000000ull, 0x000001fff0000000ull, { 24, 25, 26, 0, 0 }, 0x0, 1131, },
-  { 267, 2, 1, 0x000000ea40000000ull, 0x000001fff0000000ull, { 24, 25, 26, 0, 0 }, 0x0, 1132, },
-  { 268, 2, 1, 0x000000f840000000ull, 0x000001fff0000000ull, { 24, 25, 26, 0, 0 }, 0x0, 1133, },
-  { 272, 4, 0, 0x00000000c0000000ull, 0x000001e1f8000000ull, { 0, 0, 0, 0, 0 }, 0x28, 223, },
-  { 277, 3, 1, 0x0000008208000000ull, 0x000001fff8000000ull, { 24, 28, 25, 0, 0 }, 0x0, 213, },
-  { 278, 3, 1, 0x0000008248000000ull, 0x000001fff8000000ull, { 24, 28, 25, 0, 0 }, 0x0, 214, },
-  { 279, 3, 1, 0x0000008288000000ull, 0x000001fff8000000ull, { 24, 28, 25, 0, 0 }, 0x0, 215, },
-  { 280, 3, 1, 0x00000082c8000000ull, 0x000001fff8000000ull, { 24, 28, 25, 0, 0 }, 0x0, 216, },
-  { 282, 5, 1, 0x000001d000000000ull, 0x000001fc00000000ull, { 18, 20, 21, 19, 0 }, 0x0, 1179, },
-  { 282, 5, 1, 0x000001d000000000ull, 0x000001fc00000000ull, { 18, 20, 21, 19, 0 }, 0x40, 1261, },
-  { 283, 5, 1, 0x000001d000000000ull, 0x000001fc000fe000ull, { 18, 20, 21, 0, 0 }, 0x40, 1180, },
-  { 284, 1, 1, 0x0000010078000000ull, 0x000001eff8000000ull, { 24, 25, 26, 0, 0 }, 0x0, 217, },
-  { 284, 1, 1, 0x0000010178000000ull, 0x000001eff8000000ull, { 24, 56, 26, 0, 0 }, 0x0, 218, },
-  { 287, 2, 1, 0x0000000080000000ull, 0x000001eff8000000ull, { 24, 26, 0, 0, 0 }, 0x0, 219, },
-  { 288, 2, 1, 0x0000000088000000ull, 0x000001eff8000000ull, { 24, 26, 0, 0, 0 }, 0x0, 220, },
-  { 289, 2, 1, 0x0000000090000000ull, 0x000001eff8000000ull, { 24, 26, 0, 0, 0 }, 0x0, 221, },
-};
-
-static const char dis_table[] = {
-0xa0, 0xc7, 0xc8, 0xa0, 0x2e, 0xd8, 0xa0, 0x2c, 0xc0, 0xa0, 0x1c, 0x00,
-0x98, 0xb0, 0x02, 0x50, 0x90, 0x50, 0x90, 0x28, 0x24, 0x39, 0x28, 0x24,
-0x39, 0x20, 0x90, 0x28, 0x24, 0x39, 0x18, 0x24, 0x39, 0x10, 0x91, 0x60,
-0x90, 0x28, 0x24, 0x39, 0x00, 0x10, 0x10, 0x58, 0x41, 0x61, 0xc7, 0xc0,
-0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10,
-0x10, 0x10, 0x52, 0xc0, 0xc0, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10,
-0x10, 0x10, 0x10, 0x24, 0x24, 0x70, 0x90, 0x28, 0x24, 0x38, 0xf0, 0x24,
-0x38, 0xe8, 0xa8, 0x0b, 0x48, 0x15, 0x20, 0x97, 0x20, 0x95, 0xc8, 0x9a,
-0xb8, 0x05, 0x38, 0x91, 0x18, 0x90, 0xa0, 0x90, 0x60, 0x80, 0x90, 0x20,
-0x34, 0xa6, 0xa4, 0x25, 0x00, 0x34, 0xa3, 0x80, 0xa4, 0x36, 0xa0, 0x36,
-0xd9, 0x90, 0x50, 0x90, 0x28, 0x80, 0x36, 0xcf, 0x80, 0x34, 0x86, 0x81,
-0x33, 0xe2, 0x90, 0xe0, 0x90, 0x70, 0x90, 0x38, 0xa4, 0x24, 0x10, 0x34,
-0x83, 0xa4, 0x1f, 0x08, 0x34, 0x80, 0x90, 0x38, 0xa4, 0x38, 0xa0, 0x37,
-0x1a, 0xa4, 0x38, 0x48, 0x37, 0x0e, 0x90, 0x70, 0x90, 0x38, 0xa4, 0x37,
-0x20, 0x36, 0xef, 0xa4, 0x36, 0xf8, 0x36, 0xea, 0x80, 0xa4, 0x23, 0xf0,
-0x34, 0x7f, 0x92, 0x18, 0x91, 0xc0, 0x80, 0x91, 0x80, 0x90, 0xf8, 0xdb,
-0x84, 0x60, 0xf9, 0x40, 0xc0, 0xc0, 0x80, 0xa4, 0x42, 0x68, 0x8c, 0x43,
-0xc8, 0x84, 0x38, 0x83, 0xc0, 0xc0, 0x80, 0xa4, 0x42, 0x58, 0x8c, 0x43,
-0xa8, 0x84, 0x38, 0x81, 0xd3, 0x82, 0x40, 0x50, 0xc0, 0xc0, 0x81, 0x38,
-0x35, 0x50, 0xc0, 0xc0, 0x81, 0x38, 0x33, 0xa4, 0x1f, 0x18, 0x33, 0xe4,
-0x80, 0x90, 0x28, 0x80, 0x33, 0xe0, 0x80, 0x34, 0x88, 0x81, 0x90, 0x38,
-0xa4, 0x24, 0x80, 0x34, 0x8b, 0xa4, 0x24, 0x48, 0x34, 0x85, 0xc0, 0x40,
-0x10, 0x10, 0x90, 0x38, 0xa4, 0x1e, 0xf0, 0x33, 0xdf, 0xa4, 0x1e, 0xe0,
-0x33, 0xdd, 0x18, 0x24, 0x24, 0xf8, 0x83, 0x90, 0xa8, 0xd3, 0x82, 0xc0,
-0xc0, 0xc0, 0x80, 0xa4, 0x42, 0x38, 0x38, 0x6d, 0xc0, 0xc0, 0x80, 0xa4,
-0x42, 0x28, 0x38, 0x69, 0xd3, 0x82, 0x40, 0x50, 0xc0, 0xc0, 0x81, 0x38,
-0x2f, 0x50, 0xc0, 0xc0, 0x81, 0x38, 0x2d, 0x92, 0xb8, 0x99, 0x84, 0x24,
-0x68, 0x90, 0x78, 0x90, 0x50, 0x10, 0x10, 0x80, 0xa4, 0x36, 0x98, 0x36,
-0xd8, 0x82, 0x36, 0xce, 0x90, 0x80, 0x10, 0x10, 0x90, 0x38, 0xa4, 0x38,
-0x98, 0x37, 0x19, 0xa4, 0x38, 0x40, 0x37, 0x0d, 0x80, 0x90, 0x38, 0xa4,
-0x37, 0x18, 0x36, 0xee, 0xa4, 0x36, 0xf0, 0x36, 0xe9, 0x83, 0x90, 0xa8,
-0xd3, 0x82, 0xc0, 0xc0, 0xc0, 0x80, 0xa4, 0x42, 0x08, 0x38, 0x61, 0xc0,
-0xc0, 0x80, 0xa4, 0x41, 0xf8, 0x38, 0x5d, 0xd3, 0x82, 0x40, 0x50, 0xc0,
-0xc0, 0x81, 0x38, 0x29, 0x50, 0xc0, 0xc0, 0x81, 0x38, 0x27, 0x18, 0x24,
-0x24, 0x78, 0x83, 0x90, 0xa8, 0xd3, 0x82, 0xc0, 0xc0, 0xc0, 0x80, 0xa4,
-0x41, 0xd8, 0x38, 0x55, 0xc0, 0xc0, 0x80, 0xa4, 0x41, 0xc8, 0x38, 0x51,
-0xd3, 0x82, 0x40, 0x50, 0xc0, 0xc0, 0x81, 0x38, 0x23, 0x50, 0xc0, 0xc0,
-0x81, 0x38, 0x21, 0x94, 0x50, 0x92, 0xf8, 0x99, 0x84, 0x1f, 0x48, 0x90,
-0x78, 0x90, 0x50, 0x10, 0x10, 0x80, 0xa4, 0x36, 0x90, 0x36, 0xd7, 0x82,
-0x36, 0xcd, 0x90, 0x80, 0x10, 0x10, 0x90, 0x38, 0xa4, 0x38, 0x90, 0x37,
-0x18, 0xa4, 0x38, 0x38, 0x37, 0x0c, 0x80, 0x90, 0x38, 0xa4, 0x37, 0x10,
-0x36, 0xed, 0xa4, 0x36, 0xe8, 0x36, 0xe8, 0x83, 0x90, 0xe8, 0xd3, 0x83,
-0xc0, 0xc0, 0xc0, 0x80, 0xa4, 0x42, 0x78, 0x8c, 0x43, 0xe8, 0x84, 0x38,
-0x85, 0xc0, 0xc0, 0x80, 0xa4, 0x42, 0x60, 0x8c, 0x43, 0xb8, 0x84, 0x38,
-0x82, 0xd3, 0x82, 0x40, 0x50, 0xc0, 0xc0, 0x81, 0x38, 0x37, 0x50, 0xc0,
-0xc0, 0x81, 0x38, 0x34, 0x18, 0x24, 0x1f, 0x40, 0x83, 0x90, 0xa8, 0xd3,
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-0x90, 0x38, 0xa4, 0x03, 0xb8, 0x30, 0x75, 0x24, 0x03, 0xb0, 0x90, 0x60,
-0x90, 0x38, 0xa4, 0x04, 0xd8, 0x30, 0x99, 0x24, 0x04, 0xd0, 0x90, 0x38,
-0xa4, 0x04, 0x48, 0x30, 0x87, 0x24, 0x04, 0x40, 0x90, 0xc0, 0x90, 0x60,
-0x90, 0x38, 0xa4, 0x03, 0x10, 0x30, 0x60, 0x24, 0x03, 0x08, 0x90, 0x38,
-0xa4, 0x03, 0xa0, 0x30, 0x72, 0x24, 0x03, 0x98, 0x90, 0x60, 0x90, 0x38,
-0xa4, 0x04, 0xc0, 0x30, 0x96, 0x24, 0x04, 0xb8, 0x90, 0x38, 0xa4, 0x04,
-0x30, 0x30, 0x84, 0x24, 0x04, 0x28, 0x10, 0x10, 0x90, 0xe0, 0x90, 0x70,
-0x90, 0x38, 0xa4, 0x02, 0x88, 0x30, 0x52, 0xa4, 0x02, 0x78, 0x30, 0x50,
-0x90, 0x38, 0xa4, 0x02, 0x70, 0x30, 0x4b, 0xa4, 0x02, 0x60, 0x30, 0x4d,
-0x90, 0x70, 0x90, 0x38, 0xa4, 0x02, 0x50, 0x30, 0x43, 0xa4, 0x02, 0x40,
-0x30, 0x49, 0x90, 0x38, 0xa4, 0x02, 0x38, 0x30, 0x44, 0xa4, 0x02, 0x28,
-0x30, 0x46, 0x91, 0x48, 0x80, 0x90, 0xa0, 0x90, 0x50, 0x90, 0x28, 0x80,
-0x30, 0x56, 0x24, 0x02, 0xa8, 0x90, 0x28, 0x80, 0x30, 0x58, 0x24, 0x02,
-0xb8, 0x90, 0x50, 0x90, 0x28, 0x80, 0x30, 0x5c, 0x24, 0x02, 0xd8, 0x90,
-0x28, 0x80, 0x30, 0x5a, 0x24, 0x02, 0xc8, 0x80, 0x10, 0x10, 0x10, 0x10,
-0x90, 0x28, 0x80, 0x30, 0x53, 0x24, 0x02, 0xa0, 0xd7, 0x42, 0x00, 0xa4,
-0x39, 0x60, 0x37, 0x2e, 0xa4, 0x39, 0x40, 0x37, 0x2a, 0xa0, 0x14, 0x68,
-0xa0, 0x10, 0x90, 0xa0, 0x0c, 0x60, 0x9e, 0x88, 0x09, 0xd0, 0x94, 0xf0,
-0x90, 0xb0, 0x88, 0x00, 0x68, 0x84, 0x10, 0x10, 0xc9, 0xe1, 0x4c, 0x40,
-0x85, 0x35, 0x4d, 0xcb, 0x61, 0x45, 0x00, 0x85, 0x35, 0x23, 0x9a, 0x00,
-0x03, 0xf8, 0x91, 0x98, 0x80, 0x91, 0x10, 0x90, 0xa0, 0x90, 0x68, 0x90,
-0x20, 0x3a, 0x75, 0xc9, 0xe2, 0x9c, 0xc0, 0x85, 0x35, 0x4b, 0xa4, 0x53,
-0x88, 0x3a, 0x72, 0x90, 0x38, 0xa4, 0x53, 0x50, 0x3a, 0x6b, 0xa4, 0x53,
-0x40, 0x3a, 0x69, 0x90, 0x48, 0x10, 0x10, 0xa4, 0x53, 0x08, 0x3a, 0x62,
-0x10, 0x10, 0x80, 0x3a, 0x5e, 0x81, 0x10, 0x10, 0x80, 0xa4, 0x52, 0xd8,
-0x3a, 0x5c, 0x91, 0xb0, 0x91, 0x60, 0x90, 0xe0, 0x90, 0x70, 0x90, 0x38,
-0xa4, 0x53, 0x78, 0x3a, 0x70, 0xa4, 0x53, 0x68, 0x3a, 0x6e, 0x90, 0x38,
-0xa4, 0x53, 0x30, 0x3a, 0x67, 0xa4, 0x53, 0x20, 0x3a, 0x65, 0x90, 0x48,
-0x10, 0x10, 0xa4, 0x52, 0xf8, 0x3a, 0x60, 0x10, 0x10, 0x80, 0x3a, 0x5d,
-0x90, 0x28, 0x80, 0x3a, 0x56, 0x80, 0x3a, 0x55, 0x81, 0x10, 0x10, 0x80,
-0xa4, 0x52, 0xc8, 0x3a, 0x5a, 0xcb, 0x61, 0x44, 0xc0, 0x85, 0x35, 0x22,
-0x90, 0xd8, 0x88, 0x00, 0x90, 0x84, 0x90, 0x38, 0xc1, 0xc0, 0x85, 0x3a,
-0x78, 0xc9, 0xe1, 0x4c, 0x00, 0x85, 0x35, 0x49, 0xcb, 0x61, 0x44, 0x80,
-0x85, 0x35, 0x21, 0x88, 0x00, 0x68, 0x84, 0x10, 0x10, 0xc9, 0xe1, 0x4b,
-0xc0, 0x85, 0x35, 0x47, 0xcb, 0x61, 0x44, 0x40, 0x85, 0x35, 0x20, 0x91,
-0xf8, 0x90, 0xb0, 0x88, 0x00, 0x68, 0x84, 0x10, 0x10, 0xc9, 0xe1, 0x4b,
-0x40, 0x85, 0x35, 0x43, 0xcb, 0x61, 0x43, 0xc0, 0x85, 0x35, 0x1e, 0x88,
-0x01, 0x00, 0x90, 0xa0, 0x81, 0x90, 0x70, 0x80, 0x90, 0x20, 0x3a, 0x6c,
-0xc9, 0xe1, 0x4b, 0x00, 0x85, 0x35, 0x41, 0x81, 0x3a, 0x63, 0x81, 0x10,
-0x10, 0x80, 0xa4, 0x52, 0xb8, 0x3a, 0x58, 0xcb, 0x61, 0x43, 0x80, 0x85,
-0x35, 0x1d, 0x90, 0xb0, 0x88, 0x00, 0x68, 0x84, 0x10, 0x10, 0xc9, 0xe1,
-0x4a, 0xc0, 0x85, 0x35, 0x3f, 0xcb, 0x61, 0x43, 0x40, 0x85, 0x35, 0x1c,
-0x88, 0x00, 0x68, 0x84, 0x10, 0x10, 0xc9, 0xe1, 0x4a, 0x80, 0x85, 0x35,
-0x3d, 0xcb, 0x61, 0x43, 0x00, 0x85, 0x35, 0x1b, 0x92, 0x38, 0x81, 0x91,
-0x68, 0x91, 0x18, 0x90, 0x80, 0x90, 0x40, 0x80, 0xa4, 0x54, 0x38, 0x3a,
-0x88, 0x80, 0xa4, 0x54, 0x30, 0x3a, 0x85, 0x90, 0x28, 0x81, 0x3a, 0x84,
-0x90, 0x38, 0xa4, 0x54, 0x10, 0x3a, 0x83, 0xa4, 0x54, 0x00, 0x3a, 0x81,
-0x90, 0x28, 0x80, 0x3a, 0x7f, 0x80, 0x3a, 0x7e, 0x80, 0x90, 0x40, 0x10,
-0x10, 0x80, 0x24, 0x53, 0xe8, 0x10, 0x10, 0x90, 0x38, 0xa4, 0x53, 0xd8,
-0x3a, 0x7c, 0xa4, 0x53, 0xc8, 0x3a, 0x7a, 0x90, 0x28, 0x80, 0x3a, 0x77,
-0x80, 0x3a, 0x76, 0x9a, 0xd0, 0x03, 0xe0, 0x91, 0x60, 0x90, 0xb0, 0x88,
-0x00, 0x68, 0x84, 0x10, 0x10, 0xc9, 0xe1, 0x4a, 0x00, 0x85, 0x35, 0x39,
-0xcb, 0x61, 0x42, 0x80, 0x85, 0x35, 0x19, 0x88, 0x00, 0x68, 0x84, 0x10,
-0x10, 0xc9, 0xe1, 0x49, 0xc0, 0x85, 0x35, 0x37, 0xcb, 0x61, 0x42, 0x40,
-0x85, 0x35, 0x18, 0x90, 0xb0, 0x88, 0x00, 0x68, 0x84, 0x10, 0x10, 0xc9,
-0xe1, 0x49, 0x80, 0x85, 0x35, 0x35, 0xcb, 0x61, 0x42, 0x00, 0x85, 0x35,
-0x17, 0x88, 0x00, 0x68, 0x84, 0x10, 0x10, 0xc9, 0xe1, 0x49, 0x40, 0x85,
-0x35, 0x33, 0xcb, 0x61, 0x41, 0xc0, 0x85, 0x35, 0x16, 0x90, 0x90, 0x90,
-0x48, 0xcb, 0xa1, 0x40, 0x00, 0x85, 0x35, 0x05, 0xcb, 0xa1, 0x3f, 0xc0,
-0x85, 0x35, 0x04, 0x90, 0x48, 0xcb, 0xa1, 0x3f, 0x80, 0x85, 0x35, 0x03,
-0xcb, 0xa1, 0x3f, 0x40, 0x85, 0x35, 0x02, 0xcb, 0xa2, 0x94, 0xc0, 0x80,
-0x3a, 0x54, 0x92, 0x40, 0x91, 0x20, 0x90, 0x90, 0x90, 0x48, 0x8c, 0x27,
-0x60, 0x84, 0x24, 0x27, 0xd8, 0x8c, 0x27, 0x58, 0x84, 0x24, 0x27, 0xd0,
-0x90, 0x48, 0x8c, 0x27, 0x50, 0x84, 0x24, 0x27, 0xc8, 0x8c, 0x27, 0x48,
-0x84, 0x24, 0x27, 0xc0, 0x90, 0x90, 0x90, 0x48, 0x8c, 0x27, 0x38, 0x84,
-0x24, 0x27, 0xb0, 0x8c, 0x27, 0x30, 0x84, 0x24, 0x27, 0xa8, 0x90, 0x48,
-0x8c, 0x27, 0x28, 0x84, 0x24, 0x27, 0xa0, 0x8c, 0x27, 0x20, 0x84, 0x24,
-0x27, 0x98, 0x91, 0x20, 0x90, 0x90, 0x90, 0x48, 0x8c, 0x27, 0x10, 0x84,
-0x24, 0x27, 0x88, 0x8c, 0x27, 0x08, 0x84, 0x24, 0x27, 0x80, 0x90, 0x48,
-0x8c, 0x27, 0x00, 0x84, 0x24, 0x27, 0x78, 0x8c, 0x26, 0xf8, 0x84, 0x24,
-0x27, 0x70, 0x90, 0x38, 0xa4, 0x26, 0xe0, 0x34, 0xdd, 0xa4, 0x26, 0xd0,
-0x34, 0xdb, 0xa0, 0x0f, 0x50, 0xa0, 0x09, 0x08, 0x9a, 0x30, 0x04, 0x40,
-0x91, 0x90, 0x90, 0xc8, 0x98, 0x50, 0x00, 0x80, 0xe5, 0x22, 0x92, 0xc0,
-0x3a, 0x43, 0xe5, 0x22, 0x8a, 0xc0, 0x3a, 0x3f, 0xcb, 0x61, 0x32, 0x40,
-0x85, 0x34, 0xd8, 0x98, 0x50, 0x00, 0x80, 0xe5, 0x22, 0x82, 0xc0, 0x3a,
-0x03, 0xe5, 0x22, 0x7a, 0xc0, 0x39, 0xff, 0xcb, 0x61, 0x32, 0x00, 0x85,
-0x34, 0xd7, 0x90, 0x48, 0xcb, 0xa1, 0x31, 0xc0, 0x85, 0x34, 0xd6, 0xcb,
-0xa1, 0x31, 0x80, 0x85, 0x34, 0xd5, 0x91, 0x90, 0x90, 0xc8, 0x98, 0x50,
-0x00, 0x80, 0xe5, 0x22, 0x6c, 0xc0, 0x39, 0xcb, 0xe5, 0x22, 0x60, 0xc0,
-0x39, 0x9b, 0xcb, 0x61, 0x31, 0x00, 0x85, 0x34, 0xd3, 0x98, 0x50, 0x00,
-0x80, 0xe5, 0x22, 0x54, 0xc0, 0x39, 0x6b, 0xe5, 0x22, 0x48, 0xc0, 0x39,
-0x3b, 0xcb, 0x61, 0x30, 0xc0, 0x85, 0x34, 0xd2, 0x90, 0x48, 0xcb, 0xa1,
-0x30, 0x80, 0x85, 0x34, 0xd1, 0xcb, 0xa1, 0x30, 0x40, 0x85, 0x34, 0xd0,
-0x92, 0x20, 0x91, 0x30, 0x90, 0xb8, 0xd5, 0x03, 0x00, 0xc0, 0xc0, 0x81,
-0x8c, 0x01, 0xa0, 0x84, 0x30, 0x3e, 0xc0, 0xc0, 0x81, 0x8c, 0x01, 0x80,
-0x84, 0x30, 0x3c, 0xd5, 0x02, 0x00, 0xc0, 0xc0, 0x81, 0x30, 0x28, 0xc0,
-0xc0, 0x81, 0x30, 0x24, 0x90, 0x78, 0xd5, 0x02, 0x00, 0xc0, 0xc0, 0x81,
-0x30, 0x1c, 0xc0, 0xc0, 0x81, 0x30, 0x18, 0xd5, 0x02, 0x00, 0xc0, 0xc0,
-0x81, 0x30, 0x10, 0xc0, 0xc0, 0x81, 0x30, 0x0c, 0x91, 0x70, 0x90, 0xd8,
-0xd5, 0x03, 0x80, 0xc8, 0xe2, 0x40, 0xc0, 0x81, 0x8c, 0x01, 0xc0, 0x84,
-0x30, 0x40, 0xc8, 0xe2, 0x42, 0xc0, 0x81, 0x8c, 0x01, 0x90, 0x84, 0x30,
-0x3d, 0xd5, 0x02, 0x80, 0xc8, 0xe2, 0x3f, 0xc0, 0x81, 0x30, 0x2c, 0xc8,
-0xe2, 0x3a, 0x40, 0x81, 0x30, 0x26, 0x90, 0x98, 0xd5, 0x02, 0x80, 0xc8,
-0xe2, 0x2f, 0x40, 0x81, 0x30, 0x20, 0xc8, 0xe2, 0x31, 0x40, 0x81, 0x30,
-0x1a, 0xd5, 0x02, 0x80, 0xc8, 0xe2, 0x2e, 0x40, 0x81, 0x30, 0x14, 0xc8,
-0xe2, 0x28, 0xc0, 0x81, 0x30, 0x0e, 0x9a, 0x30, 0x04, 0x40, 0x91, 0x90,
-0x90, 0xc8, 0x98, 0x50, 0x00, 0x80, 0xe5, 0x22, 0x86, 0xc0, 0x3a, 0x13,
-0xe5, 0x22, 0x88, 0xc0, 0x3a, 0x37, 0xcb, 0x61, 0x2f, 0xc0, 0x85, 0x34,
-0xce, 0x98, 0x50, 0x00, 0x80, 0xe5, 0x22, 0x76, 0xc0, 0x39, 0xd3, 0xe5,
-0x22, 0x78, 0xc0, 0x39, 0xf7, 0xcb, 0x61, 0x2f, 0x80, 0x85, 0x34, 0xcd,
-0x90, 0x48, 0xcb, 0xa1, 0x2f, 0x40, 0x85, 0x34, 0xcc, 0xcb, 0xa1, 0x2f,
-0x00, 0x85, 0x34, 0xcb, 0x91, 0x90, 0x90, 0xc8, 0x98, 0x50, 0x00, 0x80,
-0xe5, 0x22, 0x68, 0xc0, 0x39, 0xbb, 0xe5, 0x22, 0x5c, 0xc0, 0x39, 0x8b,
-0xcb, 0x61, 0x2d, 0x40, 0x85, 0x34, 0xba, 0x98, 0x50, 0x00, 0x80, 0xe5,
-0x22, 0x50, 0xc0, 0x39, 0x5b, 0xe5, 0x22, 0x44, 0xc0, 0x39, 0x2b, 0xcb,
-0x61, 0x2d, 0x00, 0x85, 0x34, 0xb9, 0x90, 0x48, 0xcb, 0xa1, 0x2c, 0xc0,
-0x85, 0x34, 0xb8, 0xcb, 0xa1, 0x2c, 0x80, 0x85, 0x34, 0xb7, 0x91, 0x00,
-0x90, 0x80, 0x90, 0x40, 0xe5, 0x20, 0x02, 0x40, 0x30, 0x0a, 0xe5, 0x20,
-0x01, 0x80, 0x30, 0x07, 0x90, 0x40, 0xe5, 0x20, 0x00, 0xc0, 0x30, 0x04,
-0xe5, 0x20, 0x00, 0x00, 0x30, 0x01, 0x90, 0x80, 0x90, 0x40, 0xe5, 0x22,
-0x35, 0xc0, 0x38, 0xcd, 0xe5, 0x22, 0x38, 0x00, 0x38, 0xf5, 0x90, 0x40,
-0xe5, 0x22, 0x24, 0x40, 0x38, 0x87, 0xe5, 0x22, 0x26, 0x80, 0x38, 0xaf,
-0x80, 0x99, 0x28, 0x02, 0xf0, 0x8c, 0x25, 0x48, 0x90, 0x80, 0x90, 0x40,
-0xe5, 0x22, 0x8c, 0xc0, 0x3a, 0x2f, 0xe5, 0x22, 0x89, 0xc0, 0x3a, 0x3b,
-0x90, 0x40, 0xe5, 0x22, 0x7c, 0xc0, 0x39, 0xef, 0xe5, 0x22, 0x79, 0xc0,
-0x39, 0xfb, 0x91, 0x48, 0x90, 0xc8, 0x98, 0x50, 0x00, 0x80, 0xe5, 0x22,
-0x6a, 0xc0, 0x39, 0xc3, 0xe5, 0x22, 0x5e, 0xc0, 0x39, 0x93, 0xcb, 0x61,
-0x2b, 0x00, 0x85, 0x34, 0xb0, 0x90, 0x40, 0xe5, 0x22, 0x52, 0xc0, 0x39,
-0x63, 0xe5, 0x22, 0x46, 0xc0, 0x39, 0x33, 0x90, 0x48, 0xcb, 0xa1, 0x2a,
-0x80, 0x85, 0x34, 0xae, 0xcb, 0xa1, 0x2a, 0xc0, 0x85, 0x34, 0xaf, 0x10,
-0x10, 0x90, 0x80, 0x90, 0x40, 0xe5, 0x22, 0x3c, 0x40, 0x38, 0xed, 0xe5,
-0x22, 0x39, 0x40, 0x38, 0xfb, 0x90, 0x40, 0xe5, 0x22, 0x2a, 0xc0, 0x38,
-0xa7, 0xe5, 0x22, 0x27, 0xc0, 0x38, 0xb5,
-};
-
-static const struct ia64_dis_names ia64_dis_names[] = {
-{ 0x51, 41, 0, 10 },
-{ 0x31, 41, 1, 20 },
-{ 0x11, 42, 0, 19 },
-{ 0x29, 41, 0, 12 },
-{ 0x19, 41, 1, 24 },
-{ 0x9, 42, 0, 23 },
-{ 0x15, 41, 0, 14 },
-{ 0xd, 41, 1, 28 },
-{ 0x5, 42, 0, 27 },
-{ 0xb, 41, 0, 16 },
-{ 0x7, 41, 1, 32 },
-{ 0x3, 42, 0, 31 },
-{ 0x51, 39, 1, 58 },
-{ 0x50, 39, 0, 34 },
-{ 0xd1, 39, 1, 57 },
-{ 0xd0, 39, 0, 33 },
-{ 0x31, 39, 1, 68 },
-{ 0x30, 39, 1, 44 },
-{ 0x11, 40, 1, 67 },
-{ 0x10, 40, 0, 43 },
-{ 0x71, 39, 1, 66 },
-{ 0x70, 39, 1, 42 },
-{ 0x31, 40, 1, 65 },
-{ 0x30, 40, 0, 41 },
-{ 0x29, 39, 1, 60 },
-{ 0x28, 39, 0, 36 },
-{ 0x69, 39, 1, 59 },
-{ 0x68, 39, 0, 35 },
-{ 0x19, 39, 1, 72 },
-{ 0x18, 39, 1, 48 },
-{ 0x9, 40, 1, 71 },
-{ 0x8, 40, 0, 47 },
-{ 0x39, 39, 1, 70 },
-{ 0x38, 39, 1, 46 },
-{ 0x19, 40, 1, 69 },
-{ 0x18, 40, 0, 45 },
-{ 0x15, 39, 1, 62 },
-{ 0x14, 39, 0, 38 },
-{ 0x35, 39, 1, 61 },
-{ 0x34, 39, 0, 37 },
-{ 0xd, 39, 1, 76 },
-{ 0xc, 39, 1, 52 },
-{ 0x5, 40, 1, 75 },
-{ 0x4, 40, 0, 51 },
-{ 0x1d, 39, 1, 74 },
-{ 0x1c, 39, 1, 50 },
-{ 0xd, 40, 1, 73 },
-{ 0xc, 40, 0, 49 },
-{ 0xb, 39, 1, 64 },
-{ 0xa, 39, 0, 40 },
-{ 0x1b, 39, 1, 63 },
-{ 0x1a, 39, 0, 39 },
-{ 0x7, 39, 1, 80 },
-{ 0x6, 39, 1, 56 },
-{ 0x3, 40, 1, 79 },
-{ 0x2, 40, 0, 55 },
-{ 0xf, 39, 1, 78 },
-{ 0xe, 39, 1, 54 },
-{ 0x7, 40, 1, 77 },
-{ 0x6, 40, 0, 53 },
-{ 0x8, 38, 0, 82 },
-{ 0x18, 38, 0, 81 },
-{ 0x1, 38, 1, 86 },
-{ 0x2, 38, 0, 85 },
-{ 0x3, 38, 1, 84 },
-{ 0x4, 38, 0, 83 },
-{ 0x1, 336, 0, 87 },
-{ 0x20, 289, 0, 98 },
-{ 0x220, 289, 0, 94 },
-{ 0x1220, 289, 0, 91 },
-{ 0xa20, 289, 0, 92 },
-{ 0x620, 289, 0, 93 },
-{ 0x120, 289, 0, 95 },
-{ 0xa0, 289, 0, 96 },
-{ 0x60, 289, 0, 97 },
-{ 0x10, 289, 0, 102 },
-{ 0x90, 289, 0, 99 },
-{ 0x50, 289, 0, 100 },
-{ 0x30, 289, 0, 101 },
-{ 0x8, 289, 0, 103 },
-{ 0x4, 289, 0, 104 },
-{ 0x2, 289, 0, 105 },
-{ 0x1, 289, 0, 106 },
-{ 0x1, 411, 0, 108 },
-{ 0x3, 411, 0, 107 },
-{ 0x2, 417, 0, 109 },
-{ 0x1, 417, 0, 110 },
-{ 0x2, 413, 0, 111 },
-{ 0x1, 413, 0, 112 },
-{ 0x2, 415, 0, 113 },
-{ 0x1, 415, 0, 114 },
-{ 0x2, 419, 0, 115 },
-{ 0x1, 419, 0, 116 },
-{ 0x1, 268, 0, 143 },
-{ 0x5, 268, 0, 141 },
-{ 0x3, 268, 0, 142 },
-{ 0x140, 277, 0, 119 },
-{ 0x540, 277, 0, 117 },
-{ 0x340, 277, 0, 118 },
-{ 0xc0, 277, 0, 131 },
-{ 0x2c0, 277, 0, 129 },
-{ 0x1c0, 277, 0, 130 },
-{ 0x20, 277, 0, 146 },
-{ 0xa0, 277, 0, 144 },
-{ 0x60, 277, 0, 145 },
-{ 0x10, 277, 0, 158 },
-{ 0x50, 277, 0, 156 },
-{ 0x30, 277, 0, 157 },
-{ 0x8, 277, 0, 170 },
-{ 0x28, 277, 0, 168 },
-{ 0x18, 277, 0, 169 },
-{ 0x4, 277, 0, 180 },
-{ 0x2, 277, 0, 181 },
-{ 0x1, 277, 0, 182 },
-{ 0x140, 271, 0, 122 },
-{ 0x540, 271, 0, 120 },
-{ 0x340, 271, 0, 121 },
-{ 0xc0, 271, 0, 134 },
-{ 0x2c0, 271, 0, 132 },
-{ 0x1c0, 271, 0, 133 },
-{ 0x20, 271, 0, 149 },
-{ 0xa0, 271, 0, 147 },
-{ 0x60, 271, 0, 148 },
-{ 0x10, 271, 0, 161 },
-{ 0x50, 271, 0, 159 },
-{ 0x30, 271, 0, 160 },
-{ 0x8, 271, 0, 173 },
-{ 0x28, 271, 0, 171 },
-{ 0x18, 271, 0, 172 },
-{ 0x4, 271, 0, 183 },
-{ 0x2, 271, 0, 184 },
-{ 0x1, 271, 0, 185 },
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-{ 0x2c0, 274, 0, 135 },
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-{ 0x20, 274, 0, 152 },
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-{ 0x10, 274, 0, 164 },
-{ 0x50, 274, 0, 162 },
-{ 0x30, 274, 0, 163 },
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-{ 0x28, 274, 0, 174 },
-{ 0x18, 274, 0, 175 },
-{ 0x4, 274, 0, 186 },
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-{ 0x1, 274, 0, 188 },
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-{ 0xc0, 286, 0, 140 },
-{ 0x2c0, 286, 0, 138 },
-{ 0x1c0, 286, 0, 139 },
-{ 0x20, 286, 0, 155 },
-{ 0xa0, 286, 0, 153 },
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-{ 0x10, 286, 0, 167 },
-{ 0x50, 286, 0, 165 },
-{ 0x30, 286, 0, 166 },
-{ 0x8, 286, 0, 179 },
-{ 0x28, 286, 0, 177 },
-{ 0x18, 286, 0, 178 },
-{ 0x4, 286, 0, 189 },
-{ 0x2, 286, 0, 190 },
-{ 0x1, 286, 0, 191 },
-{ 0x8, 390, 0, 192 },
-{ 0x4, 390, 0, 193 },
-{ 0x2, 390, 0, 194 },
-{ 0x1, 390, 0, 195 },
-{ 0x20, 288, 0, 203 },
-{ 0x220, 288, 0, 199 },
-{ 0x1220, 288, 0, 196 },
-{ 0xa20, 288, 0, 197 },
-{ 0x620, 288, 0, 198 },
-{ 0x120, 288, 0, 200 },
-{ 0xa0, 288, 0, 201 },
-{ 0x60, 288, 0, 202 },
-{ 0x10, 288, 0, 207 },
-{ 0x90, 288, 0, 204 },
-{ 0x50, 288, 0, 205 },
-{ 0x30, 288, 0, 206 },
-{ 0x8, 288, 0, 208 },
-{ 0x4, 288, 0, 209 },
-{ 0x2, 288, 0, 210 },
-{ 0x1, 288, 0, 211 },
-{ 0x20, 287, 0, 219 },
-{ 0x220, 287, 0, 215 },
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-{ 0x120, 287, 0, 216 },
-{ 0xa0, 287, 0, 217 },
-{ 0x60, 287, 0, 218 },
-{ 0x10, 287, 0, 223 },
-{ 0x90, 287, 0, 220 },
-{ 0x50, 287, 0, 221 },
-{ 0x30, 287, 0, 222 },
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-{ 0x4, 287, 0, 225 },
-{ 0x2, 287, 0, 226 },
-{ 0x1, 287, 0, 227 },
-{ 0x140, 279, 0, 230 },
-{ 0x540, 279, 0, 228 },
-{ 0x340, 279, 0, 229 },
-{ 0xc0, 279, 0, 239 },
-{ 0x2c0, 279, 0, 237 },
-{ 0x1c0, 279, 0, 238 },
-{ 0x20, 279, 0, 248 },
-{ 0xa0, 279, 0, 246 },
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-{ 0x10, 279, 0, 257 },
-{ 0x50, 279, 0, 255 },
-{ 0x30, 279, 0, 256 },
-{ 0x8, 279, 0, 266 },
-{ 0x28, 279, 0, 264 },
-{ 0x18, 279, 0, 265 },
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-{ 0x2, 279, 0, 274 },
-{ 0x1, 279, 0, 275 },
-{ 0x140, 281, 0, 233 },
-{ 0x540, 281, 0, 231 },
-{ 0x340, 281, 0, 232 },
-{ 0xc0, 281, 0, 242 },
-{ 0x2c0, 281, 0, 240 },
-{ 0x1c0, 281, 0, 241 },
-{ 0x20, 281, 0, 251 },
-{ 0xa0, 281, 0, 249 },
-{ 0x60, 281, 0, 250 },
-{ 0x10, 281, 0, 260 },
-{ 0x50, 281, 0, 258 },
-{ 0x30, 281, 0, 259 },
-{ 0x8, 281, 0, 269 },
-{ 0x28, 281, 0, 267 },
-{ 0x18, 281, 0, 268 },
-{ 0x4, 281, 0, 276 },
-{ 0x2, 281, 0, 277 },
-{ 0x1, 281, 0, 278 },
-{ 0x140, 283, 0, 236 },
-{ 0x540, 283, 0, 234 },
-{ 0x340, 283, 0, 235 },
-{ 0xc0, 283, 0, 245 },
-{ 0x2c0, 283, 0, 243 },
-{ 0x1c0, 283, 0, 244 },
-{ 0x20, 283, 0, 254 },
-{ 0xa0, 283, 0, 252 },
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-{ 0x10, 283, 0, 263 },
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-{ 0x30, 283, 0, 262 },
-{ 0x8, 283, 0, 272 },
-{ 0x28, 283, 0, 270 },
-{ 0x18, 283, 0, 271 },
-{ 0x4, 283, 0, 279 },
-{ 0x2, 283, 0, 280 },
-{ 0x1, 283, 0, 281 },
-{ 0x140, 278, 0, 284 },
-{ 0x540, 278, 0, 282 },
-{ 0x340, 278, 0, 283 },
-{ 0xc0, 278, 0, 293 },
-{ 0x2c0, 278, 0, 291 },
-{ 0x1c0, 278, 0, 292 },
-{ 0x20, 278, 0, 302 },
-{ 0xa0, 278, 0, 300 },
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-{ 0x10, 278, 0, 311 },
-{ 0x50, 278, 0, 309 },
-{ 0x30, 278, 0, 310 },
-{ 0x8, 278, 0, 320 },
-{ 0x28, 278, 0, 318 },
-{ 0x18, 278, 0, 319 },
-{ 0x4, 278, 0, 327 },
-{ 0x2, 278, 0, 328 },
-{ 0x1, 278, 0, 329 },
-{ 0x140, 280, 0, 287 },
-{ 0x540, 280, 0, 285 },
-{ 0x340, 280, 0, 286 },
-{ 0xc0, 280, 0, 296 },
-{ 0x2c0, 280, 0, 294 },
-{ 0x1c0, 280, 0, 295 },
-{ 0x20, 280, 0, 305 },
-{ 0xa0, 280, 0, 303 },
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-{ 0x10, 280, 0, 314 },
-{ 0x50, 280, 0, 312 },
-{ 0x30, 280, 0, 313 },
-{ 0x8, 280, 0, 323 },
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-{ 0x2, 280, 0, 331 },
-{ 0x1, 280, 0, 332 },
-{ 0x140, 282, 0, 290 },
-{ 0x540, 282, 0, 288 },
-{ 0x340, 282, 0, 289 },
-{ 0xc0, 282, 0, 299 },
-{ 0x2c0, 282, 0, 297 },
-{ 0x1c0, 282, 0, 298 },
-{ 0x20, 282, 0, 308 },
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-{ 0x30, 282, 0, 316 },
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-{ 0x1, 282, 0, 335 },
-{ 0x1, 410, 0, 337 },
-{ 0x3, 410, 0, 336 },
-{ 0x2, 416, 0, 338 },
-{ 0x1, 416, 0, 339 },
-{ 0x2, 412, 0, 340 },
-{ 0x1, 412, 0, 341 },
-{ 0x2, 414, 0, 342 },
-{ 0x1, 414, 0, 343 },
-{ 0x2, 418, 0, 344 },
-{ 0x1, 418, 0, 345 },
-{ 0x1, 267, 0, 372 },
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-{ 0x3, 267, 0, 371 },
-{ 0x140, 276, 0, 348 },
-{ 0x540, 276, 0, 346 },
-{ 0x340, 276, 0, 347 },
-{ 0xc0, 276, 0, 360 },
-{ 0x2c0, 276, 0, 358 },
-{ 0x1c0, 276, 0, 359 },
-{ 0x20, 276, 0, 375 },
-{ 0xa0, 276, 0, 373 },
-{ 0x60, 276, 0, 374 },
-{ 0x10, 276, 0, 387 },
-{ 0x50, 276, 0, 385 },
-{ 0x30, 276, 0, 386 },
-{ 0x8, 276, 0, 399 },
-{ 0x28, 276, 0, 397 },
-{ 0x18, 276, 0, 398 },
-{ 0x4, 276, 0, 409 },
-{ 0x2, 276, 0, 410 },
-{ 0x1, 276, 0, 411 },
-{ 0x140, 270, 0, 351 },
-{ 0x540, 270, 0, 349 },
-{ 0x340, 270, 0, 350 },
-{ 0xc0, 270, 0, 363 },
-{ 0x2c0, 270, 0, 361 },
-{ 0x1c0, 270, 0, 362 },
-{ 0x20, 270, 0, 378 },
-{ 0xa0, 270, 0, 376 },
-{ 0x60, 270, 0, 377 },
-{ 0x10, 270, 0, 390 },
-{ 0x50, 270, 0, 388 },
-{ 0x30, 270, 0, 389 },
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-{ 0x28, 270, 0, 400 },
-{ 0x18, 270, 0, 401 },
-{ 0x4, 270, 0, 412 },
-{ 0x2, 270, 0, 413 },
-{ 0x1, 270, 0, 414 },
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-{ 0x540, 273, 0, 352 },
-{ 0x340, 273, 0, 353 },
-{ 0xc0, 273, 0, 366 },
-{ 0x2c0, 273, 0, 364 },
-{ 0x1c0, 273, 0, 365 },
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-{ 0xa0, 273, 0, 379 },
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-{ 0x10, 273, 0, 393 },
-{ 0x50, 273, 0, 391 },
-{ 0x30, 273, 0, 392 },
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-{ 0x28, 273, 0, 403 },
-{ 0x18, 273, 0, 404 },
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-{ 0x2, 273, 0, 416 },
-{ 0x1, 273, 0, 417 },
-{ 0x140, 285, 0, 357 },
-{ 0x540, 285, 0, 355 },
-{ 0x340, 285, 0, 356 },
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-{ 0x2c0, 285, 0, 367 },
-{ 0x1c0, 285, 0, 368 },
-{ 0x20, 285, 0, 384 },
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-{ 0x10, 285, 0, 396 },
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-{ 0x30, 285, 0, 395 },
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-{ 0x28, 285, 0, 406 },
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-{ 0x4, 285, 0, 418 },
-{ 0x2, 285, 0, 419 },
-{ 0x1, 285, 0, 420 },
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-{ 0x5, 266, 0, 445 },
-{ 0x3, 266, 0, 446 },
-{ 0x140, 275, 0, 423 },
-{ 0x540, 275, 0, 421 },
-{ 0x340, 275, 0, 422 },
-{ 0xc0, 275, 0, 435 },
-{ 0x2c0, 275, 0, 433 },
-{ 0x1c0, 275, 0, 434 },
-{ 0x20, 275, 0, 450 },
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-{ 0x10, 275, 0, 462 },
-{ 0x50, 275, 0, 460 },
-{ 0x30, 275, 0, 461 },
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-{ 0x28, 275, 0, 472 },
-{ 0x18, 275, 0, 473 },
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-{ 0x1, 275, 0, 486 },
-{ 0x140, 269, 0, 426 },
-{ 0x540, 269, 0, 424 },
-{ 0x340, 269, 0, 425 },
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-{ 0x30, 269, 0, 464 },
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-{ 0x28, 269, 0, 475 },
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-{ 0x1, 269, 0, 489 },
-{ 0x140, 272, 0, 429 },
-{ 0x540, 272, 0, 427 },
-{ 0x340, 272, 0, 428 },
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-{ 0x1, 284, 0, 495 },
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-{ 0xc, 409, 0, 498 },
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-{ 0x1, 409, 0, 507 },
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-{ 0xc, 407, 0, 500 },
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-{ 0x1, 407, 0, 509 },
-{ 0x4, 405, 0, 503 },
-{ 0xc, 405, 0, 502 },
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-{ 0x1, 405, 0, 511 },
-{ 0x4, 401, 0, 505 },
-{ 0xc, 401, 0, 504 },
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-{ 0x1, 401, 0, 513 },
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-{ 0x280, 265, 0, 553 },
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-{ 0x40, 265, 0, 567 },
-{ 0x140, 265, 0, 565 },
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-{ 0x10, 265, 0, 591 },
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-{ 0x28, 265, 0, 601 },
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-{ 0x2, 265, 0, 614 },
-{ 0x1, 265, 0, 615 },
-{ 0x500, 261, 0, 531 },
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-{ 0xd00, 261, 0, 530 },
-{ 0x300, 261, 0, 543 },
-{ 0x1300, 261, 0, 519 },
-{ 0x5300, 261, 0, 517 },
-{ 0x3300, 261, 0, 518 },
-{ 0xb00, 261, 0, 541 },
-{ 0x700, 261, 0, 542 },
-{ 0x80, 261, 0, 558 },
-{ 0x280, 261, 0, 556 },
-{ 0x180, 261, 0, 557 },
-{ 0x40, 261, 0, 570 },
-{ 0x140, 261, 0, 568 },
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-{ 0x20, 261, 0, 582 },
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-{ 0x60, 261, 0, 581 },
-{ 0x10, 261, 0, 594 },
-{ 0x50, 261, 0, 592 },
-{ 0x30, 261, 0, 593 },
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-{ 0x2, 261, 0, 617 },
-{ 0x1, 261, 0, 618 },
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-{ 0x1500, 258, 0, 532 },
-{ 0xd00, 258, 0, 533 },
-{ 0x300, 258, 0, 546 },
-{ 0x1300, 258, 0, 522 },
-{ 0x5300, 258, 0, 520 },
-{ 0x3300, 258, 0, 521 },
-{ 0xb00, 258, 0, 544 },
-{ 0x700, 258, 0, 545 },
-{ 0x80, 258, 0, 561 },
-{ 0x280, 258, 0, 559 },
-{ 0x180, 258, 0, 560 },
-{ 0x40, 258, 0, 573 },
-{ 0x140, 258, 0, 571 },
-{ 0xc0, 258, 0, 572 },
-{ 0x20, 258, 0, 585 },
-{ 0xa0, 258, 0, 583 },
-{ 0x60, 258, 0, 584 },
-{ 0x10, 258, 0, 597 },
-{ 0x50, 258, 0, 595 },
-{ 0x30, 258, 0, 596 },
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-{ 0x28, 258, 0, 607 },
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-{ 0x2, 258, 0, 620 },
-{ 0x1, 258, 0, 621 },
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-{ 0x1500, 253, 0, 535 },
-{ 0xd00, 253, 0, 536 },
-{ 0x300, 253, 0, 549 },
-{ 0x1300, 253, 0, 525 },
-{ 0x5300, 253, 0, 523 },
-{ 0x3300, 253, 0, 524 },
-{ 0xb00, 253, 0, 547 },
-{ 0x700, 253, 0, 548 },
-{ 0x80, 253, 0, 564 },
-{ 0x280, 253, 0, 562 },
-{ 0x180, 253, 0, 563 },
-{ 0x40, 253, 0, 576 },
-{ 0x140, 253, 0, 574 },
-{ 0xc0, 253, 0, 575 },
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-{ 0xa0, 253, 0, 586 },
-{ 0x60, 253, 0, 587 },
-{ 0x10, 253, 0, 600 },
-{ 0x50, 253, 0, 598 },
-{ 0x30, 253, 0, 599 },
-{ 0x8, 253, 0, 612 },
-{ 0x28, 253, 0, 610 },
-{ 0x18, 253, 0, 611 },
-{ 0x4, 253, 0, 622 },
-{ 0x2, 253, 0, 623 },
-{ 0x1, 253, 0, 624 },
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-{ 0x4, 238, 0, 626 },
-{ 0x2, 238, 0, 627 },
-{ 0x1, 238, 0, 628 },
-{ 0x2, 176, 0, 631 },
-{ 0xa, 176, 0, 629 },
-{ 0x6, 176, 0, 630 },
-{ 0x1, 176, 0, 637 },
-{ 0x5, 176, 0, 635 },
-{ 0x3, 176, 0, 636 },
-{ 0x2, 175, 0, 634 },
-{ 0xa, 175, 0, 632 },
-{ 0x6, 175, 0, 633 },
-{ 0x1, 175, 0, 640 },
-{ 0x5, 175, 0, 638 },
-{ 0x3, 175, 0, 639 },
-{ 0x4, 451, 0, 641 },
-{ 0x2, 451, 0, 642 },
-{ 0x1, 451, 0, 643 },
-{ 0x4, 450, 0, 644 },
-{ 0x2, 450, 0, 645 },
-{ 0x1, 450, 0, 646 },
-{ 0x4, 449, 0, 647 },
-{ 0x2, 449, 0, 648 },
-{ 0x1, 449, 0, 649 },
-{ 0x4, 448, 0, 650 },
-{ 0x2, 448, 0, 651 },
-{ 0x1, 448, 0, 652 },
-{ 0x2, 123, 1, 658 },
-{ 0x2, 124, 0, 657 },
-{ 0xa, 123, 1, 654 },
-{ 0xa, 124, 0, 653 },
-{ 0x6, 123, 1, 656 },
-{ 0x6, 124, 0, 655 },
-{ 0x1, 123, 1, 688 },
-{ 0x1, 124, 0, 687 },
-{ 0x5, 123, 1, 684 },
-{ 0x5, 124, 0, 683 },
-{ 0x3, 123, 1, 686 },
-{ 0x3, 124, 0, 685 },
-{ 0x2, 131, 1, 664 },
-{ 0x2, 132, 0, 663 },
-{ 0xa, 131, 1, 660 },
-{ 0xa, 132, 0, 659 },
-{ 0x6, 131, 1, 662 },
-{ 0x6, 132, 0, 661 },
-{ 0x1, 131, 1, 694 },
-{ 0x1, 132, 0, 693 },
-{ 0x5, 131, 1, 690 },
-{ 0x5, 132, 0, 689 },
-{ 0x3, 131, 1, 692 },
-{ 0x3, 132, 0, 691 },
-{ 0x2, 129, 1, 670 },
-{ 0x2, 130, 0, 669 },
-{ 0xa, 129, 1, 666 },
-{ 0xa, 130, 0, 665 },
-{ 0x6, 129, 1, 668 },
-{ 0x6, 130, 0, 667 },
-{ 0x1, 129, 1, 700 },
-{ 0x1, 130, 0, 699 },
-{ 0x5, 129, 1, 696 },
-{ 0x5, 130, 0, 695 },
-{ 0x3, 129, 1, 698 },
-{ 0x3, 130, 0, 697 },
-{ 0x2, 127, 1, 676 },
-{ 0x2, 128, 0, 675 },
-{ 0xa, 127, 1, 672 },
-{ 0xa, 128, 0, 671 },
-{ 0x6, 127, 1, 674 },
-{ 0x6, 128, 0, 673 },
-{ 0x1, 127, 1, 706 },
-{ 0x1, 128, 0, 705 },
-{ 0x5, 127, 1, 702 },
-{ 0x5, 128, 0, 701 },
-{ 0x3, 127, 1, 704 },
-{ 0x3, 128, 0, 703 },
-{ 0x2, 125, 1, 682 },
-{ 0x2, 126, 0, 681 },
-{ 0xa, 125, 1, 678 },
-{ 0xa, 126, 0, 677 },
-{ 0x6, 125, 1, 680 },
-{ 0x6, 126, 0, 679 },
-{ 0x1, 125, 1, 712 },
-{ 0x1, 126, 0, 711 },
-{ 0x5, 125, 1, 708 },
-{ 0x5, 126, 0, 707 },
-{ 0x3, 125, 1, 710 },
-{ 0x3, 126, 0, 709 },
-{ 0x4, 402, 1, 718 },
-{ 0x4, 403, 0, 717 },
-{ 0xc, 402, 1, 716 },
-{ 0xc, 403, 0, 715 },
-{ 0x2, 402, 1, 728 },
-{ 0x2, 403, 0, 727 },
-{ 0x1, 402, 1, 730 },
-{ 0x1, 403, 0, 729 },
-{ 0x8, 408, 0, 714 },
-{ 0x18, 408, 0, 713 },
-{ 0x4, 408, 0, 720 },
-{ 0xc, 408, 0, 719 },
-{ 0x2, 408, 0, 731 },
-{ 0x1, 408, 0, 732 },
-{ 0x4, 406, 0, 722 },
-{ 0xc, 406, 0, 721 },
-{ 0x2, 406, 0, 733 },
-{ 0x1, 406, 0, 734 },
-{ 0x4, 404, 0, 724 },
-{ 0xc, 404, 0, 723 },
-{ 0x2, 404, 0, 735 },
-{ 0x1, 404, 0, 736 },
-{ 0x4, 400, 0, 726 },
-{ 0xc, 400, 0, 725 },
-{ 0x2, 400, 0, 737 },
-{ 0x1, 400, 0, 738 },
-{ 0xa00, 264, 0, 753 },
-{ 0x2a00, 264, 0, 751 },
-{ 0x1a00, 264, 0, 752 },
-{ 0x600, 264, 0, 765 },
-{ 0x2600, 264, 0, 741 },
-{ 0xa600, 264, 0, 739 },
-{ 0x6600, 264, 0, 740 },
-{ 0x1600, 264, 0, 763 },
-{ 0xe00, 264, 0, 764 },
-{ 0x100, 264, 0, 777 },
-{ 0x500, 264, 0, 775 },
-{ 0x300, 264, 0, 776 },
-{ 0x80, 264, 0, 780 },
-{ 0x280, 264, 0, 778 },
-{ 0x180, 264, 0, 779 },
-{ 0x40, 264, 0, 792 },
-{ 0x140, 264, 0, 790 },
-{ 0xc0, 264, 0, 791 },
-{ 0x20, 264, 0, 804 },
-{ 0xa0, 264, 0, 802 },
-{ 0x60, 264, 0, 803 },
-{ 0x10, 264, 0, 816 },
-{ 0x50, 264, 0, 814 },
-{ 0x30, 264, 0, 815 },
-{ 0x8, 264, 0, 828 },
-{ 0x28, 264, 0, 826 },
-{ 0x18, 264, 0, 827 },
-{ 0x4, 264, 0, 838 },
-{ 0x2, 264, 0, 839 },
-{ 0x1, 264, 0, 840 },
-{ 0x500, 260, 0, 756 },
-{ 0x1500, 260, 0, 754 },
-{ 0xd00, 260, 0, 755 },
-{ 0x300, 260, 0, 768 },
-{ 0x1300, 260, 0, 744 },
-{ 0x5300, 260, 0, 742 },
-{ 0x3300, 260, 0, 743 },
-{ 0xb00, 260, 0, 766 },
-{ 0x700, 260, 0, 767 },
-{ 0x80, 260, 0, 783 },
-{ 0x280, 260, 0, 781 },
-{ 0x180, 260, 0, 782 },
-{ 0x40, 260, 0, 795 },
-{ 0x140, 260, 0, 793 },
-{ 0xc0, 260, 0, 794 },
-{ 0x20, 260, 0, 807 },
-{ 0xa0, 260, 0, 805 },
-{ 0x60, 260, 0, 806 },
-{ 0x10, 260, 0, 819 },
-{ 0x50, 260, 0, 817 },
-{ 0x30, 260, 0, 818 },
-{ 0x8, 260, 0, 831 },
-{ 0x28, 260, 0, 829 },
-{ 0x18, 260, 0, 830 },
-{ 0x4, 260, 0, 841 },
-{ 0x2, 260, 0, 842 },
-{ 0x1, 260, 0, 843 },
-{ 0x500, 257, 0, 759 },
-{ 0x1500, 257, 0, 757 },
-{ 0xd00, 257, 0, 758 },
-{ 0x300, 257, 0, 771 },
-{ 0x1300, 257, 0, 747 },
-{ 0x5300, 257, 0, 745 },
-{ 0x3300, 257, 0, 746 },
-{ 0xb00, 257, 0, 769 },
-{ 0x700, 257, 0, 770 },
-{ 0x80, 257, 0, 786 },
-{ 0x280, 257, 0, 784 },
-{ 0x180, 257, 0, 785 },
-{ 0x40, 257, 0, 798 },
-{ 0x140, 257, 0, 796 },
-{ 0xc0, 257, 0, 797 },
-{ 0x20, 257, 0, 810 },
-{ 0xa0, 257, 0, 808 },
-{ 0x60, 257, 0, 809 },
-{ 0x10, 257, 0, 822 },
-{ 0x50, 257, 0, 820 },
-{ 0x30, 257, 0, 821 },
-{ 0x8, 257, 0, 834 },
-{ 0x28, 257, 0, 832 },
-{ 0x18, 257, 0, 833 },
-{ 0x4, 257, 0, 844 },
-{ 0x2, 257, 0, 845 },
-{ 0x1, 257, 0, 846 },
-{ 0x500, 252, 0, 762 },
-{ 0x1500, 252, 0, 760 },
-{ 0xd00, 252, 0, 761 },
-{ 0x300, 252, 0, 774 },
-{ 0x1300, 252, 0, 750 },
-{ 0x5300, 252, 0, 748 },
-{ 0x3300, 252, 0, 749 },
-{ 0xb00, 252, 0, 772 },
-{ 0x700, 252, 0, 773 },
-{ 0x80, 252, 0, 789 },
-{ 0x280, 252, 0, 787 },
-{ 0x180, 252, 0, 788 },
-{ 0x40, 252, 0, 801 },
-{ 0x140, 252, 0, 799 },
-{ 0xc0, 252, 0, 800 },
-{ 0x20, 252, 0, 813 },
-{ 0xa0, 252, 0, 811 },
-{ 0x60, 252, 0, 812 },
-{ 0x10, 252, 0, 825 },
-{ 0x50, 252, 0, 823 },
-{ 0x30, 252, 0, 824 },
-{ 0x8, 252, 0, 837 },
-{ 0x28, 252, 0, 835 },
-{ 0x18, 252, 0, 836 },
-{ 0x4, 252, 0, 847 },
-{ 0x2, 252, 0, 848 },
-{ 0x1, 252, 0, 849 },
-{ 0x8, 254, 1, 895 },
-{ 0x8, 255, 0, 894 },
-{ 0x28, 254, 1, 891 },
-{ 0x28, 255, 0, 890 },
-{ 0x18, 254, 1, 893 },
-{ 0x18, 255, 0, 892 },
-{ 0x4, 254, 1, 957 },
-{ 0x4, 255, 0, 956 },
-{ 0x2, 254, 1, 959 },
-{ 0x2, 255, 0, 958 },
-{ 0x1, 254, 1, 961 },
-{ 0x1, 255, 0, 960 },
-{ 0xa00, 262, 0, 865 },
-{ 0x2a00, 262, 0, 863 },
-{ 0x1a00, 262, 0, 864 },
-{ 0x600, 262, 0, 877 },
-{ 0x2600, 262, 0, 853 },
-{ 0xa600, 262, 0, 851 },
-{ 0x6600, 262, 0, 852 },
-{ 0x1600, 262, 0, 875 },
-{ 0xe00, 262, 0, 876 },
-{ 0x100, 262, 0, 889 },
-{ 0x500, 262, 0, 887 },
-{ 0x300, 262, 0, 888 },
-{ 0x80, 262, 0, 898 },
-{ 0x280, 262, 0, 896 },
-{ 0x180, 262, 0, 897 },
-{ 0x40, 262, 0, 910 },
-{ 0x140, 262, 0, 908 },
-{ 0xc0, 262, 0, 909 },
-{ 0x20, 262, 0, 922 },
-{ 0xa0, 262, 0, 920 },
-{ 0x60, 262, 0, 921 },
-{ 0x10, 262, 0, 934 },
-{ 0x50, 262, 0, 932 },
-{ 0x30, 262, 0, 933 },
-{ 0x8, 262, 0, 946 },
-{ 0x28, 262, 0, 944 },
-{ 0x18, 262, 0, 945 },
-{ 0x4, 262, 0, 962 },
-{ 0x2, 262, 0, 963 },
-{ 0x1, 262, 1, 964 },
-{ 0x1, 263, 0, 850 },
-{ 0x500, 259, 0, 868 },
-{ 0x1500, 259, 0, 866 },
-{ 0xd00, 259, 0, 867 },
-{ 0x300, 259, 0, 880 },
-{ 0x1300, 259, 0, 856 },
-{ 0x5300, 259, 0, 854 },
-{ 0x3300, 259, 0, 855 },
-{ 0xb00, 259, 0, 878 },
-{ 0x700, 259, 0, 879 },
-{ 0x80, 259, 0, 901 },
-{ 0x280, 259, 0, 899 },
-{ 0x180, 259, 0, 900 },
-{ 0x40, 259, 0, 913 },
-{ 0x140, 259, 0, 911 },
-{ 0xc0, 259, 0, 912 },
-{ 0x20, 259, 0, 925 },
-{ 0xa0, 259, 0, 923 },
-{ 0x60, 259, 0, 924 },
-{ 0x10, 259, 0, 937 },
-{ 0x50, 259, 0, 935 },
-{ 0x30, 259, 0, 936 },
-{ 0x8, 259, 0, 949 },
-{ 0x28, 259, 0, 947 },
-{ 0x18, 259, 0, 948 },
-{ 0x4, 259, 0, 965 },
-{ 0x2, 259, 0, 966 },
-{ 0x1, 259, 0, 967 },
-{ 0x500, 256, 0, 871 },
-{ 0x1500, 256, 0, 869 },
-{ 0xd00, 256, 0, 870 },
-{ 0x300, 256, 0, 883 },
-{ 0x1300, 256, 0, 859 },
-{ 0x5300, 256, 0, 857 },
-{ 0x3300, 256, 0, 858 },
-{ 0xb00, 256, 0, 881 },
-{ 0x700, 256, 0, 882 },
-{ 0x80, 256, 0, 904 },
-{ 0x280, 256, 0, 902 },
-{ 0x180, 256, 0, 903 },
-{ 0x40, 256, 0, 916 },
-{ 0x140, 256, 0, 914 },
-{ 0xc0, 256, 0, 915 },
-{ 0x20, 256, 0, 928 },
-{ 0xa0, 256, 0, 926 },
-{ 0x60, 256, 0, 927 },
-{ 0x10, 256, 0, 940 },
-{ 0x50, 256, 0, 938 },
-{ 0x30, 256, 0, 939 },
-{ 0x8, 256, 0, 952 },
-{ 0x28, 256, 0, 950 },
-{ 0x18, 256, 0, 951 },
-{ 0x4, 256, 0, 968 },
-{ 0x2, 256, 0, 969 },
-{ 0x1, 256, 0, 970 },
-{ 0x500, 251, 0, 874 },
-{ 0x1500, 251, 0, 872 },
-{ 0xd00, 251, 0, 873 },
-{ 0x300, 251, 0, 886 },
-{ 0x1300, 251, 0, 862 },
-{ 0x5300, 251, 0, 860 },
-{ 0x3300, 251, 0, 861 },
-{ 0xb00, 251, 0, 884 },
-{ 0x700, 251, 0, 885 },
-{ 0x80, 251, 0, 907 },
-{ 0x280, 251, 0, 905 },
-{ 0x180, 251, 0, 906 },
-{ 0x40, 251, 0, 919 },
-{ 0x140, 251, 0, 917 },
-{ 0xc0, 251, 0, 918 },
-{ 0x20, 251, 0, 931 },
-{ 0xa0, 251, 0, 929 },
-{ 0x60, 251, 0, 930 },
-{ 0x10, 251, 0, 943 },
-{ 0x50, 251, 0, 941 },
-{ 0x30, 251, 0, 942 },
-{ 0x8, 251, 0, 955 },
-{ 0x28, 251, 0, 953 },
-{ 0x18, 251, 0, 954 },
-{ 0x4, 251, 0, 971 },
-{ 0x2, 251, 0, 972 },
-{ 0x1, 251, 0, 973 },
-{ 0x2, 150, 0, 975 },
-{ 0x1, 150, 0, 976 },
-{ 0x1, 50, 0, 977 },
-{ 0x3, 49, 0, 978 },
-{ 0x1, 428, 0, 979 },
-{ 0x1, 442, 0, 980 },
-{ 0x2, 386, 0, 983 },
-{ 0x1, 386, 0, 984 },
-{ 0x2, 384, 0, 985 },
-{ 0x1, 384, 0, 986 },
-{ 0x1, 383, 0, 987 },
-{ 0x1, 328, 0, 992 },
-{ 0x1, 327, 0, 993 },
-{ 0x1, 326, 0, 994 },
-{ 0x1, 325, 0, 995 },
-{ 0x1, 250, 0, 996 },
-{ 0x1, 249, 0, 997 },
-{ 0x1, 324, 0, 998 },
-{ 0x1, 323, 0, 999 },
-{ 0x1, 322, 0, 1000 },
-{ 0x1, 321, 0, 1001 },
-{ 0x1, 320, 0, 1002 },
-{ 0x1, 319, 0, 1003 },
-{ 0x1, 318, 0, 1004 },
-{ 0x2, 248, 0, 1005 },
-{ 0x1, 248, 0, 1006 },
-{ 0x2, 366, 0, 1012 },
-{ 0x1, 366, 0, 1013 },
-{ 0x1, 317, 0, 1014 },
-{ 0x1, 316, 0, 1015 },
-{ 0x1, 315, 0, 1016 },
-{ 0x1, 314, 0, 1017 },
-{ 0x1, 8, 1, 1019 },
-{ 0x1, 9, 0, 1018 },
-{ 0x1, 313, 0, 1020 },
-{ 0x1, 312, 0, 1021 },
-{ 0x1, 311, 0, 1022 },
-{ 0x1, 310, 0, 1023 },
-{ 0x1, 388, 0, 1024 },
-{ 0x1, 399, 0, 1025 },
-{ 0x1, 389, 0, 1026 },
-{ 0x1, 423, 0, 1027 },
-{ 0x1, 309, 0, 1031 },
-{ 0x1, 247, 0, 1032 },
-{ 0x1, 177, 0, 1035 },
-{ 0x2, 291, 0, 1039 },
-{ 0x1, 291, 0, 1040 },
-{ 0x1, 236, 0, 1041 },
-{ 0x5, 48, 0, 1043 },
-{ 0x3, 48, 0, 1044 },
-{ 0x5, 47, 0, 1045 },
-{ 0x3, 47, 0, 1046 },
-{ 0x1, 365, 0, 1047 },
-{ 0x1, 373, 0, 1048 },
-{ 0x1, 371, 0, 1049 },
-{ 0x1, 392, 0, 1050 },
-{ 0x1, 372, 0, 1051 },
-{ 0x1, 370, 0, 1052 },
-{ 0x2, 378, 0, 1053 },
-{ 0x1, 378, 0, 1055 },
-{ 0x2, 376, 0, 1054 },
-{ 0x1, 376, 0, 1056 },
-{ 0x2, 396, 0, 1057 },
-{ 0x1, 396, 0, 1060 },
-{ 0x2, 377, 0, 1058 },
-{ 0x1, 377, 0, 1061 },
-{ 0x2, 375, 0, 1059 },
-{ 0x1, 375, 0, 1062 },
-{ 0x1, 338, 0, 1063 },
-{ 0x1, 337, 0, 1064 },
-{ 0x1, 369, 0, 1065 },
-{ 0x1, 360, 0, 1066 },
-{ 0x1, 362, 0, 1067 },
-{ 0x1, 359, 0, 1068 },
-{ 0x1, 361, 0, 1069 },
-{ 0x2, 446, 0, 1070 },
-{ 0x1, 446, 0, 1073 },
-{ 0x2, 445, 0, 1071 },
-{ 0x1, 445, 0, 1074 },
-{ 0x2, 444, 0, 1072 },
-{ 0x1, 444, 0, 1075 },
-{ 0x1, 348, 0, 1076 },
-{ 0x2, 347, 0, 1077 },
-{ 0x1, 347, 0, 1078 },
-{ 0x2, 294, 0, 1079 },
-{ 0x1, 294, 0, 1082 },
-{ 0x2, 293, 0, 1080 },
-{ 0x1, 293, 0, 1083 },
-{ 0x2, 292, 0, 1081 },
-{ 0x1, 292, 0, 1084 },
-{ 0x2, 363, 0, 1085 },
-{ 0x1, 363, 0, 1086 },
-{ 0x2, 364, 0, 1087 },
-{ 0x1, 364, 0, 1088 },
-{ 0xa, 438, 1, 1100 },
-{ 0xa, 439, 1, 1099 },
-{ 0xa, 440, 1, 1098 },
-{ 0xa, 441, 0, 1097 },
-{ 0x1a, 438, 1, 1092 },
-{ 0x1a, 439, 1, 1091 },
-{ 0x32, 440, 1, 1090 },
-{ 0x32, 441, 0, 1089 },
-{ 0x6, 438, 1, 1108 },
-{ 0x6, 439, 1, 1107 },
-{ 0x6, 440, 1, 1106 },
-{ 0x6, 441, 0, 1105 },
-{ 0x1, 438, 1, 1120 },
-{ 0x1, 439, 1, 1119 },
-{ 0x1, 440, 1, 1118 },
-{ 0x1, 441, 0, 1117 },
-{ 0x9, 438, 1, 1104 },
-{ 0x9, 439, 1, 1103 },
-{ 0x9, 440, 1, 1102 },
-{ 0x9, 441, 0, 1101 },
-{ 0x19, 438, 1, 1096 },
-{ 0x19, 439, 1, 1095 },
-{ 0x31, 440, 1, 1094 },
-{ 0x31, 441, 0, 1093 },
-{ 0x5, 438, 1, 1112 },
-{ 0x5, 439, 1, 1111 },
-{ 0x5, 440, 1, 1110 },
-{ 0x5, 441, 0, 1109 },
-{ 0x3, 438, 1, 1116 },
-{ 0x3, 439, 1, 1115 },
-{ 0x3, 440, 1, 1114 },
-{ 0x3, 441, 0, 1113 },
-{ 0xa, 429, 1, 1132 },
-{ 0xa, 430, 1, 1131 },
-{ 0xa, 431, 1, 1130 },
-{ 0xa, 432, 0, 1129 },
-{ 0x1a, 429, 1, 1124 },
-{ 0x1a, 430, 1, 1123 },
-{ 0x32, 431, 1, 1122 },
-{ 0x32, 432, 0, 1121 },
-{ 0x6, 429, 1, 1140 },
-{ 0x6, 430, 1, 1139 },
-{ 0x6, 431, 1, 1138 },
-{ 0x6, 432, 0, 1137 },
-{ 0x1, 429, 1, 1152 },
-{ 0x1, 430, 1, 1151 },
-{ 0x1, 431, 1, 1150 },
-{ 0x1, 432, 0, 1149 },
-{ 0x9, 429, 1, 1136 },
-{ 0x9, 430, 1, 1135 },
-{ 0x9, 431, 1, 1134 },
-{ 0x9, 432, 0, 1133 },
-{ 0x19, 429, 1, 1128 },
-{ 0x19, 430, 1, 1127 },
-{ 0x31, 431, 1, 1126 },
-{ 0x31, 432, 0, 1125 },
-{ 0x5, 429, 1, 1144 },
-{ 0x5, 430, 1, 1143 },
-{ 0x5, 431, 1, 1142 },
-{ 0x5, 432, 0, 1141 },
-{ 0x3, 429, 1, 1148 },
-{ 0x3, 430, 1, 1147 },
-{ 0x3, 431, 1, 1146 },
-{ 0x3, 432, 0, 1145 },
-{ 0xa, 433, 1, 1164 },
-{ 0xa, 434, 1, 1163 },
-{ 0xa, 435, 1, 1162 },
-{ 0xa, 436, 0, 1161 },
-{ 0x1a, 433, 1, 1156 },
-{ 0x1a, 434, 1, 1155 },
-{ 0x32, 435, 1, 1154 },
-{ 0x32, 436, 0, 1153 },
-{ 0x6, 433, 1, 1172 },
-{ 0x6, 434, 1, 1171 },
-{ 0x6, 435, 1, 1170 },
-{ 0x6, 436, 0, 1169 },
-{ 0x1, 433, 1, 1184 },
-{ 0x1, 434, 1, 1183 },
-{ 0x1, 435, 1, 1182 },
-{ 0x1, 436, 0, 1181 },
-{ 0x9, 433, 1, 1168 },
-{ 0x9, 434, 1, 1167 },
-{ 0x9, 435, 1, 1166 },
-{ 0x9, 436, 0, 1165 },
-{ 0x19, 433, 1, 1160 },
-{ 0x19, 434, 1, 1159 },
-{ 0x31, 435, 1, 1158 },
-{ 0x31, 436, 0, 1157 },
-{ 0x5, 433, 1, 1176 },
-{ 0x5, 434, 1, 1175 },
-{ 0x5, 435, 1, 1174 },
-{ 0x5, 436, 0, 1173 },
-{ 0x3, 433, 1, 1180 },
-{ 0x3, 434, 1, 1179 },
-{ 0x3, 435, 1, 1178 },
-{ 0x3, 436, 0, 1177 },
-{ 0x1, 139, 0, 1185 },
-{ 0x1, 138, 0, 1186 },
-{ 0x1, 391, 1, 1188 },
-{ 0x1, 137, 0, 1187 },
-{ 0x2, 395, 1, 1190 },
-{ 0x2, 141, 0, 1189 },
-{ 0x1, 395, 1, 1192 },
-{ 0x1, 141, 0, 1191 },
-{ 0x1, 397, 0, 1193 },
-{ 0x1, 136, 0, 1194 },
-{ 0x2, 135, 0, 1195 },
-{ 0x2, 134, 0, 1196 },
-{ 0x1, 459, 1, 1202 },
-{ 0x1, 246, 0, 1033 },
-{ 0x1, 458, 0, 1203 },
-{ 0x1, 457, 1, 1204 },
-{ 0x1, 245, 0, 1042 },
-{ 0x1, 308, 0, 1205 },
-{ 0x1, 307, 1, 1206 },
-{ 0x1, 290, 0, 1034 },
-{ 0x1, 306, 0, 1207 },
-{ 0x1, 305, 1, 1208 },
-{ 0x1, 427, 0, 1036 },
-{ 0x1, 304, 1, 1209 },
-{ 0x1, 398, 0, 1038 },
-{ 0x1, 303, 0, 1210 },
-{ 0x1, 302, 0, 1211 },
-{ 0x1, 301, 0, 1212 },
-{ 0x1, 300, 1, 1213 },
-{ 0x2, 398, 0, 1037 },
-{ 0x10, 299, 0, 1217 },
-{ 0x90, 299, 0, 1215 },
-{ 0x190, 299, 0, 1214 },
-{ 0x50, 299, 0, 1216 },
-{ 0x30, 299, 0, 1219 },
-{ 0x70, 299, 0, 1218 },
-{ 0x8, 299, 0, 1221 },
-{ 0x18, 299, 0, 1220 },
-{ 0x4, 299, 0, 1222 },
-{ 0x1, 299, 0, 1225 },
-{ 0x3, 299, 0, 1224 },
-{ 0x1, 298, 1, 1226 },
-{ 0x2, 299, 0, 1223 },
-{ 0x3, 46, 0, 1227 },
-{ 0x1, 241, 1, 1228 },
-{ 0x1, 242, 1, 1028 },
-{ 0x1, 243, 0, 88 },
-{ 0x1, 341, 1, 1229 },
-{ 0x1, 342, 1, 1029 },
-{ 0x1, 343, 0, 89 },
-{ 0x1, 34, 1, 1230 },
-{ 0x1, 35, 1, 1030 },
-{ 0x1, 36, 0, 90 },
-{ 0x1, 230, 0, 1231 },
-{ 0x4, 452, 0, 1232 },
-{ 0x2, 452, 0, 1233 },
-{ 0x1, 452, 1, 1235 },
-{ 0x1, 453, 0, 1234 },
-{ 0x8, 454, 0, 1236 },
-{ 0x4, 454, 0, 1237 },
-{ 0x1, 454, 1, 1239 },
-{ 0x2, 454, 0, 1238 },
-{ 0x8, 219, 0, 1240 },
-{ 0x4, 219, 0, 1241 },
-{ 0x2, 219, 0, 1242 },
-{ 0x1, 219, 1, 1244 },
-{ 0x1, 220, 0, 1243 },
-{ 0x10, 221, 0, 1245 },
-{ 0x8, 221, 0, 1246 },
-{ 0x4, 221, 0, 1247 },
-{ 0x1, 221, 1, 1249 },
-{ 0x2, 221, 0, 1248 },
-{ 0x220, 191, 0, 1250 },
-{ 0x120, 191, 0, 1251 },
-{ 0xa0, 191, 0, 1252 },
-{ 0x60, 191, 1, 1254 },
-{ 0x4, 192, 0, 1253 },
-{ 0x110, 191, 0, 1260 },
-{ 0x90, 191, 0, 1261 },
-{ 0x50, 191, 0, 1262 },
-{ 0x30, 191, 1, 1264 },
-{ 0x2, 192, 0, 1263 },
-{ 0x8, 191, 0, 1265 },
-{ 0x4, 191, 0, 1266 },
-{ 0x2, 191, 0, 1267 },
-{ 0x1, 191, 1, 1269 },
-{ 0x1, 192, 0, 1268 },
-{ 0x440, 193, 0, 1255 },
-{ 0x240, 193, 0, 1256 },
-{ 0x140, 193, 0, 1257 },
-{ 0xc0, 193, 1, 1259 },
-{ 0x40, 193, 0, 1258 },
-{ 0x220, 193, 0, 1270 },
-{ 0x120, 193, 0, 1271 },
-{ 0xa0, 193, 0, 1272 },
-{ 0x60, 193, 1, 1274 },
-{ 0x20, 193, 0, 1273 },
-{ 0x10, 193, 0, 1275 },
-{ 0x8, 193, 0, 1276 },
-{ 0x4, 193, 0, 1277 },
-{ 0x1, 193, 1, 1279 },
-{ 0x2, 193, 0, 1278 },
-{ 0x8, 215, 0, 1280 },
-{ 0x4, 215, 0, 1281 },
-{ 0x2, 215, 0, 1282 },
-{ 0x1, 215, 1, 1284 },
-{ 0x1, 216, 0, 1283 },
-{ 0x220, 187, 0, 1285 },
-{ 0x120, 187, 0, 1286 },
-{ 0xa0, 187, 0, 1287 },
-{ 0x60, 187, 1, 1289 },
-{ 0x4, 188, 0, 1288 },
-{ 0x110, 187, 0, 1295 },
-{ 0x90, 187, 0, 1296 },
-{ 0x50, 187, 0, 1297 },
-{ 0x30, 187, 1, 1299 },
-{ 0x2, 188, 0, 1298 },
-{ 0x8, 187, 0, 1300 },
-{ 0x4, 187, 0, 1301 },
-{ 0x2, 187, 0, 1302 },
-{ 0x1, 187, 1, 1304 },
-{ 0x1, 188, 0, 1303 },
-{ 0x440, 233, 0, 1290 },
-{ 0x240, 233, 0, 1291 },
-{ 0x140, 233, 0, 1292 },
-{ 0xc0, 233, 1, 1294 },
-{ 0x40, 233, 0, 1293 },
-{ 0x220, 233, 0, 1305 },
-{ 0x120, 233, 0, 1306 },
-{ 0xa0, 233, 0, 1307 },
-{ 0x60, 233, 1, 1309 },
-{ 0x20, 233, 0, 1308 },
-{ 0x10, 233, 0, 1310 },
-{ 0x8, 233, 0, 1311 },
-{ 0x4, 233, 0, 1312 },
-{ 0x1, 233, 1, 1314 },
-{ 0x2, 233, 0, 1313 },
-{ 0x8, 207, 0, 1315 },
-{ 0x4, 207, 0, 1316 },
-{ 0x2, 207, 0, 1317 },
-{ 0x1, 207, 1, 1319 },
-{ 0x1, 208, 0, 1318 },
-{ 0x10, 214, 0, 1320 },
-{ 0x8, 214, 0, 1321 },
-{ 0x4, 214, 0, 1322 },
-{ 0x1, 214, 1, 1324 },
-{ 0x2, 214, 0, 1323 },
-{ 0x220, 178, 0, 1325 },
-{ 0x120, 178, 0, 1326 },
-{ 0xa0, 178, 0, 1327 },
-{ 0x60, 178, 1, 1329 },
-{ 0x4, 179, 0, 1328 },
-{ 0x110, 178, 0, 1350 },
-{ 0x90, 178, 0, 1351 },
-{ 0x50, 178, 0, 1352 },
-{ 0x30, 178, 1, 1354 },
-{ 0x2, 179, 0, 1353 },
-{ 0x8, 178, 0, 1355 },
-{ 0x4, 178, 0, 1356 },
-{ 0x2, 178, 0, 1357 },
-{ 0x1, 178, 1, 1359 },
-{ 0x1, 179, 0, 1358 },
-{ 0x440, 186, 0, 1330 },
-{ 0x240, 186, 0, 1331 },
-{ 0x140, 186, 0, 1332 },
-{ 0xc0, 186, 1, 1334 },
-{ 0x40, 186, 0, 1333 },
-{ 0x220, 186, 0, 1360 },
-{ 0x120, 186, 0, 1361 },
-{ 0xa0, 186, 0, 1362 },
-{ 0x60, 186, 1, 1364 },
-{ 0x20, 186, 0, 1363 },
-{ 0x10, 186, 0, 1365 },
-{ 0x8, 186, 0, 1366 },
-{ 0x4, 186, 0, 1367 },
-{ 0x1, 186, 1, 1369 },
-{ 0x2, 186, 0, 1368 },
-{ 0x440, 143, 0, 1335 },
-{ 0x240, 143, 0, 1336 },
-{ 0x140, 143, 0, 1337 },
-{ 0xc0, 143, 1, 1339 },
-{ 0x40, 143, 0, 1338 },
-{ 0x220, 143, 0, 1370 },
-{ 0x120, 143, 0, 1371 },
-{ 0xa0, 143, 0, 1372 },
-{ 0x60, 143, 1, 1374 },
-{ 0x20, 143, 0, 1373 },
-{ 0x10, 143, 0, 1375 },
-{ 0x8, 143, 0, 1376 },
-{ 0x1, 143, 1, 1379 },
-{ 0x2, 143, 0, 1378 },
-{ 0x440, 194, 1, 1345 },
-{ 0x441, 174, 0, 1340 },
-{ 0x240, 194, 1, 1346 },
-{ 0x241, 174, 0, 1341 },
-{ 0x140, 194, 1, 1347 },
-{ 0x141, 174, 0, 1342 },
-{ 0xc0, 194, 1, 1349 },
-{ 0x40, 194, 1, 1348 },
-{ 0xc1, 174, 1, 1344 },
-{ 0x41, 174, 0, 1343 },
-{ 0x220, 194, 1, 1390 },
-{ 0x221, 174, 0, 1380 },
-{ 0x120, 194, 1, 1391 },
-{ 0x121, 174, 0, 1381 },
-{ 0xa0, 194, 1, 1392 },
-{ 0xa1, 174, 0, 1382 },
-{ 0x60, 194, 1, 1394 },
-{ 0x20, 194, 1, 1393 },
-{ 0x61, 174, 1, 1384 },
-{ 0x21, 174, 0, 1383 },
-{ 0x10, 194, 1, 1395 },
-{ 0x11, 174, 0, 1385 },
-{ 0x8, 194, 1, 1396 },
-{ 0x9, 174, 0, 1386 },
-{ 0x4, 194, 1, 1397 },
-{ 0x5, 174, 0, 1387 },
-{ 0x1, 194, 1, 1399 },
-{ 0x2, 194, 1, 1398 },
-{ 0x3, 174, 1, 1389 },
-{ 0x1, 174, 0, 1388 },
-{ 0x1, 153, 1, 1407 },
-{ 0x1, 154, 1, 1406 },
-{ 0x1, 155, 1, 1405 },
-{ 0x1, 156, 0, 1404 },
-{ 0x3, 153, 1, 1403 },
-{ 0x3, 154, 1, 1402 },
-{ 0x3, 155, 1, 1401 },
-{ 0x3, 156, 0, 1400 },
-{ 0x1108, 159, 1, 1569 },
-{ 0x1108, 160, 1, 1568 },
-{ 0x1108, 165, 1, 1409 },
-{ 0x1108, 166, 0, 1408 },
-{ 0x908, 159, 1, 1571 },
-{ 0x908, 160, 1, 1570 },
-{ 0x908, 165, 1, 1411 },
-{ 0x908, 166, 0, 1410 },
-{ 0x508, 159, 1, 1573 },
-{ 0x508, 160, 1, 1572 },
-{ 0x508, 165, 1, 1413 },
-{ 0x508, 166, 0, 1412 },
-{ 0x308, 159, 1, 1577 },
-{ 0x308, 160, 1, 1576 },
-{ 0x108, 160, 1, 1574 },
-{ 0x18, 161, 1, 1575 },
-{ 0x308, 165, 1, 1417 },
-{ 0x308, 166, 1, 1416 },
-{ 0x108, 166, 1, 1414 },
-{ 0x18, 167, 0, 1415 },
-{ 0x88, 159, 1, 1609 },
-{ 0x88, 160, 1, 1608 },
-{ 0x88, 165, 1, 1489 },
-{ 0x88, 166, 0, 1488 },
-{ 0x48, 159, 1, 1611 },
-{ 0x48, 160, 1, 1610 },
-{ 0x48, 165, 1, 1491 },
-{ 0x48, 166, 0, 1490 },
-{ 0x28, 159, 1, 1613 },
-{ 0x28, 160, 1, 1612 },
-{ 0x28, 165, 1, 1493 },
-{ 0x28, 166, 0, 1492 },
-{ 0x18, 159, 1, 1617 },
-{ 0x18, 160, 1, 1616 },
-{ 0x8, 160, 1, 1614 },
-{ 0x8, 161, 1, 1615 },
-{ 0x18, 165, 1, 1497 },
-{ 0x18, 166, 1, 1496 },
-{ 0x8, 166, 1, 1494 },
-{ 0x8, 167, 0, 1495 },
-{ 0x884, 159, 1, 1579 },
-{ 0x884, 160, 1, 1578 },
-{ 0x442, 162, 1, 1469 },
-{ 0x442, 163, 1, 1468 },
-{ 0x884, 165, 1, 1439 },
-{ 0x884, 166, 1, 1438 },
-{ 0x442, 168, 1, 1419 },
-{ 0x442, 169, 0, 1418 },
-{ 0x484, 159, 1, 1581 },
-{ 0x484, 160, 1, 1580 },
-{ 0x242, 162, 1, 1471 },
-{ 0x242, 163, 1, 1470 },
-{ 0x484, 165, 1, 1441 },
-{ 0x484, 166, 1, 1440 },
-{ 0x242, 168, 1, 1421 },
-{ 0x242, 169, 0, 1420 },
-{ 0x284, 159, 1, 1583 },
-{ 0x284, 160, 1, 1582 },
-{ 0x142, 162, 1, 1473 },
-{ 0x142, 163, 1, 1472 },
-{ 0x284, 165, 1, 1443 },
-{ 0x284, 166, 1, 1442 },
-{ 0x142, 168, 1, 1423 },
-{ 0x142, 169, 0, 1422 },
-{ 0x184, 159, 1, 1587 },
-{ 0x184, 160, 1, 1586 },
-{ 0x84, 160, 1, 1584 },
-{ 0xc, 161, 1, 1585 },
-{ 0xc2, 162, 1, 1477 },
-{ 0xc2, 163, 1, 1476 },
-{ 0x42, 163, 1, 1474 },
-{ 0x6, 164, 1, 1475 },
-{ 0x184, 165, 1, 1447 },
-{ 0x184, 166, 1, 1446 },
-{ 0x84, 166, 1, 1444 },
-{ 0xc, 167, 1, 1445 },
-{ 0xc2, 168, 1, 1427 },
-{ 0xc2, 169, 1, 1426 },
-{ 0x42, 169, 1, 1424 },
-{ 0x6, 170, 0, 1425 },
-{ 0x44, 159, 1, 1619 },
-{ 0x44, 160, 1, 1618 },
-{ 0x22, 162, 1, 1549 },
-{ 0x22, 163, 1, 1548 },
-{ 0x44, 165, 1, 1519 },
-{ 0x44, 166, 1, 1518 },
-{ 0x22, 168, 1, 1499 },
-{ 0x22, 169, 0, 1498 },
-{ 0x24, 159, 1, 1621 },
-{ 0x24, 160, 1, 1620 },
-{ 0x12, 162, 1, 1551 },
-{ 0x12, 163, 1, 1550 },
-{ 0x24, 165, 1, 1521 },
-{ 0x24, 166, 1, 1520 },
-{ 0x12, 168, 1, 1501 },
-{ 0x12, 169, 0, 1500 },
-{ 0x14, 159, 1, 1623 },
-{ 0x14, 160, 1, 1622 },
-{ 0xa, 162, 1, 1553 },
-{ 0xa, 163, 1, 1552 },
-{ 0x14, 165, 1, 1523 },
-{ 0x14, 166, 1, 1522 },
-{ 0xa, 168, 1, 1503 },
-{ 0xa, 169, 0, 1502 },
-{ 0xc, 159, 1, 1627 },
-{ 0xc, 160, 1, 1626 },
-{ 0x4, 160, 1, 1624 },
-{ 0x4, 161, 1, 1625 },
-{ 0x6, 162, 1, 1557 },
-{ 0x6, 163, 1, 1556 },
-{ 0x2, 163, 1, 1554 },
-{ 0x2, 164, 1, 1555 },
-{ 0xc, 165, 1, 1527 },
-{ 0xc, 166, 1, 1526 },
-{ 0x4, 166, 1, 1524 },
-{ 0x4, 167, 1, 1525 },
-{ 0x6, 168, 1, 1507 },
-{ 0x6, 169, 1, 1506 },
-{ 0x2, 169, 1, 1504 },
-{ 0x2, 170, 0, 1505 },
-{ 0x442, 159, 1, 1589 },
-{ 0x442, 160, 1, 1588 },
-{ 0x221, 162, 1, 1479 },
-{ 0x221, 163, 1, 1478 },
-{ 0x442, 165, 1, 1449 },
-{ 0x442, 166, 1, 1448 },
-{ 0x221, 168, 1, 1429 },
-{ 0x221, 169, 0, 1428 },
-{ 0x242, 159, 1, 1591 },
-{ 0x242, 160, 1, 1590 },
-{ 0x121, 162, 1, 1481 },
-{ 0x121, 163, 1, 1480 },
-{ 0x242, 165, 1, 1451 },
-{ 0x242, 166, 1, 1450 },
-{ 0x121, 168, 1, 1431 },
-{ 0x121, 169, 0, 1430 },
-{ 0x142, 159, 1, 1593 },
-{ 0x142, 160, 1, 1592 },
-{ 0xa1, 162, 1, 1483 },
-{ 0xa1, 163, 1, 1482 },
-{ 0x142, 165, 1, 1453 },
-{ 0x142, 166, 1, 1452 },
-{ 0xa1, 168, 1, 1433 },
-{ 0xa1, 169, 0, 1432 },
-{ 0xc2, 159, 1, 1597 },
-{ 0xc2, 160, 1, 1596 },
-{ 0x42, 160, 1, 1594 },
-{ 0x6, 161, 1, 1595 },
-{ 0x61, 162, 1, 1487 },
-{ 0x61, 163, 1, 1486 },
-{ 0x21, 163, 1, 1484 },
-{ 0x3, 164, 1, 1485 },
-{ 0xc2, 165, 1, 1457 },
-{ 0xc2, 166, 1, 1456 },
-{ 0x42, 166, 1, 1454 },
-{ 0x6, 167, 1, 1455 },
-{ 0x61, 168, 1, 1437 },
-{ 0x61, 169, 1, 1436 },
-{ 0x21, 169, 1, 1434 },
-{ 0x3, 170, 0, 1435 },
-{ 0x22, 159, 1, 1629 },
-{ 0x22, 160, 1, 1628 },
-{ 0x11, 162, 1, 1559 },
-{ 0x11, 163, 1, 1558 },
-{ 0x22, 165, 1, 1529 },
-{ 0x22, 166, 1, 1528 },
-{ 0x11, 168, 1, 1509 },
-{ 0x11, 169, 0, 1508 },
-{ 0x12, 159, 1, 1631 },
-{ 0x12, 160, 1, 1630 },
-{ 0x9, 162, 1, 1561 },
-{ 0x9, 163, 1, 1560 },
-{ 0x12, 165, 1, 1531 },
-{ 0x12, 166, 1, 1530 },
-{ 0x9, 168, 1, 1511 },
-{ 0x9, 169, 0, 1510 },
-{ 0xa, 159, 1, 1633 },
-{ 0xa, 160, 1, 1632 },
-{ 0x5, 162, 1, 1563 },
-{ 0x5, 163, 1, 1562 },
-{ 0xa, 165, 1, 1533 },
-{ 0xa, 166, 1, 1532 },
-{ 0x5, 168, 1, 1513 },
-{ 0x5, 169, 0, 1512 },
-{ 0x6, 159, 1, 1637 },
-{ 0x6, 160, 1, 1636 },
-{ 0x2, 160, 1, 1634 },
-{ 0x2, 161, 1, 1635 },
-{ 0x3, 162, 1, 1567 },
-{ 0x3, 163, 1, 1566 },
-{ 0x1, 163, 1, 1564 },
-{ 0x1, 164, 1, 1565 },
-{ 0x6, 165, 1, 1537 },
-{ 0x6, 166, 1, 1536 },
-{ 0x2, 166, 1, 1534 },
-{ 0x2, 167, 1, 1535 },
-{ 0x3, 168, 1, 1517 },
-{ 0x3, 169, 1, 1516 },
-{ 0x1, 169, 1, 1514 },
-{ 0x1, 170, 0, 1515 },
-{ 0x221, 159, 1, 1599 },
-{ 0x221, 160, 1, 1598 },
-{ 0x221, 165, 1, 1459 },
-{ 0x221, 166, 0, 1458 },
-{ 0x121, 159, 1, 1601 },
-{ 0x121, 160, 1, 1600 },
-{ 0x121, 165, 1, 1461 },
-{ 0x121, 166, 0, 1460 },
-{ 0xa1, 159, 1, 1603 },
-{ 0xa1, 160, 1, 1602 },
-{ 0xa1, 165, 1, 1463 },
-{ 0xa1, 166, 0, 1462 },
-{ 0x61, 159, 1, 1607 },
-{ 0x61, 160, 1, 1606 },
-{ 0x21, 160, 1, 1604 },
-{ 0x3, 161, 1, 1605 },
-{ 0x61, 165, 1, 1467 },
-{ 0x61, 166, 1, 1466 },
-{ 0x21, 166, 1, 1464 },
-{ 0x3, 167, 0, 1465 },
-{ 0x11, 159, 1, 1639 },
-{ 0x11, 160, 1, 1638 },
-{ 0x11, 165, 1, 1539 },
-{ 0x11, 166, 0, 1538 },
-{ 0x9, 159, 1, 1641 },
-{ 0x9, 160, 1, 1640 },
-{ 0x9, 165, 1, 1541 },
-{ 0x9, 166, 0, 1540 },
-{ 0x5, 159, 1, 1643 },
-{ 0x5, 160, 1, 1642 },
-{ 0x5, 165, 1, 1543 },
-{ 0x5, 166, 0, 1542 },
-{ 0x3, 159, 1, 1647 },
-{ 0x3, 160, 1, 1646 },
-{ 0x1, 160, 1, 1644 },
-{ 0x1, 161, 1, 1645 },
-{ 0x3, 165, 1, 1547 },
-{ 0x3, 166, 1, 1546 },
-{ 0x1, 166, 1, 1544 },
-{ 0x1, 167, 0, 1545 },
-{ 0x442, 205, 0, 1648 },
-{ 0x242, 205, 0, 1649 },
-{ 0x142, 205, 0, 1650 },
-{ 0xc2, 205, 1, 1652 },
-{ 0x6, 206, 1, 1651 },
-{ 0x1, 443, 0, 981 },
-{ 0x22, 205, 0, 1658 },
-{ 0x12, 205, 0, 1659 },
-{ 0xa, 205, 0, 1660 },
-{ 0x6, 205, 1, 1662 },
-{ 0x2, 206, 1, 1661 },
-{ 0x2, 367, 0, 1010 },
-{ 0x221, 205, 0, 1653 },
-{ 0x121, 205, 0, 1654 },
-{ 0xa1, 205, 0, 1655 },
-{ 0x61, 205, 1, 1657 },
-{ 0x3, 206, 1, 1656 },
-{ 0x1, 437, 0, 982 },
-{ 0x11, 205, 0, 1663 },
-{ 0x9, 205, 0, 1664 },
-{ 0x5, 205, 0, 1665 },
-{ 0x3, 205, 1, 1667 },
-{ 0x1, 206, 1, 1666 },
-{ 0x1, 367, 0, 1011 },
-{ 0x4, 211, 0, 1668 },
-{ 0x1, 211, 0, 1670 },
-{ 0x1, 218, 0, 1671 },
-{ 0x1, 217, 1, 1672 },
-{ 0x2, 211, 0, 1669 },
-{ 0x1, 196, 0, 1673 },
-{ 0x880, 202, 0, 1674 },
-{ 0x480, 202, 0, 1675 },
-{ 0x280, 202, 0, 1676 },
-{ 0x180, 202, 1, 1678 },
-{ 0x80, 203, 0, 1677 },
-{ 0x440, 202, 1, 1689 },
-{ 0x88, 204, 0, 1679 },
-{ 0x240, 202, 1, 1690 },
-{ 0x48, 204, 0, 1680 },
-{ 0x140, 202, 1, 1691 },
-{ 0x28, 204, 0, 1681 },
-{ 0xc0, 202, 1, 1693 },
-{ 0x40, 203, 1, 1692 },
-{ 0x18, 204, 1, 1683 },
-{ 0x8, 204, 0, 1682 },
-{ 0x220, 202, 1, 1694 },
-{ 0x44, 204, 0, 1684 },
-{ 0x120, 202, 1, 1695 },
-{ 0x24, 204, 0, 1685 },
-{ 0xa0, 202, 1, 1696 },
-{ 0x14, 204, 0, 1686 },
-{ 0x60, 202, 1, 1698 },
-{ 0x20, 203, 1, 1697 },
-{ 0xc, 204, 1, 1688 },
-{ 0x4, 204, 0, 1687 },
-{ 0x110, 202, 0, 1699 },
-{ 0x90, 202, 0, 1700 },
-{ 0x50, 202, 0, 1701 },
-{ 0x30, 202, 1, 1703 },
-{ 0x10, 203, 1, 1702 },
-{ 0x1, 385, 0, 974 },
-{ 0x88, 202, 0, 1704 },
-{ 0x48, 202, 0, 1705 },
-{ 0x28, 202, 0, 1706 },
-{ 0x18, 202, 1, 1708 },
-{ 0x8, 203, 1, 1707 },
-{ 0xc, 368, 0, 1007 },
-{ 0x44, 202, 1, 1719 },
-{ 0x22, 204, 0, 1709 },
-{ 0x24, 202, 1, 1720 },
-{ 0x12, 204, 0, 1710 },
-{ 0x14, 202, 1, 1721 },
-{ 0xa, 204, 0, 1711 },
-{ 0xc, 202, 1, 1723 },
-{ 0x4, 203, 1, 1722 },
-{ 0x6, 204, 1, 1713 },
-{ 0x2, 204, 1, 1712 },
-{ 0x6, 368, 0, 1008 },
-{ 0x22, 202, 1, 1724 },
-{ 0x11, 204, 0, 1714 },
-{ 0x12, 202, 1, 1725 },
-{ 0x9, 204, 0, 1715 },
-{ 0xa, 202, 1, 1726 },
-{ 0x5, 204, 0, 1716 },
-{ 0x6, 202, 1, 1728 },
-{ 0x2, 203, 1, 1727 },
-{ 0x3, 204, 1, 1718 },
-{ 0x1, 204, 1, 1717 },
-{ 0x3, 368, 0, 1009 },
-{ 0x11, 202, 0, 1729 },
-{ 0x9, 202, 0, 1730 },
-{ 0x5, 202, 0, 1731 },
-{ 0x3, 202, 1, 1733 },
-{ 0x1, 203, 0, 1732 },
-{ 0x8, 198, 0, 1734 },
-{ 0x4, 198, 0, 1735 },
-{ 0x2, 198, 0, 1736 },
-{ 0x1, 198, 1, 1738 },
-{ 0x1, 199, 1, 1737 },
-{ 0x1, 332, 0, 988 },
-{ 0x8, 200, 0, 1739 },
-{ 0x4, 200, 0, 1740 },
-{ 0x2, 200, 0, 1741 },
-{ 0x1, 200, 1, 1743 },
-{ 0x1, 201, 1, 1742 },
-{ 0x1, 331, 0, 989 },
-{ 0x8, 209, 0, 1744 },
-{ 0x4, 209, 0, 1745 },
-{ 0x2, 209, 0, 1746 },
-{ 0x1, 209, 1, 1748 },
-{ 0x1, 210, 1, 1747 },
-{ 0x1, 330, 0, 990 },
-{ 0x8, 212, 0, 1749 },
-{ 0x4, 212, 0, 1750 },
-{ 0x2, 212, 0, 1751 },
-{ 0x1, 212, 1, 1753 },
-{ 0x1, 213, 1, 1752 },
-{ 0x1, 329, 0, 991 },
-{ 0x8, 224, 0, 1754 },
-{ 0x4, 224, 0, 1755 },
-{ 0x2, 224, 0, 1756 },
-{ 0x1, 224, 1, 1758 },
-{ 0x1, 225, 0, 1757 },
-{ 0x8, 222, 0, 1759 },
-{ 0x4, 222, 0, 1760 },
-{ 0x2, 222, 0, 1761 },
-{ 0x1, 222, 1, 1763 },
-{ 0x1, 223, 0, 1762 },
-{ 0x1, 240, 0, 1764 },
-{ 0x1, 340, 0, 1765 },
-{ 0x1, 33, 0, 1766 },
-{ 0x8, 151, 0, 1767 },
-{ 0x4, 151, 0, 1768 },
-{ 0x2, 151, 0, 1769 },
-{ 0x1, 151, 1, 1771 },
-{ 0x1, 152, 0, 1770 },
-{ 0x8, 157, 0, 1772 },
-{ 0x4, 157, 0, 1773 },
-{ 0x2, 157, 0, 1774 },
-{ 0x1, 157, 1, 1776 },
-{ 0x1, 158, 0, 1775 },
-{ 0x8, 231, 0, 1777 },
-{ 0x4, 231, 0, 1778 },
-{ 0x2, 231, 0, 1779 },
-{ 0x1, 231, 1, 1781 },
-{ 0x1, 232, 0, 1780 },
-{ 0x1, 173, 0, 1782 },
-{ 0x442, 171, 0, 1783 },
-{ 0x242, 171, 0, 1784 },
-{ 0x142, 171, 0, 1785 },
-{ 0xc2, 171, 1, 1787 },
-{ 0x6, 172, 0, 1786 },
-{ 0x22, 171, 0, 1793 },
-{ 0x12, 171, 0, 1794 },
-{ 0xa, 171, 0, 1795 },
-{ 0x6, 171, 1, 1797 },
-{ 0x2, 172, 1, 1796 },
-{ 0x1, 135, 0, 1197 },
-{ 0x221, 171, 0, 1788 },
-{ 0x121, 171, 0, 1789 },
-{ 0xa1, 171, 0, 1790 },
-{ 0x61, 171, 1, 1792 },
-{ 0x3, 172, 0, 1791 },
-{ 0x11, 171, 0, 1798 },
-{ 0x9, 171, 0, 1799 },
-{ 0x5, 171, 0, 1800 },
-{ 0x3, 171, 1, 1802 },
-{ 0x1, 172, 1, 1801 },
-{ 0x1, 134, 0, 1198 },
-{ 0x1, 237, 0, 1803 },
-{ 0x1, 195, 0, 1804 },
-{ 0x1, 149, 0, 1805 },
-{ 0x1, 148, 0, 1806 },
-{ 0x4, 234, 0, 1807 },
-{ 0x2, 234, 0, 1808 },
-{ 0x1, 234, 0, 1809 },
-{ 0x1, 197, 0, 1810 },
-{ 0x2, 235, 0, 1811 },
-{ 0x1, 235, 0, 1812 },
-{ 0x4, 185, 0, 1813 },
-{ 0x2, 185, 0, 1814 },
-{ 0x1, 185, 0, 1815 },
-{ 0x4, 182, 0, 1816 },
-{ 0x1, 190, 0, 1819 },
-{ 0x1, 189, 1, 1820 },
-{ 0x2, 182, 0, 1817 },
-{ 0x1, 142, 0, 1821 },
-{ 0x1, 297, 1, 1822 },
-{ 0x1, 182, 0, 1818 },
-{ 0x8, 144, 0, 1823 },
-{ 0x4, 144, 0, 1824 },
-{ 0x2, 144, 0, 1825 },
-{ 0x1, 144, 1, 1827 },
-{ 0x1, 145, 0, 1826 },
-{ 0x8, 146, 0, 1828 },
-{ 0x4, 146, 0, 1829 },
-{ 0x2, 146, 0, 1830 },
-{ 0x1, 146, 1, 1832 },
-{ 0x1, 147, 1, 1831 },
-{ 0x1, 426, 0, 1199 },
-{ 0x8, 180, 0, 1833 },
-{ 0x4, 180, 0, 1834 },
-{ 0x2, 180, 0, 1835 },
-{ 0x1, 180, 1, 1837 },
-{ 0x1, 181, 1, 1836 },
-{ 0x1, 425, 0, 1200 },
-{ 0x8, 183, 0, 1838 },
-{ 0x4, 183, 0, 1839 },
-{ 0x2, 183, 0, 1840 },
-{ 0x1, 183, 1, 1842 },
-{ 0x1, 184, 1, 1841 },
-{ 0x1, 424, 0, 1201 },
-{ 0x8, 228, 0, 1843 },
-{ 0x4, 228, 0, 1844 },
-{ 0x2, 228, 0, 1845 },
-{ 0x1, 228, 1, 1847 },
-{ 0x1, 229, 0, 1846 },
-{ 0x8, 226, 0, 1848 },
-{ 0x4, 226, 0, 1849 },
-{ 0x2, 226, 0, 1850 },
-{ 0x1, 226, 1, 1852 },
-{ 0x1, 227, 0, 1851 },
-{ 0x8, 44, 0, 1857 },
-{ 0x18, 44, 0, 1853 },
-{ 0x4, 44, 0, 1858 },
-{ 0xc, 44, 0, 1854 },
-{ 0x2, 44, 0, 1859 },
-{ 0x6, 44, 0, 1855 },
-{ 0x1, 44, 0, 1860 },
-{ 0x3, 44, 0, 1856 },
-{ 0x51, 30, 0, 1862 },
-{ 0xd1, 30, 0, 1861 },
-{ 0x31, 30, 1, 1872 },
-{ 0x11, 31, 0, 1871 },
-{ 0x71, 30, 1, 1870 },
-{ 0x31, 31, 0, 1869 },
-{ 0x29, 30, 0, 1864 },
-{ 0x69, 30, 0, 1863 },
-{ 0x19, 30, 1, 1876 },
-{ 0x9, 31, 0, 1875 },
-{ 0x39, 30, 1, 1874 },
-{ 0x19, 31, 0, 1873 },
-{ 0x15, 30, 0, 1866 },
-{ 0x35, 30, 0, 1865 },
-{ 0xd, 30, 1, 1880 },
-{ 0x5, 31, 0, 1879 },
-{ 0x1d, 30, 1, 1878 },
-{ 0xd, 31, 0, 1877 },
-{ 0xb, 30, 0, 1868 },
-{ 0x1b, 30, 0, 1867 },
-{ 0x7, 30, 1, 1884 },
-{ 0x3, 31, 0, 1883 },
-{ 0xf, 30, 1, 1882 },
-{ 0x7, 31, 0, 1881 },
-{ 0xa2, 28, 0, 1886 },
-{ 0x1a2, 28, 0, 1885 },
-{ 0x62, 28, 1, 1896 },
-{ 0x22, 29, 0, 1895 },
-{ 0xe2, 28, 1, 1894 },
-{ 0x62, 29, 0, 1893 },
-{ 0x52, 28, 0, 1888 },
-{ 0xd2, 28, 0, 1887 },
-{ 0x32, 28, 1, 1900 },
-{ 0x12, 29, 0, 1899 },
-{ 0x72, 28, 1, 1898 },
-{ 0x32, 29, 0, 1897 },
-{ 0x2a, 28, 0, 1890 },
-{ 0x6a, 28, 0, 1889 },
-{ 0x1a, 28, 1, 1904 },
-{ 0xa, 29, 0, 1903 },
-{ 0x3a, 28, 1, 1902 },
-{ 0x1a, 29, 0, 1901 },
-{ 0x16, 28, 0, 1892 },
-{ 0x36, 28, 0, 1891 },
-{ 0xe, 28, 1, 1908 },
-{ 0x6, 29, 0, 1907 },
-{ 0x1e, 28, 1, 1906 },
-{ 0xe, 29, 0, 1905 },
-{ 0x51, 28, 0, 1910 },
-{ 0xd1, 28, 0, 1909 },
-{ 0x31, 28, 1, 1920 },
-{ 0x11, 29, 0, 1919 },
-{ 0x71, 28, 1, 1918 },
-{ 0x31, 29, 0, 1917 },
-{ 0x29, 28, 0, 1912 },
-{ 0x69, 28, 0, 1911 },
-{ 0x19, 28, 1, 1924 },
-{ 0x9, 29, 0, 1923 },
-{ 0x39, 28, 1, 1922 },
-{ 0x19, 29, 0, 1921 },
-{ 0x15, 28, 0, 1914 },
-{ 0x35, 28, 0, 1913 },
-{ 0xd, 28, 1, 1928 },
-{ 0x5, 29, 0, 1927 },
-{ 0x1d, 28, 1, 1926 },
-{ 0xd, 29, 0, 1925 },
-{ 0xb, 28, 0, 1916 },
-{ 0x1b, 28, 0, 1915 },
-{ 0x7, 28, 1, 1932 },
-{ 0x3, 29, 0, 1931 },
-{ 0xf, 28, 1, 1930 },
-{ 0x7, 29, 0, 1929 },
-{ 0x51, 26, 0, 1934 },
-{ 0xd1, 26, 0, 1933 },
-{ 0x31, 26, 1, 1944 },
-{ 0x11, 27, 0, 1943 },
-{ 0x71, 26, 1, 1942 },
-{ 0x31, 27, 0, 1941 },
-{ 0x29, 26, 0, 1936 },
-{ 0x69, 26, 0, 1935 },
-{ 0x19, 26, 1, 1948 },
-{ 0x9, 27, 0, 1947 },
-{ 0x39, 26, 1, 1946 },
-{ 0x19, 27, 0, 1945 },
-{ 0x15, 26, 0, 1938 },
-{ 0x35, 26, 0, 1937 },
-{ 0xd, 26, 1, 1952 },
-{ 0x5, 27, 0, 1951 },
-{ 0x1d, 26, 1, 1950 },
-{ 0xd, 27, 0, 1949 },
-{ 0xb, 26, 0, 1940 },
-{ 0x1b, 26, 0, 1939 },
-{ 0x7, 26, 1, 1956 },
-{ 0x3, 27, 0, 1955 },
-{ 0xf, 26, 1, 1954 },
-{ 0x7, 27, 0, 1953 },
-{ 0xa2, 24, 0, 1958 },
-{ 0x1a2, 24, 0, 1957 },
-{ 0x62, 24, 1, 1968 },
-{ 0x22, 25, 0, 1967 },
-{ 0xe2, 24, 1, 1966 },
-{ 0x62, 25, 0, 1965 },
-{ 0x52, 24, 0, 1960 },
-{ 0xd2, 24, 0, 1959 },
-{ 0x32, 24, 1, 1972 },
-{ 0x12, 25, 0, 1971 },
-{ 0x72, 24, 1, 1970 },
-{ 0x32, 25, 0, 1969 },
-{ 0x2a, 24, 0, 1962 },
-{ 0x6a, 24, 0, 1961 },
-{ 0x1a, 24, 1, 1976 },
-{ 0xa, 25, 0, 1975 },
-{ 0x3a, 24, 1, 1974 },
-{ 0x1a, 25, 0, 1973 },
-{ 0x16, 24, 0, 1964 },
-{ 0x36, 24, 0, 1963 },
-{ 0xe, 24, 1, 1980 },
-{ 0x6, 25, 0, 1979 },
-{ 0x1e, 24, 1, 1978 },
-{ 0xe, 25, 0, 1977 },
-{ 0x51, 24, 0, 1982 },
-{ 0xd1, 24, 0, 1981 },
-{ 0x31, 24, 1, 1992 },
-{ 0x11, 25, 0, 1991 },
-{ 0x71, 24, 1, 1990 },
-{ 0x31, 25, 0, 1989 },
-{ 0x29, 24, 0, 1984 },
-{ 0x69, 24, 0, 1983 },
-{ 0x19, 24, 1, 1996 },
-{ 0x9, 25, 0, 1995 },
-{ 0x39, 24, 1, 1994 },
-{ 0x19, 25, 0, 1993 },
-{ 0x15, 24, 0, 1986 },
-{ 0x35, 24, 0, 1985 },
-{ 0xd, 24, 1, 2000 },
-{ 0x5, 25, 0, 1999 },
-{ 0x1d, 24, 1, 1998 },
-{ 0xd, 25, 0, 1997 },
-{ 0xb, 24, 0, 1988 },
-{ 0x1b, 24, 0, 1987 },
-{ 0x7, 24, 1, 2004 },
-{ 0x3, 25, 0, 2003 },
-{ 0xf, 24, 1, 2002 },
-{ 0x7, 25, 0, 2001 },
-{ 0x51, 22, 1, 2030 },
-{ 0x50, 22, 0, 2006 },
-{ 0xd1, 22, 1, 2029 },
-{ 0xd0, 22, 0, 2005 },
-{ 0x31, 22, 1, 2040 },
-{ 0x30, 22, 1, 2016 },
-{ 0x11, 23, 1, 2039 },
-{ 0x10, 23, 0, 2015 },
-{ 0x71, 22, 1, 2038 },
-{ 0x70, 22, 1, 2014 },
-{ 0x31, 23, 1, 2037 },
-{ 0x30, 23, 0, 2013 },
-{ 0x29, 22, 1, 2032 },
-{ 0x28, 22, 0, 2008 },
-{ 0x69, 22, 1, 2031 },
-{ 0x68, 22, 0, 2007 },
-{ 0x19, 22, 1, 2044 },
-{ 0x18, 22, 1, 2020 },
-{ 0x9, 23, 1, 2043 },
-{ 0x8, 23, 0, 2019 },
-{ 0x39, 22, 1, 2042 },
-{ 0x38, 22, 1, 2018 },
-{ 0x19, 23, 1, 2041 },
-{ 0x18, 23, 0, 2017 },
-{ 0x15, 22, 1, 2034 },
-{ 0x14, 22, 0, 2010 },
-{ 0x35, 22, 1, 2033 },
-{ 0x34, 22, 0, 2009 },
-{ 0xd, 22, 1, 2048 },
-{ 0xc, 22, 1, 2024 },
-{ 0x5, 23, 1, 2047 },
-{ 0x4, 23, 0, 2023 },
-{ 0x1d, 22, 1, 2046 },
-{ 0x1c, 22, 1, 2022 },
-{ 0xd, 23, 1, 2045 },
-{ 0xc, 23, 0, 2021 },
-{ 0xb, 22, 1, 2036 },
-{ 0xa, 22, 0, 2012 },
-{ 0x1b, 22, 1, 2035 },
-{ 0x1a, 22, 0, 2011 },
-{ 0x7, 22, 1, 2052 },
-{ 0x6, 22, 1, 2028 },
-{ 0x3, 23, 1, 2051 },
-{ 0x2, 23, 0, 2027 },
-{ 0xf, 22, 1, 2050 },
-{ 0xe, 22, 1, 2026 },
-{ 0x7, 23, 1, 2049 },
-{ 0x6, 23, 0, 2025 },
-{ 0x8, 21, 0, 2054 },
-{ 0x18, 21, 0, 2053 },
-{ 0x1, 21, 1, 2058 },
-{ 0x2, 21, 0, 2057 },
-{ 0x3, 21, 1, 2056 },
-{ 0x4, 21, 0, 2055 },
-{ 0x1, 239, 0, 2059 },
-{ 0x1, 339, 0, 2060 },
-{ 0x14, 43, 0, 2063 },
-{ 0x34, 43, 0, 2061 },
-{ 0xc, 43, 0, 2064 },
-{ 0x1c, 43, 0, 2062 },
-{ 0x2, 43, 0, 2067 },
-{ 0x6, 43, 0, 2065 },
-{ 0x1, 43, 0, 2068 },
-{ 0x3, 43, 0, 2066 },
-{ 0x51, 19, 0, 2070 },
-{ 0xd1, 19, 0, 2069 },
-{ 0x31, 19, 1, 2080 },
-{ 0x11, 20, 0, 2079 },
-{ 0x71, 19, 1, 2078 },
-{ 0x31, 20, 0, 2077 },
-{ 0x29, 19, 0, 2072 },
-{ 0x69, 19, 0, 2071 },
-{ 0x19, 19, 1, 2084 },
-{ 0x9, 20, 0, 2083 },
-{ 0x39, 19, 1, 2082 },
-{ 0x19, 20, 0, 2081 },
-{ 0x15, 19, 0, 2074 },
-{ 0x35, 19, 0, 2073 },
-{ 0xd, 19, 1, 2088 },
-{ 0x5, 20, 0, 2087 },
-{ 0x1d, 19, 1, 2086 },
-{ 0xd, 20, 0, 2085 },
-{ 0xb, 19, 0, 2076 },
-{ 0x1b, 19, 0, 2075 },
-{ 0x7, 19, 1, 2092 },
-{ 0x3, 20, 0, 2091 },
-{ 0xf, 19, 1, 2090 },
-{ 0x7, 20, 0, 2089 },
-{ 0x1, 32, 0, 2093 },
-{ 0x2, 447, 0, 2094 },
-{ 0x1, 447, 0, 2095 },
-{ 0x1, 140, 0, 2096 },
-{ 0x2, 45, 0, 2097 },
-{ 0x1, 45, 0, 2098 },
-{ 0x1, 387, 0, 2099 },
-{ 0x2, 52, 0, 2100 },
-{ 0x1, 52, 0, 2101 },
-{ 0x1, 133, 0, 2102 },
-{ 0x51, 17, 0, 2104 },
-{ 0xd1, 17, 0, 2103 },
-{ 0x31, 17, 1, 2114 },
-{ 0x11, 18, 0, 2113 },
-{ 0x71, 17, 1, 2112 },
-{ 0x31, 18, 0, 2111 },
-{ 0x29, 17, 0, 2106 },
-{ 0x69, 17, 0, 2105 },
-{ 0x19, 17, 1, 2118 },
-{ 0x9, 18, 0, 2117 },
-{ 0x39, 17, 1, 2116 },
-{ 0x19, 18, 0, 2115 },
-{ 0x15, 17, 0, 2108 },
-{ 0x35, 17, 0, 2107 },
-{ 0xd, 17, 1, 2122 },
-{ 0x5, 18, 0, 2121 },
-{ 0x1d, 17, 1, 2120 },
-{ 0xd, 18, 0, 2119 },
-{ 0xb, 17, 0, 2110 },
-{ 0x1b, 17, 0, 2109 },
-{ 0x7, 17, 1, 2126 },
-{ 0x3, 18, 0, 2125 },
-{ 0xf, 17, 1, 2124 },
-{ 0x7, 18, 0, 2123 },
-{ 0xa20, 15, 0, 2128 },
-{ 0x1a20, 15, 0, 2127 },
-{ 0x620, 15, 1, 2138 },
-{ 0x220, 16, 0, 2137 },
-{ 0xe20, 15, 1, 2136 },
-{ 0x620, 16, 0, 2135 },
-{ 0x520, 15, 0, 2130 },
-{ 0xd20, 15, 0, 2129 },
-{ 0x320, 15, 1, 2142 },
-{ 0x120, 16, 0, 2141 },
-{ 0x720, 15, 1, 2140 },
-{ 0x320, 16, 0, 2139 },
-{ 0x2a0, 15, 0, 2132 },
-{ 0x6a0, 15, 0, 2131 },
-{ 0x1a0, 15, 1, 2146 },
-{ 0xa0, 16, 0, 2145 },
-{ 0x3a0, 15, 1, 2144 },
-{ 0x1a0, 16, 0, 2143 },
-{ 0x160, 15, 0, 2134 },
-{ 0x360, 15, 0, 2133 },
-{ 0xe0, 15, 1, 2150 },
-{ 0x60, 16, 0, 2149 },
-{ 0x1e0, 15, 1, 2148 },
-{ 0xe0, 16, 0, 2147 },
-{ 0x51, 15, 1, 2176 },
-{ 0x50, 15, 0, 2152 },
-{ 0xd1, 15, 1, 2175 },
-{ 0xd0, 15, 0, 2151 },
-{ 0x31, 15, 1, 2186 },
-{ 0x30, 15, 1, 2162 },
-{ 0x11, 16, 1, 2185 },
-{ 0x10, 16, 0, 2161 },
-{ 0x71, 15, 1, 2184 },
-{ 0x70, 15, 1, 2160 },
-{ 0x31, 16, 1, 2183 },
-{ 0x30, 16, 0, 2159 },
-{ 0x29, 15, 1, 2178 },
-{ 0x28, 15, 0, 2154 },
-{ 0x69, 15, 1, 2177 },
-{ 0x68, 15, 0, 2153 },
-{ 0x19, 15, 1, 2190 },
-{ 0x18, 15, 1, 2166 },
-{ 0x9, 16, 1, 2189 },
-{ 0x8, 16, 0, 2165 },
-{ 0x39, 15, 1, 2188 },
-{ 0x38, 15, 1, 2164 },
-{ 0x19, 16, 1, 2187 },
-{ 0x18, 16, 0, 2163 },
-{ 0x15, 15, 1, 2180 },
-{ 0x14, 15, 0, 2156 },
-{ 0x35, 15, 1, 2179 },
-{ 0x34, 15, 0, 2155 },
-{ 0xd, 15, 1, 2194 },
-{ 0xc, 15, 1, 2170 },
-{ 0x5, 16, 1, 2193 },
-{ 0x4, 16, 0, 2169 },
-{ 0x1d, 15, 1, 2192 },
-{ 0x1c, 15, 1, 2168 },
-{ 0xd, 16, 1, 2191 },
-{ 0xc, 16, 0, 2167 },
-{ 0xb, 15, 1, 2182 },
-{ 0xa, 15, 0, 2158 },
-{ 0x1b, 15, 1, 2181 },
-{ 0x1a, 15, 0, 2157 },
-{ 0x7, 15, 1, 2198 },
-{ 0x6, 15, 1, 2174 },
-{ 0x3, 16, 1, 2197 },
-{ 0x2, 16, 0, 2173 },
-{ 0xf, 15, 1, 2196 },
-{ 0xe, 15, 1, 2172 },
-{ 0x7, 16, 1, 2195 },
-{ 0x6, 16, 0, 2171 },
-{ 0x8, 14, 0, 2200 },
-{ 0x18, 14, 0, 2199 },
-{ 0x1, 14, 1, 2204 },
-{ 0x2, 14, 0, 2203 },
-{ 0x3, 14, 1, 2202 },
-{ 0x4, 14, 0, 2201 },
-{ 0x1, 109, 1, 2356 },
-{ 0x1, 110, 1, 2355 },
-{ 0x1, 111, 1, 2354 },
-{ 0x1, 112, 1, 2353 },
-{ 0x1, 113, 1, 2352 },
-{ 0x1, 114, 1, 2351 },
-{ 0x1, 115, 1, 2350 },
-{ 0x1, 116, 1, 2349 },
-{ 0x39, 41, 1, 22 },
-{ 0x19, 42, 0, 21 },
-{ 0x3, 109, 1, 2348 },
-{ 0x3, 110, 1, 2347 },
-{ 0x3, 111, 1, 2346 },
-{ 0x3, 112, 1, 2345 },
-{ 0x3, 113, 1, 2344 },
-{ 0x3, 114, 1, 2343 },
-{ 0x3, 115, 1, 2342 },
-{ 0x3, 116, 1, 2341 },
-{ 0x69, 41, 0, 11 },
-{ 0x14, 100, 1, 2336 },
-{ 0x22, 101, 1, 2333 },
-{ 0x44, 101, 1, 2335 },
-{ 0xa, 108, 1, 2334 },
-{ 0xd1, 41, 0, 9 },
-{ 0x34, 100, 1, 2208 },
-{ 0xc4, 101, 1, 2207 },
-{ 0x1c, 107, 1, 2205 },
-{ 0xe, 122, 0, 2206 },
-{ 0xc, 100, 1, 2496 },
-{ 0xa, 101, 1, 2493 },
-{ 0x14, 101, 1, 2495 },
-{ 0x6, 108, 0, 2494 },
-{ 0x2, 100, 1, 2220 },
-{ 0x2, 101, 1, 2219 },
-{ 0x2, 106, 1, 2218 },
-{ 0x2, 107, 0, 2217 },
-{ 0x12, 100, 1, 2216 },
-{ 0x42, 101, 1, 2215 },
-{ 0x6, 106, 1, 2214 },
-{ 0x6, 107, 0, 2213 },
-{ 0xa, 100, 1, 2340 },
-{ 0x12, 101, 1, 2339 },
-{ 0x24, 101, 1, 2337 },
-{ 0x5, 108, 1, 2338 },
-{ 0x71, 41, 1, 18 },
-{ 0x31, 42, 0, 17 },
-{ 0x1a, 100, 1, 2212 },
-{ 0x32, 101, 1, 2211 },
-{ 0x1a, 107, 1, 2209 },
-{ 0x7, 122, 0, 2210 },
-{ 0x6, 100, 1, 2500 },
-{ 0x6, 101, 1, 2499 },
-{ 0xc, 101, 1, 2497 },
-{ 0x3, 108, 0, 2498 },
-{ 0x1, 100, 1, 2516 },
-{ 0x1, 101, 1, 2515 },
-{ 0x1, 102, 1, 2514 },
-{ 0x1, 103, 1, 2513 },
-{ 0x1, 104, 1, 2512 },
-{ 0x1, 105, 1, 2511 },
-{ 0x1, 106, 1, 2510 },
-{ 0x1, 107, 0, 2509 },
-{ 0x3, 100, 1, 2508 },
-{ 0x3, 101, 1, 2507 },
-{ 0x3, 102, 1, 2506 },
-{ 0x3, 103, 1, 2505 },
-{ 0x3, 104, 1, 2504 },
-{ 0x3, 105, 1, 2503 },
-{ 0x3, 106, 1, 2502 },
-{ 0x3, 107, 0, 2501 },
-{ 0x8, 67, 1, 2380 },
-{ 0x8, 68, 1, 2379 },
-{ 0x2, 73, 1, 2374 },
-{ 0x2, 74, 1, 2373 },
-{ 0x1, 76, 1, 2378 },
-{ 0x1, 77, 1, 2377 },
-{ 0x1, 78, 1, 2376 },
-{ 0x1, 79, 1, 2375 },
-{ 0xf, 41, 1, 30 },
-{ 0x7, 42, 0, 29 },
-{ 0x18, 67, 1, 2372 },
-{ 0x18, 68, 1, 2371 },
-{ 0x6, 73, 1, 2366 },
-{ 0x6, 74, 1, 2365 },
-{ 0x3, 76, 1, 2370 },
-{ 0x3, 77, 1, 2369 },
-{ 0x3, 78, 1, 2368 },
-{ 0x3, 79, 1, 2367 },
-{ 0x1b, 41, 0, 15 },
-{ 0x14, 67, 1, 2360 },
-{ 0x22, 68, 1, 2357 },
-{ 0x44, 68, 1, 2359 },
-{ 0xa, 75, 1, 2358 },
-{ 0x35, 41, 0, 13 },
-{ 0x34, 67, 1, 2224 },
-{ 0xc4, 68, 1, 2223 },
-{ 0x38, 74, 1, 2221 },
-{ 0xe, 85, 0, 2222 },
-{ 0xc, 67, 1, 2520 },
-{ 0xa, 68, 1, 2517 },
-{ 0x14, 68, 1, 2519 },
-{ 0x6, 75, 0, 2518 },
-{ 0x2, 67, 1, 2236 },
-{ 0x2, 68, 1, 2235 },
-{ 0x4, 73, 1, 2234 },
-{ 0x4, 74, 0, 2233 },
-{ 0x12, 67, 1, 2232 },
-{ 0x42, 68, 1, 2231 },
-{ 0xc, 73, 1, 2230 },
-{ 0xc, 74, 0, 2229 },
-{ 0xa, 67, 1, 2364 },
-{ 0x12, 68, 1, 2363 },
-{ 0x24, 68, 1, 2361 },
-{ 0x5, 75, 1, 2362 },
-{ 0x1d, 41, 1, 26 },
-{ 0xd, 42, 0, 25 },
-{ 0x1a, 67, 1, 2228 },
-{ 0x32, 68, 1, 2227 },
-{ 0x34, 74, 1, 2225 },
-{ 0x7, 85, 0, 2226 },
-{ 0x6, 67, 1, 2524 },
-{ 0x6, 68, 1, 2523 },
-{ 0xc, 68, 1, 2521 },
-{ 0x3, 75, 0, 2522 },
-{ 0x1, 67, 1, 2540 },
-{ 0x1, 68, 1, 2539 },
-{ 0x1, 69, 1, 2538 },
-{ 0x1, 70, 1, 2537 },
-{ 0x1, 71, 1, 2536 },
-{ 0x1, 72, 1, 2535 },
-{ 0x1, 73, 1, 2534 },
-{ 0x1, 74, 0, 2533 },
-{ 0x3, 67, 1, 2532 },
-{ 0x3, 68, 1, 2531 },
-{ 0x3, 69, 1, 2530 },
-{ 0x3, 70, 1, 2529 },
-{ 0x3, 71, 1, 2528 },
-{ 0x3, 72, 1, 2527 },
-{ 0x3, 73, 1, 2526 },
-{ 0x3, 74, 0, 2525 },
-{ 0x28, 95, 1, 2388 },
-{ 0x44, 96, 1, 2383 },
-{ 0x88, 96, 1, 2387 },
-{ 0x44, 97, 1, 2382 },
-{ 0x88, 97, 1, 2386 },
-{ 0x44, 98, 1, 2381 },
-{ 0x88, 98, 1, 2385 },
-{ 0x28, 99, 0, 2384 },
-{ 0x68, 95, 1, 2244 },
-{ 0x188, 96, 1, 2243 },
-{ 0x188, 97, 1, 2242 },
-{ 0x188, 98, 1, 2241 },
-{ 0x38, 118, 1, 2240 },
-{ 0x38, 119, 1, 2239 },
-{ 0x38, 120, 1, 2238 },
-{ 0x38, 121, 0, 2237 },
-{ 0x18, 95, 1, 2548 },
-{ 0x14, 96, 1, 2543 },
-{ 0x28, 96, 1, 2547 },
-{ 0x14, 97, 1, 2542 },
-{ 0x28, 97, 1, 2546 },
-{ 0x14, 98, 1, 2541 },
-{ 0x28, 98, 1, 2545 },
-{ 0x18, 99, 0, 2544 },
-{ 0x14, 95, 1, 2396 },
-{ 0x24, 96, 1, 2395 },
-{ 0x48, 96, 1, 2391 },
-{ 0x24, 97, 1, 2394 },
-{ 0x48, 97, 1, 2390 },
-{ 0x24, 98, 1, 2393 },
-{ 0x48, 98, 1, 2389 },
-{ 0x14, 99, 0, 2392 },
-{ 0x34, 95, 1, 2252 },
-{ 0x64, 96, 1, 2251 },
-{ 0x64, 97, 1, 2250 },
-{ 0x64, 98, 1, 2249 },
-{ 0x1c, 118, 1, 2248 },
-{ 0x1c, 119, 1, 2247 },
-{ 0x1c, 120, 1, 2246 },
-{ 0x1c, 121, 0, 2245 },
-{ 0xc, 95, 1, 2556 },
-{ 0xc, 96, 1, 2555 },
-{ 0x18, 96, 1, 2551 },
-{ 0xc, 97, 1, 2554 },
-{ 0x18, 97, 1, 2550 },
-{ 0xc, 98, 1, 2553 },
-{ 0x18, 98, 1, 2549 },
-{ 0xc, 99, 0, 2552 },
-{ 0xa, 95, 1, 2404 },
-{ 0x11, 96, 1, 2399 },
-{ 0x22, 96, 1, 2403 },
-{ 0x11, 97, 1, 2398 },
-{ 0x22, 97, 1, 2402 },
-{ 0x11, 98, 1, 2397 },
-{ 0x22, 98, 1, 2401 },
-{ 0xa, 99, 0, 2400 },
-{ 0x1a, 95, 1, 2260 },
-{ 0x62, 96, 1, 2259 },
-{ 0x62, 97, 1, 2258 },
-{ 0x62, 98, 1, 2257 },
-{ 0xe, 118, 1, 2256 },
-{ 0xe, 119, 1, 2255 },
-{ 0xe, 120, 1, 2254 },
-{ 0xe, 121, 0, 2253 },
-{ 0x6, 95, 1, 2564 },
-{ 0x5, 96, 1, 2559 },
-{ 0xa, 96, 1, 2563 },
-{ 0x5, 97, 1, 2558 },
-{ 0xa, 97, 1, 2562 },
-{ 0x5, 98, 1, 2557 },
-{ 0xa, 98, 1, 2561 },
-{ 0x6, 99, 0, 2560 },
-{ 0x5, 95, 1, 2412 },
-{ 0x9, 96, 1, 2411 },
-{ 0x12, 96, 1, 2407 },
-{ 0x9, 97, 1, 2410 },
-{ 0x12, 97, 1, 2406 },
-{ 0x9, 98, 1, 2409 },
-{ 0x12, 98, 1, 2405 },
-{ 0x5, 99, 0, 2408 },
-{ 0xd, 95, 1, 2268 },
-{ 0x19, 96, 1, 2267 },
-{ 0x19, 97, 1, 2266 },
-{ 0x19, 98, 1, 2265 },
-{ 0x7, 118, 1, 2264 },
-{ 0x7, 119, 1, 2263 },
-{ 0x7, 120, 1, 2262 },
-{ 0x7, 121, 0, 2261 },
-{ 0x3, 95, 1, 2572 },
-{ 0x3, 96, 1, 2571 },
-{ 0x6, 96, 1, 2567 },
-{ 0x3, 97, 1, 2570 },
-{ 0x6, 97, 1, 2566 },
-{ 0x3, 98, 1, 2569 },
-{ 0x6, 98, 1, 2565 },
-{ 0x3, 99, 0, 2568 },
-{ 0x28, 62, 1, 2420 },
-{ 0x44, 63, 1, 2415 },
-{ 0x88, 63, 1, 2419 },
-{ 0x44, 64, 1, 2414 },
-{ 0x88, 64, 1, 2418 },
-{ 0x44, 65, 1, 2413 },
-{ 0x88, 65, 1, 2417 },
-{ 0x28, 66, 0, 2416 },
-{ 0x68, 62, 1, 2276 },
-{ 0x188, 63, 1, 2275 },
-{ 0x188, 64, 1, 2274 },
-{ 0x188, 65, 1, 2273 },
-{ 0x38, 81, 1, 2272 },
-{ 0x38, 82, 1, 2271 },
-{ 0x38, 83, 1, 2270 },
-{ 0x38, 84, 0, 2269 },
-{ 0x18, 62, 1, 2580 },
-{ 0x14, 63, 1, 2575 },
-{ 0x28, 63, 1, 2579 },
-{ 0x14, 64, 1, 2574 },
-{ 0x28, 64, 1, 2578 },
-{ 0x14, 65, 1, 2573 },
-{ 0x28, 65, 1, 2577 },
-{ 0x18, 66, 0, 2576 },
-{ 0x14, 62, 1, 2428 },
-{ 0x24, 63, 1, 2427 },
-{ 0x48, 63, 1, 2423 },
-{ 0x24, 64, 1, 2426 },
-{ 0x48, 64, 1, 2422 },
-{ 0x24, 65, 1, 2425 },
-{ 0x48, 65, 1, 2421 },
-{ 0x14, 66, 0, 2424 },
-{ 0x34, 62, 1, 2284 },
-{ 0x64, 63, 1, 2283 },
-{ 0x64, 64, 1, 2282 },
-{ 0x64, 65, 1, 2281 },
-{ 0x1c, 81, 1, 2280 },
-{ 0x1c, 82, 1, 2279 },
-{ 0x1c, 83, 1, 2278 },
-{ 0x1c, 84, 0, 2277 },
-{ 0xc, 62, 1, 2588 },
-{ 0xc, 63, 1, 2587 },
-{ 0x18, 63, 1, 2583 },
-{ 0xc, 64, 1, 2586 },
-{ 0x18, 64, 1, 2582 },
-{ 0xc, 65, 1, 2585 },
-{ 0x18, 65, 1, 2581 },
-{ 0xc, 66, 0, 2584 },
-{ 0xa, 62, 1, 2436 },
-{ 0x11, 63, 1, 2431 },
-{ 0x22, 63, 1, 2435 },
-{ 0x11, 64, 1, 2430 },
-{ 0x22, 64, 1, 2434 },
-{ 0x11, 65, 1, 2429 },
-{ 0x22, 65, 1, 2433 },
-{ 0xa, 66, 0, 2432 },
-{ 0x1a, 62, 1, 2292 },
-{ 0x62, 63, 1, 2291 },
-{ 0x62, 64, 1, 2290 },
-{ 0x62, 65, 1, 2289 },
-{ 0xe, 81, 1, 2288 },
-{ 0xe, 82, 1, 2287 },
-{ 0xe, 83, 1, 2286 },
-{ 0xe, 84, 0, 2285 },
-{ 0x6, 62, 1, 2596 },
-{ 0x5, 63, 1, 2591 },
-{ 0xa, 63, 1, 2595 },
-{ 0x5, 64, 1, 2590 },
-{ 0xa, 64, 1, 2594 },
-{ 0x5, 65, 1, 2589 },
-{ 0xa, 65, 1, 2593 },
-{ 0x6, 66, 0, 2592 },
-{ 0x5, 62, 1, 2444 },
-{ 0x9, 63, 1, 2443 },
-{ 0x12, 63, 1, 2439 },
-{ 0x9, 64, 1, 2442 },
-{ 0x12, 64, 1, 2438 },
-{ 0x9, 65, 1, 2441 },
-{ 0x12, 65, 1, 2437 },
-{ 0x5, 66, 0, 2440 },
-{ 0xd, 62, 1, 2300 },
-{ 0x19, 63, 1, 2299 },
-{ 0x19, 64, 1, 2298 },
-{ 0x19, 65, 1, 2297 },
-{ 0x7, 81, 1, 2296 },
-{ 0x7, 82, 1, 2295 },
-{ 0x7, 83, 1, 2294 },
-{ 0x7, 84, 0, 2293 },
-{ 0x3, 62, 1, 2604 },
-{ 0x3, 63, 1, 2603 },
-{ 0x6, 63, 1, 2599 },
-{ 0x3, 64, 1, 2602 },
-{ 0x6, 64, 1, 2598 },
-{ 0x3, 65, 1, 2601 },
-{ 0x6, 65, 1, 2597 },
-{ 0x3, 66, 0, 2600 },
-{ 0x8, 86, 1, 2468 },
-{ 0x8, 87, 1, 2467 },
-{ 0x2, 88, 1, 2466 },
-{ 0x2, 89, 1, 2465 },
-{ 0x2, 90, 1, 2464 },
-{ 0x2, 91, 1, 2463 },
-{ 0x2, 92, 1, 2462 },
-{ 0x2, 93, 0, 2461 },
-{ 0x18, 86, 1, 2460 },
-{ 0x18, 87, 1, 2459 },
-{ 0x6, 88, 1, 2458 },
-{ 0x6, 89, 1, 2457 },
-{ 0x6, 90, 1, 2456 },
-{ 0x6, 91, 1, 2455 },
-{ 0x6, 92, 1, 2454 },
-{ 0x6, 93, 0, 2453 },
-{ 0x14, 86, 1, 2448 },
-{ 0x22, 87, 1, 2445 },
-{ 0x44, 87, 1, 2447 },
-{ 0xa, 94, 0, 2446 },
-{ 0x34, 86, 1, 2304 },
-{ 0xc4, 87, 1, 2303 },
-{ 0x38, 93, 1, 2301 },
-{ 0xe, 117, 0, 2302 },
-{ 0xc, 86, 1, 2608 },
-{ 0xa, 87, 1, 2605 },
-{ 0x14, 87, 1, 2607 },
-{ 0x6, 94, 0, 2606 },
-{ 0x2, 86, 1, 2316 },
-{ 0x2, 87, 1, 2315 },
-{ 0x4, 92, 1, 2314 },
-{ 0x4, 93, 0, 2313 },
-{ 0x12, 86, 1, 2312 },
-{ 0x42, 87, 1, 2311 },
-{ 0xc, 92, 1, 2310 },
-{ 0xc, 93, 0, 2309 },
-{ 0xa, 86, 1, 2452 },
-{ 0x12, 87, 1, 2451 },
-{ 0x24, 87, 1, 2449 },
-{ 0x5, 94, 0, 2450 },
-{ 0x1a, 86, 1, 2308 },
-{ 0x32, 87, 1, 2307 },
-{ 0x34, 93, 1, 2305 },
-{ 0x7, 117, 0, 2306 },
-{ 0x6, 86, 1, 2612 },
-{ 0x6, 87, 1, 2611 },
-{ 0xc, 87, 1, 2609 },
-{ 0x3, 94, 0, 2610 },
-{ 0x1, 86, 1, 2628 },
-{ 0x1, 87, 1, 2627 },
-{ 0x1, 88, 1, 2626 },
-{ 0x1, 89, 1, 2625 },
-{ 0x1, 90, 1, 2624 },
-{ 0x1, 91, 1, 2623 },
-{ 0x1, 92, 1, 2622 },
-{ 0x1, 93, 0, 2621 },
-{ 0x3, 86, 1, 2620 },
-{ 0x3, 87, 1, 2619 },
-{ 0x3, 88, 1, 2618 },
-{ 0x3, 89, 1, 2617 },
-{ 0x3, 90, 1, 2616 },
-{ 0x3, 91, 1, 2615 },
-{ 0x3, 92, 1, 2614 },
-{ 0x3, 93, 0, 2613 },
-{ 0x8, 53, 1, 2492 },
-{ 0x8, 54, 1, 2491 },
-{ 0x2, 55, 1, 2490 },
-{ 0x2, 56, 1, 2489 },
-{ 0x2, 57, 1, 2488 },
-{ 0x2, 58, 1, 2487 },
-{ 0x2, 59, 1, 2486 },
-{ 0x2, 60, 0, 2485 },
-{ 0x18, 53, 1, 2484 },
-{ 0x18, 54, 1, 2483 },
-{ 0x6, 55, 1, 2482 },
-{ 0x6, 56, 1, 2481 },
-{ 0x6, 57, 1, 2480 },
-{ 0x6, 58, 1, 2479 },
-{ 0x6, 59, 1, 2478 },
-{ 0x6, 60, 0, 2477 },
-{ 0x14, 53, 1, 2472 },
-{ 0x22, 54, 1, 2469 },
-{ 0x44, 54, 1, 2471 },
-{ 0xa, 61, 0, 2470 },
-{ 0x34, 53, 1, 2320 },
-{ 0xc4, 54, 1, 2319 },
-{ 0x38, 60, 1, 2317 },
-{ 0xe, 80, 0, 2318 },
-{ 0xc, 53, 1, 2632 },
-{ 0xa, 54, 1, 2629 },
-{ 0x14, 54, 1, 2631 },
-{ 0x6, 61, 0, 2630 },
-{ 0x2, 53, 1, 2332 },
-{ 0x2, 54, 1, 2331 },
-{ 0x4, 59, 1, 2330 },
-{ 0x4, 60, 0, 2329 },
-{ 0x12, 53, 1, 2328 },
-{ 0x42, 54, 1, 2327 },
-{ 0xc, 59, 1, 2326 },
-{ 0xc, 60, 0, 2325 },
-{ 0xa, 53, 1, 2476 },
-{ 0x12, 54, 1, 2475 },
-{ 0x24, 54, 1, 2473 },
-{ 0x5, 61, 0, 2474 },
-{ 0x1a, 53, 1, 2324 },
-{ 0x32, 54, 1, 2323 },
-{ 0x34, 60, 1, 2321 },
-{ 0x7, 80, 0, 2322 },
-{ 0x6, 53, 1, 2636 },
-{ 0x6, 54, 1, 2635 },
-{ 0xc, 54, 1, 2633 },
-{ 0x3, 61, 0, 2634 },
-{ 0x1, 53, 1, 2652 },
-{ 0x1, 54, 1, 2651 },
-{ 0x1, 55, 1, 2650 },
-{ 0x1, 56, 1, 2649 },
-{ 0x1, 57, 1, 2648 },
-{ 0x1, 58, 1, 2647 },
-{ 0x1, 59, 1, 2646 },
-{ 0x1, 60, 0, 2645 },
-{ 0x3, 53, 1, 2644 },
-{ 0x3, 54, 1, 2643 },
-{ 0x3, 55, 1, 2642 },
-{ 0x3, 56, 1, 2641 },
-{ 0x3, 57, 1, 2640 },
-{ 0x3, 58, 1, 2639 },
-{ 0x3, 59, 1, 2638 },
-{ 0x3, 60, 0, 2637 },
-{ 0x1, 4, 0, 2653 },
-{ 0x1, 296, 0, 2654 },
-{ 0x1, 379, 0, 2655 },
-{ 0x1, 374, 0, 2656 },
-{ 0x2, 358, 0, 2657 },
-{ 0x1, 358, 0, 2660 },
-{ 0x2, 357, 0, 2658 },
-{ 0x1, 357, 0, 2661 },
-{ 0x2, 356, 0, 2659 },
-{ 0x1, 356, 0, 2662 },
-{ 0x1, 355, 0, 2663 },
-{ 0x1, 354, 0, 2664 },
-{ 0x2, 353, 0, 2665 },
-{ 0x1, 353, 0, 2667 },
-{ 0x2, 352, 0, 2666 },
-{ 0x1, 352, 0, 2668 },
-{ 0x1, 382, 0, 2675 },
-{ 0x8, 381, 0, 2669 },
-{ 0x4, 381, 0, 2671 },
-{ 0x2, 381, 0, 2673 },
-{ 0x1, 381, 0, 2676 },
-{ 0x8, 380, 0, 2670 },
-{ 0x4, 380, 0, 2672 },
-{ 0x2, 380, 0, 2674 },
-{ 0x1, 380, 0, 2677 },
-{ 0x1, 351, 0, 2684 },
-{ 0x8, 350, 0, 2678 },
-{ 0x4, 350, 0, 2680 },
-{ 0x2, 350, 0, 2682 },
-{ 0x1, 350, 0, 2685 },
-{ 0x8, 349, 0, 2679 },
-{ 0x4, 349, 0, 2681 },
-{ 0x2, 349, 1, 2683 },
-{ 0x4, 143, 0, 1377 },
-{ 0x1, 349, 0, 2686 },
-{ 0x1, 6, 0, 2687 },
-{ 0x1, 7, 0, 2688 },
-{ 0x1, 295, 0, 2689 },
-{ 0x1, 456, 0, 2690 },
-{ 0x1, 346, 0, 2691 },
-{ 0x1, 13, 0, 2692 },
-{ 0x1, 11, 0, 2693 },
-{ 0x1, 422, 0, 2694 },
-{ 0x1, 394, 0, 2695 },
-{ 0x1, 393, 0, 2696 },
-{ 0x1, 455, 0, 2697 },
-{ 0x1, 345, 0, 2698 },
-{ 0x1, 12, 0, 2699 },
-{ 0x1, 10, 0, 2700 },
-{ 0x1, 5, 0, 2701 },
-{ 0x1, 421, 0, 2702 },
-{ 0x1, 420, 0, 2703 },
-{ 0x1, 1, 0, 2704 },
-{ 0x1, 0, 0, 2705 },
-};
-
-
-/* ia64-opc.c -- Functions to access the compacted opcode table
-   Copyright 1999, 2000, 2001, 2003, 2005 Free Software Foundation, Inc.
-   Written by Bob Manson of Cygnus Solutions, <manson@cygnus.com>
-
-   This file is part of GDB, GAS, and the GNU binutils.
-
-   GDB, GAS, and the GNU binutils are free software; you can redistribute
-   them and/or modify them under the terms of the GNU General Public
-   License as published by the Free Software Foundation; either version
-   2, or (at your option) any later version.
-
-   GDB, GAS, and the GNU binutils are distributed in the hope that they
-   will be useful, but WITHOUT ANY WARRANTY; without even the implied
-   warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See
-   the GNU General Public License for more details.
-
-   You should have received a copy of the GNU General Public License
-   along with this file; see the file COPYING.  If not, see
-   <http://www.gnu.org/licenses/>. */
-
-static const struct ia64_templ_desc ia64_templ_desc[16] =
-  {
-    { 0, { IA64_UNIT_M, IA64_UNIT_I, IA64_UNIT_I }, "MII" },	/* 0 */
-    { 2, { IA64_UNIT_M, IA64_UNIT_I, IA64_UNIT_I }, "MII" },
-    { 0, { IA64_UNIT_M, IA64_UNIT_L, IA64_UNIT_X }, "MLX" },
-    { 0, { 0, },				    "-3-" },
-    { 0, { IA64_UNIT_M, IA64_UNIT_M, IA64_UNIT_I }, "MMI" },	/* 4 */
-    { 1, { IA64_UNIT_M, IA64_UNIT_M, IA64_UNIT_I }, "MMI" },
-    { 0, { IA64_UNIT_M, IA64_UNIT_F, IA64_UNIT_I }, "MFI" },
-    { 0, { IA64_UNIT_M, IA64_UNIT_M, IA64_UNIT_F }, "MMF" },
-    { 0, { IA64_UNIT_M, IA64_UNIT_I, IA64_UNIT_B }, "MIB" },	/* 8 */
-    { 0, { IA64_UNIT_M, IA64_UNIT_B, IA64_UNIT_B }, "MBB" },
-    { 0, { 0, },				    "-a-" },
-    { 0, { IA64_UNIT_B, IA64_UNIT_B, IA64_UNIT_B }, "BBB" },
-    { 0, { IA64_UNIT_M, IA64_UNIT_M, IA64_UNIT_B }, "MMB" },	/* c */
-    { 0, { 0, },				    "-d-" },
-    { 0, { IA64_UNIT_M, IA64_UNIT_F, IA64_UNIT_B }, "MFB" },
-    { 0, { 0, },				    "-f-" },
-  };
-
-/* Apply the completer referred to by COMPLETER_INDEX to OPCODE, and
-   return the result. */
-
-static ia64_insn
-apply_completer (ia64_insn opcode, int completer_index)
-{
-  ia64_insn mask = completer_table[completer_index].mask;
-  ia64_insn bits = completer_table[completer_index].bits;
-  int shiftamt = (completer_table[completer_index].offset & 63);
-
-  mask = mask << shiftamt;
-  bits = bits << shiftamt;
-  opcode = (opcode & ~mask) | bits;
-  return opcode;
-}
-
-/* Extract BITS number of bits starting from OP_POINTER + BITOFFSET in
-   the dis_table array, and return its value.  (BITOFFSET is numbered
-   starting from MSB to LSB, so a BITOFFSET of 0 indicates the MSB of the
-   first byte in OP_POINTER.) */
-
-static int
-extract_op_bits (int op_pointer, int bitoffset, int bits)
-{
-  int res = 0;
-
-  op_pointer += (bitoffset / 8);
-
-  if (bitoffset % 8)
-    {
-      unsigned int op = dis_table[op_pointer++];
-      int numb = 8 - (bitoffset % 8);
-      int mask = (1 << numb) - 1;
-      int bata = (bits < numb) ? bits : numb;
-      int delta = numb - bata;
-
-      res = (res << bata) | ((op & mask) >> delta);
-      bitoffset += bata;
-      bits -= bata;
-    }
-  while (bits >= 8)
-    {
-      res = (res << 8) | (dis_table[op_pointer++] & 255);
-      bits -= 8;
-    }
-  if (bits > 0)
-    {
-      unsigned int op = (dis_table[op_pointer++] & 255);
-      res = (res << bits) | (op >> (8 - bits));
-    }
-  return res;
-}
-
-/* Examine the state machine entry at OP_POINTER in the dis_table
-   array, and extract its values into OPVAL and OP.  The length of the
-   state entry in bits is returned. */
-
-static int
-extract_op (int op_pointer, int *opval, unsigned int *op)
-{
-  int oplen = 5;
-
-  *op = dis_table[op_pointer];
-
-  if ((*op) & 0x40)
-    {
-      opval[0] = extract_op_bits (op_pointer, oplen, 5);
-      oplen += 5;
-    }
-  switch ((*op) & 0x30)
-    {
-    case 0x10:
-      {
-	opval[1] = extract_op_bits (op_pointer, oplen, 8);
-	oplen += 8;
-	opval[1] += op_pointer;
-	break;
-      }
-    case 0x20:
-      {
-	opval[1] = extract_op_bits (op_pointer, oplen, 16);
-	if (! (opval[1] & 32768))
-	  {
-	    opval[1] += op_pointer;
-	  }
-	oplen += 16;
-	break;
-      }
-    case 0x30:
-      {
-	oplen--;
-	opval[2] = extract_op_bits (op_pointer, oplen, 12);
-	oplen += 12;
-	opval[2] |= 32768;
-	break;
-      }
-    }
-  if (((*op) & 0x08) && (((*op) & 0x30) != 0x30))
-    {
-      opval[2] = extract_op_bits (op_pointer, oplen, 16);
-      oplen += 16;
-      if (! (opval[2] & 32768))
-	{
-	  opval[2] += op_pointer;
-	}
-    }
-  return oplen;
-}
-
-/* Returns a non-zero value if the opcode in the main_table list at
-   PLACE matches OPCODE and is of type TYPE. */
-
-static int
-opcode_verify (ia64_insn opcode, int place, enum ia64_insn_type type)
-{
-  if (main_table[place].opcode_type != type)
-    {
-      return 0;
-    }
-  if (main_table[place].flags
-      & (IA64_OPCODE_F2_EQ_F3 | IA64_OPCODE_LEN_EQ_64MCNT))
-    {
-      const struct ia64_operand *o1, *o2;
-      ia64_insn f2, f3;
-
-      if (main_table[place].flags & IA64_OPCODE_F2_EQ_F3)
-	{
-	  o1 = elf64_ia64_operands + IA64_OPND_F2;
-	  o2 = elf64_ia64_operands + IA64_OPND_F3;
-	  (*o1->extract) (o1, opcode, &f2);
-	  (*o2->extract) (o2, opcode, &f3);
-	  if (f2 != f3)
-	    return 0;
-	}
-      else
-	{
-	  ia64_insn len, count;
-
-	  /* length must equal 64-count: */
-	  o1 = elf64_ia64_operands + IA64_OPND_LEN6;
-	  o2 = elf64_ia64_operands + main_table[place].operands[2];
-	  (*o1->extract) (o1, opcode, &len);
-	  (*o2->extract) (o2, opcode, &count);
-	  if (len != 64 - count)
-	    return 0;
-	}
-    }
-  return 1;
-}
-
-/* Find an instruction entry in the ia64_dis_names array that matches
-   opcode OPCODE and is of type TYPE.  Returns either a positive index
-   into the array, or a negative value if an entry for OPCODE could
-   not be found.  Checks all matches and returns the one with the highest
-   priority. */
-
-static int
-locate_opcode_ent (ia64_insn opcode, enum ia64_insn_type type)
-{
-  int currtest[41];
-  int bitpos[41];
-  int op_ptr[41];
-  int currstatenum = 0;
-  short found_disent = -1;
-  short found_priority = -1;
-
-  currtest[currstatenum] = 0;
-  op_ptr[currstatenum] = 0;
-  bitpos[currstatenum] = 40;
-
-  while (1)
-    {
-      int op_pointer = op_ptr[currstatenum];
-      unsigned int op;
-      int currbitnum = bitpos[currstatenum];
-      int oplen;
-      int opval[3] = {0};
-      int next_op;
-      int currbit;
-
-      oplen = extract_op (op_pointer, opval, &op);
-
-      bitpos[currstatenum] = currbitnum;
-
-      /* Skip opval[0] bits in the instruction. */
-      if (op & 0x40)
-	{
-	  currbitnum -= opval[0];
-	}
-
-      /* The value of the current bit being tested. */
-      currbit = opcode & (((ia64_insn) 1) << currbitnum) ? 1 : 0;
-      next_op = -1;
-
-      /* We always perform the tests specified in the current state in
-	 a particular order, falling through to the next test if the
-	 previous one failed. */
-      switch (currtest[currstatenum])
-	{
-	case 0:
-	  currtest[currstatenum]++;
-	  if (currbit == 0 && (op & 0x80))
-	    {
-	      /* Check for a zero bit.  If this test solely checks for
-		 a zero bit, we can check for up to 8 consecutive zero
-		 bits (the number to check is specified by the lower 3
-		 bits in the state code.)
-
-		 If the state instruction matches, we go to the very
-		 next state instruction; otherwise, try the next test. */
-
-	      if ((op & 0xf8) == 0x80)
-		{
-		  int count = op & 0x7;
-		  int x;
-
-		  for (x = 0; x <= count; x++)
-		    {
-		      int i =
-			opcode & (((ia64_insn) 1) << (currbitnum - x)) ? 1 : 0;
-		      if (i)
-			{
-			  break;
-			}
-		    }
-		  if (x > count)
-		    {
-		      next_op = op_pointer + ((oplen + 7) / 8);
-		      currbitnum -= count;
-		      break;
-		    }
-		}
-	      else if (! currbit)
-		{
-		  next_op = op_pointer + ((oplen + 7) / 8);
-		  break;
-		}
-	    }
-	  /* FALLTHROUGH */
-	case 1:
-	  /* If the bit in the instruction is one, go to the state
-	     instruction specified by opval[1]. */
-	  currtest[currstatenum]++;
-	  if (currbit && (op & 0x30) != 0 && ((op & 0x30) != 0x30))
-	    {
-	      next_op = opval[1];
-	      break;
-	    }
-	  /* FALLTHROUGH */
-	case 2:
-	  /* Don't care.  Skip the current bit and go to the state
-	     instruction specified by opval[2].
-
-	     An encoding of 0x30 is special; this means that a 12-bit
-	     offset into the ia64_dis_names[] array is specified.  */
-	  currtest[currstatenum]++;
-	  if ((op & 0x08) || ((op & 0x30) == 0x30))
-	    {
-	      next_op = opval[2];
-	      break;
-	    }
-	}
-
-      /* If bit 15 is set in the address of the next state, an offset
-	 in the ia64_dis_names array was specified instead.  We then
-	 check to see if an entry in the list of opcodes matches the
-	 opcode we were given; if so, we have succeeded.  */
-
-      if ((next_op >= 0) && (next_op & 32768))
-	{
-	  short disent = next_op & 32767;
-          short priority = -1;
-
-	  if (next_op > 65535)
-	    {
-	      abort ();
-	    }
-
-	  /* Run through the list of opcodes to check, trying to find
-	     one that matches.  */
-	  while (disent >= 0)
-	    {
-	      int place = ia64_dis_names[disent].insn_index;
-
-              priority = ia64_dis_names[disent].priority;
-
-	      if (opcode_verify (opcode, place, type)
-                  && priority > found_priority)
-		{
-		  break;
-		}
-	      if (ia64_dis_names[disent].next_flag)
-		{
-		  disent++;
-		}
-	      else
-		{
-		  disent = -1;
-		}
-	    }
-
-	  if (disent >= 0)
-	    {
-              found_disent = disent;
-              found_priority = priority;
-	    }
-          /* Try the next test in this state, regardless of whether a match
-             was found. */
-          next_op = -2;
-	}
-
-      /* next_op == -1 is "back up to the previous state".
-	 next_op == -2 is "stay in this state and try the next test".
-	 Otherwise, transition to the state indicated by next_op. */
-
-      if (next_op == -1)
-	{
-	  currstatenum--;
-	  if (currstatenum < 0)
-	    {
-              return found_disent;
-	    }
-	}
-      else if (next_op >= 0)
-	{
-	  currstatenum++;
-	  bitpos[currstatenum] = currbitnum - 1;
-	  op_ptr[currstatenum] = next_op;
-	  currtest[currstatenum] = 0;
-	}
-    }
-}
-
-/* Construct an ia64_opcode entry based on OPCODE, NAME and PLACE. */
-
-static struct ia64_opcode *
-make_ia64_opcode (ia64_insn opcode, const char *name, int place, int depind)
-{
-  struct ia64_opcode *res =
-    (struct ia64_opcode *) malloc (sizeof (struct ia64_opcode));
-  res->name = strdup (name);
-  res->type = main_table[place].opcode_type;
-  res->num_outputs = main_table[place].num_outputs;
-  res->opcode = opcode;
-  res->mask = main_table[place].mask;
-  res->operands[0] = main_table[place].operands[0];
-  res->operands[1] = main_table[place].operands[1];
-  res->operands[2] = main_table[place].operands[2];
-  res->operands[3] = main_table[place].operands[3];
-  res->operands[4] = main_table[place].operands[4];
-  res->flags = main_table[place].flags;
-  res->ent_index = place;
-  res->dependencies = &op_dependencies[depind];
-  return res;
-}
-
-/* Determine the ia64_opcode entry for the opcode specified by INSN
-   and TYPE.  If a valid entry is not found, return NULL. */
-static struct ia64_opcode *
-ia64_dis_opcode (ia64_insn insn, enum ia64_insn_type type)
-{
-  int disent = locate_opcode_ent (insn, type);
-
-  if (disent < 0)
-    {
-      return NULL;
-    }
-  else
-    {
-      unsigned int cb = ia64_dis_names[disent].completer_index;
-      static char name[128];
-      int place = ia64_dis_names[disent].insn_index;
-      int ci = main_table[place].completers;
-      ia64_insn tinsn = main_table[place].opcode;
-
-      strcpy (name, ia64_strings [main_table[place].name_index]);
-
-      while (cb)
-	{
-	  if (cb & 1)
-	    {
-	      int cname = completer_table[ci].name_index;
-
-	      tinsn = apply_completer (tinsn, ci);
-
-	      if (ia64_strings[cname][0] != '\0')
-		{
-		  strcat (name, ".");
-		  strcat (name, ia64_strings[cname]);
-		}
-	      if (cb != 1)
-		{
-		  ci = completer_table[ci].subentries;
-		}
-	    }
-	  else
-	    {
-	      ci = completer_table[ci].alternative;
-	    }
-	  if (ci < 0)
-	    {
-	      abort ();
-	    }
-	  cb = cb >> 1;
-	}
-      if (tinsn != (insn & main_table[place].mask))
-	{
-	  abort ();
-	}
-      return make_ia64_opcode (insn, name, place,
-                               completer_table[ci].dependencies);
-    }
-}
-
-/* Free any resources used by ENT. */
-static void
-ia64_free_opcode (struct ia64_opcode *ent)
-{
-  free ((void *)ent->name);
-  free (ent);
-}
-
-/* Disassemble ia64 instruction.  */
-
-/* Return the instruction type for OPCODE found in unit UNIT. */
-
-static enum ia64_insn_type
-unit_to_type (ia64_insn opcode, enum ia64_unit unit)
-{
-  enum ia64_insn_type type;
-  int op;
-
-  op = IA64_OP (opcode);
-
-  if (op >= 8 && (unit == IA64_UNIT_I || unit == IA64_UNIT_M))
-    {
-      type = IA64_TYPE_A;
-    }
-  else
-    {
-      switch (unit)
-	{
-	case IA64_UNIT_I:
-	  type = IA64_TYPE_I; break;
-	case IA64_UNIT_M:
-	  type = IA64_TYPE_M; break;
-	case IA64_UNIT_B:
-	  type = IA64_TYPE_B; break;
-	case IA64_UNIT_F:
-	  type = IA64_TYPE_F; break;
-        case IA64_UNIT_L:
-	case IA64_UNIT_X:
-	  type = IA64_TYPE_X; break;
-	default:
-	  type = -1;
-	}
-    }
-  return type;
-}
-
-int
-print_insn_ia64 (bfd_vma memaddr, struct disassemble_info *info)
-{
-  ia64_insn t0, t1, slot[3], template, s_bit, insn;
-  int slotnum, j, status, need_comma, retval, slot_multiplier;
-  const struct ia64_operand *odesc;
-  const struct ia64_opcode *idesc;
-  const char *err, *str, *tname;
-  uint64_t value;
-  bfd_byte bundle[16];
-  enum ia64_unit unit;
-  char regname[16];
-
-  if (info->bytes_per_line == 0)
-    info->bytes_per_line = 6;
-  info->display_endian = info->endian;
-
-  slot_multiplier = info->bytes_per_line;
-  retval = slot_multiplier;
-
-  slotnum = (((long) memaddr) & 0xf) / slot_multiplier;
-  if (slotnum > 2)
-    return -1;
-
-  memaddr -= (memaddr & 0xf);
-  status = (*info->read_memory_func) (memaddr, bundle, sizeof (bundle), info);
-  if (status != 0)
-    {
-      (*info->memory_error_func) (status, memaddr, info);
-      return -1;
-    }
-  /* bundles are always in little-endian byte order */
-  t0 = bfd_getl64 (bundle);
-  t1 = bfd_getl64 (bundle + 8);
-  s_bit = t0 & 1;
-  template = (t0 >> 1) & 0xf;
-  slot[0] = (t0 >>  5) & 0x1ffffffffffLL;
-  slot[1] = ((t0 >> 46) & 0x3ffff) | ((t1 & 0x7fffff) << 18);
-  slot[2] = (t1 >> 23) & 0x1ffffffffffLL;
-
-  tname = ia64_templ_desc[template].name;
-  if (slotnum == 0)
-    (*info->fprintf_func) (info->stream, "[%s] ", tname);
-  else
-    (*info->fprintf_func) (info->stream, "      ");
-
-  unit = ia64_templ_desc[template].exec_unit[slotnum];
-
-  if (template == 2 && slotnum == 1)
-    {
-      /* skip L slot in MLI template: */
-      slotnum = 2;
-      retval += slot_multiplier;
-    }
-
-  insn = slot[slotnum];
-
-  if (unit == IA64_UNIT_NIL)
-    goto decoding_failed;
-
-  idesc = ia64_dis_opcode (insn, unit_to_type (insn, unit));
-  if (idesc == NULL)
-    goto decoding_failed;
-
-  /* print predicate, if any: */
-
-  if ((idesc->flags & IA64_OPCODE_NO_PRED)
-      || (insn & 0x3f) == 0)
-    (*info->fprintf_func) (info->stream, "      ");
-  else
-    (*info->fprintf_func) (info->stream, "(p%02d) ", (int)(insn & 0x3f));
-
-  /* now the actual instruction: */
-
-  (*info->fprintf_func) (info->stream, "%s", idesc->name);
-  if (idesc->operands[0])
-    (*info->fprintf_func) (info->stream, " ");
-
-  need_comma = 0;
-  for (j = 0; j < NELEMS (idesc->operands) && idesc->operands[j]; ++j)
-    {
-      odesc = elf64_ia64_operands + idesc->operands[j];
-
-      if (need_comma)
-	(*info->fprintf_func) (info->stream, ",");
-
-      if (odesc - elf64_ia64_operands == IA64_OPND_IMMU64)
-	{
-	  /* special case of 64 bit immediate load: */
-	  value = ((insn >> 13) & 0x7f) | (((insn >> 27) & 0x1ff) << 7)
-	    | (((insn >> 22) & 0x1f) << 16) | (((insn >> 21) & 0x1) << 21)
-	    | (slot[1] << 22) | (((insn >> 36) & 0x1) << 63);
-	}
-      else if (odesc - elf64_ia64_operands == IA64_OPND_IMMU62)
-        {
-          /* 62-bit immediate for nop.x/break.x */
-          value = ((slot[1] & 0x1ffffffffffLL) << 21)
-            | (((insn >> 36) & 0x1) << 20)
-            | ((insn >> 6) & 0xfffff);
-        }
-      else if (odesc - elf64_ia64_operands == IA64_OPND_TGT64)
-	{
-	  /* 60-bit immediate for long branches. */
-	  value = (((insn >> 13) & 0xfffff)
-		   | (((insn >> 36) & 1) << 59)
-		   | (((slot[1] >> 2) & 0x7fffffffffLL) << 20)) << 4;
-	}
-      else
-	{
-	  err = (*odesc->extract) (odesc, insn, &value);
-	  if (err)
-	    {
-	      (*info->fprintf_func) (info->stream, "%s", err);
-	      goto done;
-	    }
-	}
-
-	switch (odesc->class)
-	  {
-	  case IA64_OPND_CLASS_CST:
-	    (*info->fprintf_func) (info->stream, "%s", odesc->str);
-	    break;
-
-	  case IA64_OPND_CLASS_REG:
-	    if (odesc->str[0] == 'a' && odesc->str[1] == 'r')
-	      {
-		switch (value)
-		  {
-		  case 0: case 1: case 2: case 3:
-		  case 4: case 5: case 6: case 7:
-		    sprintf (regname, "ar.k%u", (unsigned int) value);
-		    break;
-		  case 16:	strcpy (regname, "ar.rsc"); break;
-		  case 17:	strcpy (regname, "ar.bsp"); break;
-		  case 18:	strcpy (regname, "ar.bspstore"); break;
-		  case 19:	strcpy (regname, "ar.rnat"); break;
-		  case 32:	strcpy (regname, "ar.ccv"); break;
-		  case 36:	strcpy (regname, "ar.unat"); break;
-		  case 40:	strcpy (regname, "ar.fpsr"); break;
-		  case 44:	strcpy (regname, "ar.itc"); break;
-		  case 64:	strcpy (regname, "ar.pfs"); break;
-		  case 65:	strcpy (regname, "ar.lc"); break;
-		  case 66:	strcpy (regname, "ar.ec"); break;
-		  default:
-		    sprintf (regname, "ar%u", (unsigned int) value);
-		    break;
-		  }
-		(*info->fprintf_func) (info->stream, "%s", regname);
-	      }
-	    else
-	      (*info->fprintf_func) (info->stream, "%s%d", odesc->str, (int)value);
-	    break;
-
-	  case IA64_OPND_CLASS_IND:
-	    (*info->fprintf_func) (info->stream, "%s[r%d]", odesc->str, (int)value);
-	    break;
-
-	  case IA64_OPND_CLASS_ABS:
-	    str = 0;
-	    if (odesc - elf64_ia64_operands == IA64_OPND_MBTYPE4)
-	      switch (value)
-		{
-		case 0x0: str = "@brcst"; break;
-		case 0x8: str = "@mix"; break;
-		case 0x9: str = "@shuf"; break;
-		case 0xa: str = "@alt"; break;
-		case 0xb: str = "@rev"; break;
-		}
-
-	    if (str)
-	      (*info->fprintf_func) (info->stream, "%s", str);
-	    else if (odesc->flags & IA64_OPND_FLAG_DECIMAL_SIGNED)
-              (*info->fprintf_func) (info->stream, "%" PRId64,
-                                     (int64_t) value);
-	    else if (odesc->flags & IA64_OPND_FLAG_DECIMAL_UNSIGNED)
-              (*info->fprintf_func) (info->stream, "%" PRIu64,
-                                     (uint64_t) value);
-	    else
-              (*info->fprintf_func) (info->stream, "0x%" PRIx64,
-                                     (uint64_t) value);
-	    break;
-
-	  case IA64_OPND_CLASS_REL:
-	    (*info->print_address_func) (memaddr + value, info);
-	    break;
-	  }
-
-      need_comma = 1;
-      if (j + 1 == idesc->num_outputs)
-	{
-	  (*info->fprintf_func) (info->stream, "=");
-	  need_comma = 0;
-	}
-    }
-  if (slotnum + 1 == ia64_templ_desc[template].group_boundary
-      || ((slotnum == 2) && s_bit))
-    (*info->fprintf_func) (info->stream, ";;");
-
- done:
-  ia64_free_opcode ((struct ia64_opcode *)idesc);
- failed:
-  if (slotnum == 2)
-    retval += 16 - 3*slot_multiplier;
-  return retval;
-
- decoding_failed:
-  (*info->fprintf_func) (info->stream, "      data8 %#011llx", (long long) insn);
-  goto failed;
-}
diff --git a/tcg/ia64/tcg-target.inc.c b/tcg/ia64/tcg-target.inc.c
deleted file mode 100644
index bf9a97d75c..0000000000
--- a/tcg/ia64/tcg-target.inc.c
+++ /dev/null
@@ -1,2482 +0,0 @@ 
-/*
- * Tiny Code Generator for QEMU
- *
- * Copyright (c) 2009-2010 Aurelien Jarno <aurelien@aurel32.net>
- * Based on i386/tcg-target.c - Copyright (c) 2008 Fabrice Bellard
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to deal
- * in the Software without restriction, including without limitation the rights
- * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
- * copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
- * THE SOFTWARE.
- */
-
-/*
- * Register definitions
- */
-
-#ifdef CONFIG_DEBUG_TCG
-static const char * const tcg_target_reg_names[TCG_TARGET_NB_REGS] = {
-     "r0",  "r1",  "r2",  "r3",  "r4",  "r5",  "r6",  "r7",
-     "r8",  "r9", "r10", "r11", "r12", "r13", "r14", "r15",
-    "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
-    "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
-    "r32", "r33", "r34", "r35", "r36", "r37", "r38", "r39",
-    "r40", "r41", "r42", "r43", "r44", "r45", "r46", "r47",
-    "r48", "r49", "r50", "r51", "r52", "r53", "r54", "r55",
-    "r56", "r57", "r58", "r59", "r60", "r61", "r62", "r63",
-};
-#endif
-
-#ifndef CONFIG_SOFTMMU
-#define TCG_GUEST_BASE_REG TCG_REG_R55
-#endif
-
-/* Branch registers */
-enum {
-    TCG_REG_B0 = 0,
-    TCG_REG_B1,
-    TCG_REG_B2,
-    TCG_REG_B3,
-    TCG_REG_B4,
-    TCG_REG_B5,
-    TCG_REG_B6,
-    TCG_REG_B7,
-};
-
-/* Floating point registers */
-enum {
-    TCG_REG_F0 = 0,
-    TCG_REG_F1,
-    TCG_REG_F2,
-    TCG_REG_F3,
-    TCG_REG_F4,
-    TCG_REG_F5,
-    TCG_REG_F6,
-    TCG_REG_F7,
-    TCG_REG_F8,
-    TCG_REG_F9,
-    TCG_REG_F10,
-    TCG_REG_F11,
-    TCG_REG_F12,
-    TCG_REG_F13,
-    TCG_REG_F14,
-    TCG_REG_F15,
-};
-
-/* Predicate registers */
-enum {
-    TCG_REG_P0 = 0,
-    TCG_REG_P1,
-    TCG_REG_P2,
-    TCG_REG_P3,
-    TCG_REG_P4,
-    TCG_REG_P5,
-    TCG_REG_P6,
-    TCG_REG_P7,
-    TCG_REG_P8,
-    TCG_REG_P9,
-    TCG_REG_P10,
-    TCG_REG_P11,
-    TCG_REG_P12,
-    TCG_REG_P13,
-    TCG_REG_P14,
-    TCG_REG_P15,
-};
-
-/* Application registers */
-enum {
-    TCG_REG_PFS = 64,
-};
-
-static const int tcg_target_reg_alloc_order[] = {
-    TCG_REG_R35,
-    TCG_REG_R36,
-    TCG_REG_R37,
-    TCG_REG_R38,
-    TCG_REG_R39,
-    TCG_REG_R40,
-    TCG_REG_R41,
-    TCG_REG_R42,
-    TCG_REG_R43,
-    TCG_REG_R44,
-    TCG_REG_R45,
-    TCG_REG_R46,
-    TCG_REG_R47,
-    TCG_REG_R48,
-    TCG_REG_R49,
-    TCG_REG_R50,
-    TCG_REG_R51,
-    TCG_REG_R52,
-    TCG_REG_R53,
-    TCG_REG_R54,
-    TCG_REG_R55,
-    TCG_REG_R14,
-    TCG_REG_R15,
-    TCG_REG_R16,
-    TCG_REG_R17,
-    TCG_REG_R18,
-    TCG_REG_R19,
-    TCG_REG_R20,
-    TCG_REG_R21,
-    TCG_REG_R22,
-    TCG_REG_R23,
-    TCG_REG_R24,
-    TCG_REG_R25,
-    TCG_REG_R26,
-    TCG_REG_R27,
-    TCG_REG_R28,
-    TCG_REG_R29,
-    TCG_REG_R30,
-    TCG_REG_R31,
-    TCG_REG_R56,
-    TCG_REG_R57,
-    TCG_REG_R58,
-    TCG_REG_R59,
-    TCG_REG_R60,
-    TCG_REG_R61,
-    TCG_REG_R62,
-    TCG_REG_R63,
-    TCG_REG_R8,
-    TCG_REG_R9,
-    TCG_REG_R10,
-    TCG_REG_R11
-};
-
-static const int tcg_target_call_iarg_regs[8] = {
-    TCG_REG_R56,
-    TCG_REG_R57,
-    TCG_REG_R58,
-    TCG_REG_R59,
-    TCG_REG_R60,
-    TCG_REG_R61,
-    TCG_REG_R62,
-    TCG_REG_R63,
-};
-
-static const int tcg_target_call_oarg_regs[] = {
-    TCG_REG_R8
-};
-
-/*
- * opcode formation
- */
-
-/* bundle templates: stops (double bar in the IA64 manual) are marked with
-   an uppercase letter. */
-enum {
-    mii = 0x00,
-    miI = 0x01,
-    mIi = 0x02,
-    mII = 0x03,
-    mlx = 0x04,
-    mLX = 0x05,
-    mmi = 0x08,
-    mmI = 0x09,
-    Mmi = 0x0a,
-    MmI = 0x0b,
-    mfi = 0x0c,
-    mfI = 0x0d,
-    mmf = 0x0e,
-    mmF = 0x0f,
-    mib = 0x10,
-    miB = 0x11,
-    mbb = 0x12,
-    mbB = 0x13,
-    bbb = 0x16,
-    bbB = 0x17,
-    mmb = 0x18,
-    mmB = 0x19,
-    mfb = 0x1c,
-    mfB = 0x1d,
-};
-
-enum {
-    OPC_ADD_A1                = 0x10000000000ull,
-    OPC_AND_A1                = 0x10060000000ull,
-    OPC_AND_A3                = 0x10160000000ull,
-    OPC_ANDCM_A1              = 0x10068000000ull,
-    OPC_ANDCM_A3              = 0x10168000000ull,
-    OPC_ADDS_A4               = 0x10800000000ull,
-    OPC_ADDL_A5               = 0x12000000000ull,
-    OPC_ALLOC_M34             = 0x02c00000000ull,
-    OPC_BR_DPTK_FEW_B1        = 0x08400000000ull,
-    OPC_BR_SPTK_MANY_B1       = 0x08000001000ull,
-    OPC_BR_CALL_SPNT_FEW_B3   = 0x0a200000000ull,
-    OPC_BR_SPTK_MANY_B4       = 0x00100001000ull,
-    OPC_BR_CALL_SPTK_MANY_B5  = 0x02100001000ull,
-    OPC_BR_RET_SPTK_MANY_B4   = 0x00108001100ull,
-    OPC_BRL_SPTK_MANY_X3      = 0x18000001000ull,
-    OPC_BRL_CALL_SPNT_MANY_X4 = 0x1a200001000ull,
-    OPC_BRL_CALL_SPTK_MANY_X4 = 0x1a000001000ull,
-    OPC_CMP_LT_A6             = 0x18000000000ull,
-    OPC_CMP_LTU_A6            = 0x1a000000000ull,
-    OPC_CMP_EQ_A6             = 0x1c000000000ull,
-    OPC_CMP4_LT_A6            = 0x18400000000ull,
-    OPC_CMP4_LTU_A6           = 0x1a400000000ull,
-    OPC_CMP4_EQ_A6            = 0x1c400000000ull,
-    OPC_DEP_I14               = 0x0ae00000000ull,
-    OPC_DEP_I15               = 0x08000000000ull,
-    OPC_DEP_Z_I12             = 0x0a600000000ull,
-    OPC_EXTR_I11              = 0x0a400002000ull,
-    OPC_EXTR_U_I11            = 0x0a400000000ull,
-    OPC_FCVT_FX_TRUNC_S1_F10  = 0x004d0000000ull,
-    OPC_FCVT_FXU_TRUNC_S1_F10 = 0x004d8000000ull,
-    OPC_FCVT_XF_F11           = 0x000e0000000ull,
-    OPC_FMA_S1_F1             = 0x10400000000ull,
-    OPC_FNMA_S1_F1            = 0x18400000000ull,
-    OPC_FRCPA_S1_F6           = 0x00600000000ull,
-    OPC_GETF_SIG_M19          = 0x08708000000ull,
-    OPC_LD1_M1                = 0x08000000000ull,
-    OPC_LD1_M3                = 0x0a000000000ull,
-    OPC_LD2_M1                = 0x08040000000ull,
-    OPC_LD2_M3                = 0x0a040000000ull,
-    OPC_LD4_M1                = 0x08080000000ull,
-    OPC_LD4_M3                = 0x0a080000000ull,
-    OPC_LD8_M1                = 0x080c0000000ull,
-    OPC_LD8_M3                = 0x0a0c0000000ull,
-    OPC_MF_M24                = 0x00110000000ull,
-    OPC_MUX1_I3               = 0x0eca0000000ull,
-    OPC_NOP_B9                = 0x04008000000ull,
-    OPC_NOP_F16               = 0x00008000000ull,
-    OPC_NOP_I18               = 0x00008000000ull,
-    OPC_NOP_M48               = 0x00008000000ull,
-    OPC_MOV_I21               = 0x00e00100000ull,
-    OPC_MOV_RET_I21           = 0x00e00500000ull,
-    OPC_MOV_I22               = 0x00188000000ull,
-    OPC_MOV_I_I26             = 0x00150000000ull,
-    OPC_MOVL_X2               = 0x0c000000000ull,
-    OPC_OR_A1                 = 0x10070000000ull,
-    OPC_OR_A3                 = 0x10170000000ull,
-    OPC_SETF_EXP_M18          = 0x0c748000000ull,
-    OPC_SETF_SIG_M18          = 0x0c708000000ull,
-    OPC_SHL_I7                = 0x0f240000000ull,
-    OPC_SHR_I5                = 0x0f220000000ull,
-    OPC_SHR_U_I5              = 0x0f200000000ull,
-    OPC_SHRP_I10              = 0x0ac00000000ull,
-    OPC_SXT1_I29              = 0x000a0000000ull,
-    OPC_SXT2_I29              = 0x000a8000000ull,
-    OPC_SXT4_I29              = 0x000b0000000ull,
-    OPC_ST1_M4                = 0x08c00000000ull,
-    OPC_ST2_M4                = 0x08c40000000ull,
-    OPC_ST4_M4                = 0x08c80000000ull,
-    OPC_ST8_M4                = 0x08cc0000000ull,
-    OPC_SUB_A1                = 0x10028000000ull,
-    OPC_SUB_A3                = 0x10128000000ull,
-    OPC_UNPACK4_L_I2          = 0x0f860000000ull,
-    OPC_XMA_L_F2              = 0x1d000000000ull,
-    OPC_XOR_A1                = 0x10078000000ull,
-    OPC_XOR_A3                = 0x10178000000ull,
-    OPC_ZXT1_I29              = 0x00080000000ull,
-    OPC_ZXT2_I29              = 0x00088000000ull,
-    OPC_ZXT4_I29              = 0x00090000000ull,
-
-    INSN_NOP_M                = OPC_NOP_M48,  /* nop.m 0 */
-    INSN_NOP_I                = OPC_NOP_I18,  /* nop.i 0 */
-};
-
-static inline uint64_t tcg_opc_a1(int qp, uint64_t opc, int r1,
-                                  int r2, int r3)
-{
-    return opc
-           | ((r3 & 0x7f) << 20)
-           | ((r2 & 0x7f) << 13)
-           | ((r1 & 0x7f) << 6)
-           | (qp & 0x3f);
-}
-
-static inline uint64_t tcg_opc_a3(int qp, uint64_t opc, int r1,
-                                  uint64_t imm, int r3)
-{
-    return opc
-           | ((imm & 0x80) << 29) /* s */
-           | ((imm & 0x7f) << 13) /* imm7b */
-           | ((r3 & 0x7f) << 20)
-           | ((r1 & 0x7f) << 6)
-           | (qp & 0x3f);
-}
-
-static inline uint64_t tcg_opc_a4(int qp, uint64_t opc, int r1,
-                                  uint64_t imm, int r3)
-{
-    return opc
-           | ((imm & 0x2000) << 23) /* s */
-           | ((imm & 0x1f80) << 20) /* imm6d */
-           | ((imm & 0x007f) << 13) /* imm7b */
-           | ((r3 & 0x7f) << 20)
-           | ((r1 & 0x7f) << 6)
-           | (qp & 0x3f);
-}
-
-static inline uint64_t tcg_opc_a5(int qp, uint64_t opc, int r1,
-                                  uint64_t imm, int r3)
-{
-    return opc
-           | ((imm & 0x200000) << 15) /* s */
-           | ((imm & 0x1f0000) <<  6) /* imm5c */
-           | ((imm & 0x00ff80) << 20) /* imm9d */
-           | ((imm & 0x00007f) << 13) /* imm7b */
-           | ((r3 & 0x03) << 20)
-           | ((r1 & 0x7f) << 6)
-           | (qp & 0x3f);
-}
-
-static inline uint64_t tcg_opc_a6(int qp, uint64_t opc, int p1,
-                                  int p2, int r2, int r3)
-{
-    return opc
-           | ((p2 & 0x3f) << 27)
-           | ((r3 & 0x7f) << 20)
-           | ((r2 & 0x7f) << 13)
-           | ((p1 & 0x3f) << 6)
-           | (qp & 0x3f);
-}
-
-static inline uint64_t tcg_opc_b1(int qp, uint64_t opc, uint64_t imm)
-{
-    return opc
-           | ((imm & 0x100000) << 16) /* s */
-           | ((imm & 0x0fffff) << 13) /* imm20b */
-           | (qp & 0x3f);
-}
-
-static inline uint64_t tcg_opc_b3(int qp, uint64_t opc, int b1, uint64_t imm)
-{
-    return opc
-           | ((imm & 0x100000) << 16) /* s */
-           | ((imm & 0x0fffff) << 13) /* imm20b */
-           | ((b1 & 0x7) << 6)
-           | (qp & 0x3f);
-}
-
-static inline uint64_t tcg_opc_b4(int qp, uint64_t opc, int b2)
-{
-    return opc
-           | ((b2 & 0x7) << 13)
-           | (qp & 0x3f);
-}
-
-static inline uint64_t tcg_opc_b5(int qp, uint64_t opc, int b1, int b2)
-{
-    return opc
-           | ((b2 & 0x7) << 13)
-           | ((b1 & 0x7) << 6)
-           | (qp & 0x3f);
-}
-
-
-static inline uint64_t tcg_opc_b9(int qp, uint64_t opc, uint64_t imm)
-{
-    return opc
-           | ((imm & 0x100000) << 16) /* i */
-           | ((imm & 0x0fffff) << 6)  /* imm20a */
-           | (qp & 0x3f);
-}
-
-static inline uint64_t tcg_opc_f1(int qp, uint64_t opc, int f1,
-                                  int f3, int f4, int f2)
-{
-    return opc
-           | ((f4 & 0x7f) << 27)
-           | ((f3 & 0x7f) << 20)
-           | ((f2 & 0x7f) << 13)
-           | ((f1 & 0x7f) << 6)
-           | (qp & 0x3f);
-}
-
-static inline uint64_t tcg_opc_f2(int qp, uint64_t opc, int f1,
-                                  int f3, int f4, int f2)
-{
-    return opc
-           | ((f4 & 0x7f) << 27)
-           | ((f3 & 0x7f) << 20)
-           | ((f2 & 0x7f) << 13)
-           | ((f1 & 0x7f) << 6)
-           | (qp & 0x3f);
-}
-
-static inline uint64_t tcg_opc_f6(int qp, uint64_t opc, int f1,
-                                  int p2, int f2, int f3)
-{
-    return opc
-           | ((p2 & 0x3f) << 27)
-           | ((f3 & 0x7f) << 20)
-           | ((f2 & 0x7f) << 13)
-           | ((f1 & 0x7f) << 6)
-           | (qp & 0x3f);
-}
-
-static inline uint64_t tcg_opc_f10(int qp, uint64_t opc, int f1, int f2)
-{
-    return opc
-           | ((f2 & 0x7f) << 13)
-           | ((f1 & 0x7f) << 6)
-           | (qp & 0x3f);
-}
-
-static inline uint64_t tcg_opc_f11(int qp, uint64_t opc, int f1, int f2)
-{
-    return opc
-           | ((f2 & 0x7f) << 13)
-           | ((f1 & 0x7f) << 6)
-           | (qp & 0x3f);
-}
-
-static inline uint64_t tcg_opc_f16(int qp, uint64_t opc, uint64_t imm)
-{
-    return opc
-           | ((imm & 0x100000) << 16) /* i */
-           | ((imm & 0x0fffff) << 6)  /* imm20a */
-           | (qp & 0x3f);
-}
-
-static inline uint64_t tcg_opc_i2(int qp, uint64_t opc, int r1,
-                                  int r2, int r3)
-{
-    return opc
-           | ((r3 & 0x7f) << 20)
-           | ((r2 & 0x7f) << 13)
-           | ((r1 & 0x7f) << 6)
-           | (qp & 0x3f);
-}
-
-static inline uint64_t tcg_opc_i3(int qp, uint64_t opc, int r1,
-                                  int r2, int mbtype)
-{
-    return opc
-           | ((mbtype & 0x0f) << 20)
-           | ((r2 & 0x7f) << 13)
-           | ((r1 & 0x7f) << 6)
-           | (qp & 0x3f);
-}
-
-static inline uint64_t tcg_opc_i5(int qp, uint64_t opc, int r1,
-                                  int r3, int r2)
-{
-    return opc
-           | ((r3 & 0x7f) << 20)
-           | ((r2 & 0x7f) << 13)
-           | ((r1 & 0x7f) << 6)
-           | (qp & 0x3f);
-}
-
-static inline uint64_t tcg_opc_i7(int qp, uint64_t opc, int r1,
-                                  int r2, int r3)
-{
-    return opc
-           | ((r3 & 0x7f) << 20)
-           | ((r2 & 0x7f) << 13)
-           | ((r1 & 0x7f) << 6)
-           | (qp & 0x3f);
-}
-
-static inline uint64_t tcg_opc_i10(int qp, uint64_t opc, int r1,
-                                   int r2, int r3, uint64_t count)
-{
-    return opc
-           | ((count & 0x3f) << 27)
-           | ((r3 & 0x7f) << 20)
-           | ((r2 & 0x7f) << 13)
-           | ((r1 & 0x7f) << 6)
-           | (qp & 0x3f);
-}
-
-static inline uint64_t tcg_opc_i11(int qp, uint64_t opc, int r1,
-                                   int r3, uint64_t pos, uint64_t len)
-{
-    return opc
-           | ((len & 0x3f) << 27)
-           | ((r3 & 0x7f) << 20)
-           | ((pos & 0x3f) << 14)
-           | ((r1 & 0x7f) << 6)
-           | (qp & 0x3f);
-}
-
-static inline uint64_t tcg_opc_i12(int qp, uint64_t opc, int r1,
-                                   int r2, uint64_t pos, uint64_t len)
-{
-    return opc
-           | ((len & 0x3f) << 27)
-           | ((pos & 0x3f) << 20)
-           | ((r2 & 0x7f) << 13)
-           | ((r1 & 0x7f) << 6)
-           | (qp & 0x3f);
-}
-
-static inline uint64_t tcg_opc_i14(int qp, uint64_t opc, int r1, uint64_t imm,
-                                   int r3, uint64_t pos, uint64_t len)
-{
-    return opc
-           | ((imm & 0x01) << 36)
-           | ((len & 0x3f) << 27)
-           | ((r3 & 0x7f) << 20)
-           | ((pos & 0x3f) << 14)
-           | ((r1 & 0x7f) << 6)
-           | (qp & 0x3f);
-}
-
-static inline uint64_t tcg_opc_i15(int qp, uint64_t opc, int r1, int r2,
-                                   int r3, uint64_t pos, uint64_t len)
-{
-    return opc
-           | ((pos & 0x3f) << 31)
-           | ((len & 0x0f) << 27)
-           | ((r3 & 0x7f) << 20)
-           | ((r2 & 0x7f) << 13)
-           | ((r1 & 0x7f) << 6)
-           | (qp & 0x3f);
-}
-
-static inline uint64_t tcg_opc_i18(int qp, uint64_t opc, uint64_t imm)
-{
-    return opc
-           | ((imm & 0x100000) << 16) /* i */
-           | ((imm & 0x0fffff) << 6)  /* imm20a */
-           | (qp & 0x3f);
-}
-
-static inline uint64_t tcg_opc_i21(int qp, uint64_t opc, int b1,
-                                   int r2, uint64_t imm)
-{
-    return opc
-           | ((imm & 0x1ff) << 24)
-           | ((r2 & 0x7f) << 13)
-           | ((b1 & 0x7) << 6)
-           | (qp & 0x3f);
-}
-
-static inline uint64_t tcg_opc_i22(int qp, uint64_t opc, int r1, int b2)
-{
-    return opc
-           | ((b2 & 0x7) << 13)
-           | ((r1 & 0x7f) << 6)
-           | (qp & 0x3f);
-}
-
-static inline uint64_t tcg_opc_i26(int qp, uint64_t opc, int ar3, int r2)
-{
-    return opc
-           | ((ar3 & 0x7f) << 20)
-           | ((r2 & 0x7f) << 13)
-           | (qp & 0x3f);
-}
-
-static inline uint64_t tcg_opc_i29(int qp, uint64_t opc, int r1, int r3)
-{
-    return opc
-           | ((r3 & 0x7f) << 20)
-           | ((r1 & 0x7f) << 6)
-           | (qp & 0x3f);
-}
-
-static inline uint64_t tcg_opc_l2(uint64_t imm)
-{
-    return (imm & 0x7fffffffffc00000ull) >> 22;
-}
-
-static inline uint64_t tcg_opc_l3(uint64_t imm)
-{
-    return (imm & 0x07fffffffff00000ull) >> 18;
-}
-
-#define tcg_opc_l4  tcg_opc_l3
-
-static inline uint64_t tcg_opc_m1(int qp, uint64_t opc, int r1, int r3)
-{
-    return opc
-           | ((r3 & 0x7f) << 20)
-           | ((r1 & 0x7f) << 6)
-           | (qp & 0x3f);
-}
-
-static inline uint64_t tcg_opc_m3(int qp, uint64_t opc, int r1,
-                                  int r3, uint64_t imm)
-{
-    return opc
-           | ((imm & 0x100) << 28) /* s */
-           | ((imm & 0x080) << 20) /* i */
-           | ((imm & 0x07f) << 13) /* imm7b */
-           | ((r3 & 0x7f) << 20)
-           | ((r1 & 0x7f) << 6)
-           | (qp & 0x3f);
-}
-
-static inline uint64_t tcg_opc_m4(int qp, uint64_t opc, int r2, int r3)
-{
-    return opc
-           | ((r3 & 0x7f) << 20)
-           | ((r2 & 0x7f) << 13)
-           | (qp & 0x3f);
-}
-
-static inline uint64_t tcg_opc_m18(int qp, uint64_t opc, int f1, int r2)
-{
-    return opc
-           | ((r2 & 0x7f) << 13)
-           | ((f1 & 0x7f) << 6)
-           | (qp & 0x3f);
-}
-
-static inline uint64_t tcg_opc_m19(int qp, uint64_t opc, int r1, int f2)
-{
-    return opc
-           | ((f2 & 0x7f) << 13)
-           | ((r1 & 0x7f) << 6)
-           | (qp & 0x3f);
-}
-
-static inline uint64_t tcg_opc_m34(int qp, uint64_t opc, int r1,
-                                   int sof, int sol, int sor)
-{
-    return opc
-           | ((sor & 0x0f) << 27)
-           | ((sol & 0x7f) << 20)
-           | ((sof & 0x7f) << 13)
-           | ((r1 & 0x7f) << 6)
-           | (qp & 0x3f);
-}
-
-static inline uint64_t tcg_opc_m48(int qp, uint64_t opc, uint64_t imm)
-{
-    return opc
-           | ((imm & 0x100000) << 16) /* i */
-           | ((imm & 0x0fffff) << 6)  /* imm20a */
-           | (qp & 0x3f);
-}
-
-static inline uint64_t tcg_opc_x2(int qp, uint64_t opc,
-                                  int r1, uint64_t imm)
-{
-    return opc
-           | ((imm & 0x8000000000000000ull) >> 27) /* i */
-           |  (imm & 0x0000000000200000ull)        /* ic */
-           | ((imm & 0x00000000001f0000ull) << 6)  /* imm5c */
-           | ((imm & 0x000000000000ff80ull) << 20) /* imm9d */
-           | ((imm & 0x000000000000007full) << 13) /* imm7b */
-           | ((r1 & 0x7f) << 6)
-           | (qp & 0x3f);
-}
-
-static inline uint64_t tcg_opc_x3(int qp, uint64_t opc, uint64_t imm)
-{
-    return opc
-           | ((imm & 0x0800000000000000ull) >> 23) /* i */
-           | ((imm & 0x00000000000fffffull) << 13) /* imm20b */
-           | (qp & 0x3f);
-}
-
-static inline uint64_t tcg_opc_x4(int qp, uint64_t opc, int b1, uint64_t imm)
-{
-    return opc
-           | ((imm & 0x0800000000000000ull) >> 23) /* i */
-           | ((imm & 0x00000000000fffffull) << 13) /* imm20b */
-           | ((b1 & 0x7) << 6)
-           | (qp & 0x3f);
-}
-
-
-/*
- * Relocations - Note that we never encode branches elsewhere than slot 2.
- */
-
-static void reloc_pcrel21b_slot2(tcg_insn_unit *pc, tcg_insn_unit *target)
-{
-    uint64_t imm = target - pc;
-
-    pc->hi = (pc->hi & 0xf700000fffffffffull)
-             | ((imm & 0x100000) << 39)  /* s */
-             | ((imm & 0x0fffff) << 36); /* imm20b */
-}
-
-static uint64_t get_reloc_pcrel21b_slot2(tcg_insn_unit *pc)
-{
-    int64_t high = pc->hi;
-
-    return ((high >> 39) & 0x100000) + /* s */
-           ((high >> 36) & 0x0fffff);  /* imm20b */
-}
-
-static void patch_reloc(tcg_insn_unit *code_ptr, int type,
-                        intptr_t value, intptr_t addend)
-{
-    tcg_debug_assert(addend == 0);
-    tcg_debug_assert(type == R_IA64_PCREL21B);
-    reloc_pcrel21b_slot2(code_ptr, (tcg_insn_unit *)value);
-}
-
-/*
- * Constraints
- */
-
-/* parse target specific constraints */
-static const char *target_parse_constraint(TCGArgConstraint *ct,
-                                           const char *ct_str, TCGType type)
-{
-    switch(*ct_str++) {
-    case 'r':
-        ct->ct |= TCG_CT_REG;
-        tcg_regset_set(ct->u.regs, 0xffffffffffffffffull);
-        break;
-    case 'I':
-        ct->ct |= TCG_CT_CONST_S22;
-        break;
-    case 'S':
-        ct->ct |= TCG_CT_REG;
-        tcg_regset_set(ct->u.regs, 0xffffffffffffffffull);
-#if defined(CONFIG_SOFTMMU)
-        tcg_regset_reset_reg(ct->u.regs, TCG_REG_R56);
-        tcg_regset_reset_reg(ct->u.regs, TCG_REG_R57);
-        tcg_regset_reset_reg(ct->u.regs, TCG_REG_R58);
-#endif
-        break;
-    case 'Z':
-        /* We are cheating a bit here, using the fact that the register
-           r0 is also the register number 0. Hence there is no need
-           to check for const_args in each instruction. */
-        ct->ct |= TCG_CT_CONST_ZERO;
-        break;
-    default:
-        return NULL;
-    }
-    return ct_str;
-}
-
-/* test if a constant matches the constraint */
-static inline int tcg_target_const_match(tcg_target_long val, TCGType type,
-                                         const TCGArgConstraint *arg_ct)
-{
-    int ct;
-    ct = arg_ct->ct;
-    if (ct & TCG_CT_CONST)
-        return 1;
-    else if ((ct & TCG_CT_CONST_ZERO) && val == 0)
-        return 1;
-    else if ((ct & TCG_CT_CONST_S22) && val == ((int32_t)val << 10) >> 10)
-        return 1;
-    else
-        return 0;
-}
-
-/*
- * Code generation
- */
-
-static tcg_insn_unit *tb_ret_addr;
-
-static inline void tcg_out_bundle(TCGContext *s, int template,
-                                  uint64_t slot0, uint64_t slot1,
-                                  uint64_t slot2)
-{
-    template &= 0x1f;          /* 5 bits */
-    slot0 &= 0x1ffffffffffull; /* 41 bits */
-    slot1 &= 0x1ffffffffffull; /* 41 bits */
-    slot2 &= 0x1ffffffffffull; /* 41 bits */
-
-    *s->code_ptr++ = (tcg_insn_unit){
-        (slot1 << 46) | (slot0 << 5) | template,
-        (slot2 << 23) | (slot1 >> 18)
-    };
-}
-
-static inline uint64_t tcg_opc_mov_a(int qp, TCGReg dst, TCGReg src)
-{
-    return tcg_opc_a4(qp, OPC_ADDS_A4, dst, 0, src);
-}
-
-static inline void tcg_out_mov(TCGContext *s, TCGType type,
-                               TCGReg ret, TCGReg arg)
-{
-    tcg_out_bundle(s, mmI,
-                   INSN_NOP_M,
-                   INSN_NOP_M,
-                   tcg_opc_mov_a(TCG_REG_P0, ret, arg));
-}
-
-static inline uint64_t tcg_opc_movi_a(int qp, TCGReg dst, int64_t src)
-{
-    tcg_debug_assert(src == sextract64(src, 0, 22));
-    return tcg_opc_a5(qp, OPC_ADDL_A5, dst, src, TCG_REG_R0);
-}
-
-static inline void tcg_out_movi(TCGContext *s, TCGType type,
-                                TCGReg reg, tcg_target_long arg)
-{
-    tcg_out_bundle(s, mLX,
-                   INSN_NOP_M,
-                   tcg_opc_l2 (arg),
-                   tcg_opc_x2 (TCG_REG_P0, OPC_MOVL_X2, reg, arg));
-}
-
-static void tcg_out_br(TCGContext *s, TCGLabel *l)
-{
-    uint64_t imm;
-
-    /* We pay attention here to not modify the branch target by reading
-       the existing value and using it again. This ensure that caches and
-       memory are kept coherent during retranslation. */
-    if (l->has_value) {
-        imm = l->u.value_ptr -  s->code_ptr;
-    } else {
-        imm = get_reloc_pcrel21b_slot2(s->code_ptr);
-        tcg_out_reloc(s, s->code_ptr, R_IA64_PCREL21B, l, 0);
-    }
-
-    tcg_out_bundle(s, mmB,
-                   INSN_NOP_M,
-                   INSN_NOP_M,
-                   tcg_opc_b1(TCG_REG_P0, OPC_BR_SPTK_MANY_B1, imm));
-}
-
-static inline void tcg_out_call(TCGContext *s, tcg_insn_unit *desc)
-{
-    uintptr_t func = desc->lo, gp = desc->hi, disp;
-
-    /* Look through the function descriptor.  */
-    tcg_out_bundle(s, mlx,
-                   INSN_NOP_M,
-                   tcg_opc_l2 (gp),
-                   tcg_opc_x2 (TCG_REG_P0, OPC_MOVL_X2, TCG_REG_R1, gp));
-    disp = (tcg_insn_unit *)func - s->code_ptr;
-    tcg_out_bundle(s, mLX,
-                   INSN_NOP_M,
-                   tcg_opc_l4 (disp),
-                   tcg_opc_x4 (TCG_REG_P0, OPC_BRL_CALL_SPTK_MANY_X4,
-                               TCG_REG_B0, disp));
-}
-
-static void tcg_out_exit_tb(TCGContext *s, tcg_target_long arg)
-{
-    uint64_t imm, opc1;
-
-    /* At least arg == 0 is a common operation.  */
-    if (arg == sextract64(arg, 0, 22)) {
-        opc1 = tcg_opc_movi_a(TCG_REG_P0, TCG_REG_R8, arg);
-    } else {
-        tcg_out_movi(s, TCG_TYPE_PTR, TCG_REG_R8, arg);
-        opc1 = INSN_NOP_M;
-    }
-
-    imm = tb_ret_addr - s->code_ptr;
-
-    tcg_out_bundle(s, mLX,
-                   opc1,
-                   tcg_opc_l3 (imm),
-                   tcg_opc_x3 (TCG_REG_P0, OPC_BRL_SPTK_MANY_X3, imm));
-}
-
-static inline void tcg_out_goto_tb(TCGContext *s, TCGArg arg)
-{
-    if (s->tb_jmp_insn_offset) {
-        /* direct jump method */
-        tcg_abort();
-    } else {
-        /* indirect jump method */
-        tcg_out_movi(s, TCG_TYPE_PTR, TCG_REG_R2,
-                     (tcg_target_long)(s->tb_jmp_target_addr + arg));
-        tcg_out_bundle(s, MmI,
-                       tcg_opc_m1 (TCG_REG_P0, OPC_LD8_M1,
-                                   TCG_REG_R2, TCG_REG_R2),
-                       INSN_NOP_M,
-                       tcg_opc_i21(TCG_REG_P0, OPC_MOV_I21, TCG_REG_B6,
-                                   TCG_REG_R2, 0));
-        tcg_out_bundle(s, mmB,
-                       INSN_NOP_M,
-                       INSN_NOP_M,
-                       tcg_opc_b4 (TCG_REG_P0, OPC_BR_SPTK_MANY_B4,
-                                   TCG_REG_B6));
-    }
-    s->tb_jmp_reset_offset[arg] = tcg_current_code_size(s);
-}
-
-static inline void tcg_out_jmp(TCGContext *s, TCGArg addr)
-{
-    tcg_out_bundle(s, mmI,
-                   INSN_NOP_M,
-                   INSN_NOP_M,
-                   tcg_opc_i21(TCG_REG_P0, OPC_MOV_I21, TCG_REG_B6, addr, 0));
-    tcg_out_bundle(s, mmB,
-                   INSN_NOP_M,
-                   INSN_NOP_M,
-                   tcg_opc_b4(TCG_REG_P0, OPC_BR_SPTK_MANY_B4, TCG_REG_B6));
-}
-
-static inline void tcg_out_ld_rel(TCGContext *s, uint64_t opc_m4, TCGArg arg,
-                                  TCGArg arg1, tcg_target_long arg2)
-{
-    if (arg2 == ((int16_t)arg2 >> 2) << 2) {
-        tcg_out_bundle(s, MmI,
-                       tcg_opc_a4(TCG_REG_P0, OPC_ADDS_A4,
-                                  TCG_REG_R2, arg2, arg1),
-                       tcg_opc_m1 (TCG_REG_P0, opc_m4, arg, TCG_REG_R2),
-                       INSN_NOP_I);
-    } else {
-        tcg_out_movi(s, TCG_TYPE_PTR, TCG_REG_R2, arg2);
-        tcg_out_bundle(s, MmI,
-                       tcg_opc_a1 (TCG_REG_P0, OPC_ADD_A1,
-                                   TCG_REG_R2, TCG_REG_R2, arg1),
-                       tcg_opc_m1 (TCG_REG_P0, opc_m4, arg, TCG_REG_R2),
-                       INSN_NOP_I);
-    }
-}
-
-static inline void tcg_out_st_rel(TCGContext *s, uint64_t opc_m4, TCGArg arg,
-                                  TCGArg arg1, tcg_target_long arg2)
-{
-    if (arg2 == ((int16_t)arg2 >> 2) << 2) {
-        tcg_out_bundle(s, MmI,
-                       tcg_opc_a4(TCG_REG_P0, OPC_ADDS_A4,
-                                  TCG_REG_R2, arg2, arg1),
-                       tcg_opc_m4 (TCG_REG_P0, opc_m4, arg, TCG_REG_R2),
-                       INSN_NOP_I);
-    } else {
-        tcg_out_movi(s, TCG_TYPE_PTR, TCG_REG_R2, arg2);
-        tcg_out_bundle(s, MmI,
-                       tcg_opc_a1 (TCG_REG_P0, OPC_ADD_A1,
-                                   TCG_REG_R2, TCG_REG_R2, arg1),
-                       tcg_opc_m4 (TCG_REG_P0, opc_m4, arg, TCG_REG_R2),
-                       INSN_NOP_I);
-    }
-}
-
-static inline void tcg_out_ld(TCGContext *s, TCGType type, TCGReg arg,
-                              TCGReg arg1, intptr_t arg2)
-{
-    if (type == TCG_TYPE_I32) {
-        tcg_out_ld_rel(s, OPC_LD4_M1, arg, arg1, arg2);
-    } else {
-        tcg_out_ld_rel(s, OPC_LD8_M1, arg, arg1, arg2);
-    }
-}
-
-static inline void tcg_out_st(TCGContext *s, TCGType type, TCGReg arg,
-                              TCGReg arg1, intptr_t arg2)
-{
-    if (type == TCG_TYPE_I32) {
-        tcg_out_st_rel(s, OPC_ST4_M4, arg, arg1, arg2);
-    } else {
-        tcg_out_st_rel(s, OPC_ST8_M4, arg, arg1, arg2);
-    }
-}
-
-static inline bool tcg_out_sti(TCGContext *s, TCGType type, TCGArg val,
-                               TCGReg base, intptr_t ofs)
-{
-    if (val == 0) {
-        tcg_out_st(s, type, TCG_REG_R0, base, ofs);
-        return true;
-    }
-    return false;
-}
-
-static inline void tcg_out_alu(TCGContext *s, uint64_t opc_a1, uint64_t opc_a3,
-                               TCGReg ret, TCGArg arg1, int const_arg1,
-                               TCGArg arg2, int const_arg2)
-{
-    uint64_t opc1 = 0, opc2 = 0, opc3 = 0;
-
-    if (const_arg2 && arg2 != 0) {
-        opc2 = tcg_opc_movi_a(TCG_REG_P0, TCG_REG_R3, arg2);
-        arg2 = TCG_REG_R3;
-    }
-    if (const_arg1 && arg1 != 0) {
-        if (opc_a3 && arg1 == (int8_t)arg1) {
-            opc3 = tcg_opc_a3(TCG_REG_P0, opc_a3, ret, arg1, arg2);
-        } else {
-            opc1 = tcg_opc_movi_a(TCG_REG_P0, TCG_REG_R2, arg1);
-            arg1 = TCG_REG_R2;
-        }
-    }
-    if (opc3 == 0) {
-        opc3 = tcg_opc_a1(TCG_REG_P0, opc_a1, ret, arg1, arg2);
-    }
-
-    tcg_out_bundle(s, (opc1 || opc2 ? mII : miI),
-                   opc1 ? opc1 : INSN_NOP_M,
-                   opc2 ? opc2 : INSN_NOP_I,
-                   opc3);
-}
-
-static inline void tcg_out_add(TCGContext *s, TCGReg ret, TCGReg arg1,
-                               TCGArg arg2, int const_arg2)
-{
-    if (const_arg2 && arg2 == sextract64(arg2, 0, 14)) {
-        tcg_out_bundle(s, mmI,
-                       INSN_NOP_M,
-                       INSN_NOP_M,
-                       tcg_opc_a4(TCG_REG_P0, OPC_ADDS_A4, ret, arg2, arg1));
-    } else {
-        tcg_out_alu(s, OPC_ADD_A1, 0, ret, arg1, 0, arg2, const_arg2);
-    }
-}
-
-static inline void tcg_out_sub(TCGContext *s, TCGReg ret, TCGArg arg1,
-                               int const_arg1, TCGArg arg2, int const_arg2)
-{
-    if (!const_arg1 && const_arg2 && -arg2 == sextract64(-arg2, 0, 14)) {
-        tcg_out_bundle(s, mmI,
-                       INSN_NOP_M,
-                       INSN_NOP_M,
-                       tcg_opc_a4(TCG_REG_P0, OPC_ADDS_A4, ret, -arg2, arg1));
-    } else {
-        tcg_out_alu(s, OPC_SUB_A1, OPC_SUB_A3, ret,
-                    arg1, const_arg1, arg2, const_arg2);
-    }
-}
-
-static inline void tcg_out_eqv(TCGContext *s, TCGArg ret,
-                               TCGArg arg1, int const_arg1,
-                               TCGArg arg2, int const_arg2)
-{
-    tcg_out_bundle(s, mII,
-                   INSN_NOP_M,
-                   tcg_opc_a1 (TCG_REG_P0, OPC_XOR_A1, ret, arg1, arg2),
-                   tcg_opc_a3 (TCG_REG_P0, OPC_ANDCM_A3, ret, -1, ret));
-}
-
-static inline void tcg_out_nand(TCGContext *s, TCGArg ret,
-                                TCGArg arg1, int const_arg1,
-                                TCGArg arg2, int const_arg2)
-{
-    tcg_out_bundle(s, mII,
-                   INSN_NOP_M,
-                   tcg_opc_a1 (TCG_REG_P0, OPC_AND_A1, ret, arg1, arg2),
-                   tcg_opc_a3 (TCG_REG_P0, OPC_ANDCM_A3, ret, -1, ret));
-}
-
-static inline void tcg_out_nor(TCGContext *s, TCGArg ret,
-                               TCGArg arg1, int const_arg1,
-                               TCGArg arg2, int const_arg2)
-{
-    tcg_out_bundle(s, mII,
-                   INSN_NOP_M,
-                   tcg_opc_a1 (TCG_REG_P0, OPC_OR_A1, ret, arg1, arg2),
-                   tcg_opc_a3 (TCG_REG_P0, OPC_ANDCM_A3, ret, -1, ret));
-}
-
-static inline void tcg_out_orc(TCGContext *s, TCGArg ret,
-                               TCGArg arg1, int const_arg1,
-                               TCGArg arg2, int const_arg2)
-{
-    tcg_out_bundle(s, mII,
-                   INSN_NOP_M,
-                   tcg_opc_a3 (TCG_REG_P0, OPC_ANDCM_A3, TCG_REG_R2, -1, arg2),
-                   tcg_opc_a1 (TCG_REG_P0, OPC_OR_A1, ret, arg1, TCG_REG_R2));
-}
-
-static inline void tcg_out_mul(TCGContext *s, TCGArg ret,
-                               TCGArg arg1, TCGArg arg2)
-{
-    tcg_out_bundle(s, mmI,
-                   tcg_opc_m18(TCG_REG_P0, OPC_SETF_SIG_M18, TCG_REG_F6, arg1),
-                   tcg_opc_m18(TCG_REG_P0, OPC_SETF_SIG_M18, TCG_REG_F7, arg2),
-                   INSN_NOP_I);
-    tcg_out_bundle(s, mmF,
-                   INSN_NOP_M,
-                   INSN_NOP_M,
-                   tcg_opc_f2 (TCG_REG_P0, OPC_XMA_L_F2, TCG_REG_F6, TCG_REG_F6,
-                               TCG_REG_F7, TCG_REG_F0));
-    tcg_out_bundle(s, miI,
-                   tcg_opc_m19(TCG_REG_P0, OPC_GETF_SIG_M19, ret, TCG_REG_F6),
-                   INSN_NOP_I,
-                   INSN_NOP_I);
-}
-
-static inline void tcg_out_sar_i32(TCGContext *s, TCGArg ret, TCGArg arg1,
-                                   TCGArg arg2, int const_arg2)
-{
-    if (const_arg2) {
-        tcg_out_bundle(s, miI,
-                       INSN_NOP_M,
-                       INSN_NOP_I,
-                       tcg_opc_i11(TCG_REG_P0, OPC_EXTR_I11,
-                                   ret, arg1, arg2, 31 - arg2));
-    } else {
-        tcg_out_bundle(s, mII,
-                       tcg_opc_a3 (TCG_REG_P0, OPC_AND_A3,
-                                   TCG_REG_R3, 0x1f, arg2),
-                       tcg_opc_i29(TCG_REG_P0, OPC_SXT4_I29, TCG_REG_R2, arg1),
-                       tcg_opc_i5 (TCG_REG_P0, OPC_SHR_I5, ret,
-                                   TCG_REG_R2, TCG_REG_R3));
-    }
-}
-
-static inline void tcg_out_sar_i64(TCGContext *s, TCGArg ret, TCGArg arg1,
-                                   TCGArg arg2, int const_arg2)
-{
-    if (const_arg2) {
-        tcg_out_bundle(s, miI,
-                       INSN_NOP_M,
-                       INSN_NOP_I,
-                       tcg_opc_i11(TCG_REG_P0, OPC_EXTR_I11,
-                                   ret, arg1, arg2, 63 - arg2));
-    } else {
-        tcg_out_bundle(s, miI,
-                       INSN_NOP_M,
-                       INSN_NOP_I,
-                       tcg_opc_i5 (TCG_REG_P0, OPC_SHR_I5, ret, arg1, arg2));
-    }
-}
-
-static inline void tcg_out_shl_i32(TCGContext *s, TCGArg ret, TCGArg arg1,
-                                   TCGArg arg2, int const_arg2)
-{
-    if (const_arg2) {
-        tcg_out_bundle(s, miI,
-                       INSN_NOP_M,
-                       INSN_NOP_I,
-                       tcg_opc_i12(TCG_REG_P0, OPC_DEP_Z_I12, ret,
-                                   arg1, 63 - arg2, 31 - arg2));
-    } else {
-        tcg_out_bundle(s, mII,
-                       INSN_NOP_M,
-                       tcg_opc_a3 (TCG_REG_P0, OPC_AND_A3, TCG_REG_R2,
-                                   0x1f, arg2),
-                       tcg_opc_i7 (TCG_REG_P0, OPC_SHL_I7, ret,
-                                   arg1, TCG_REG_R2));
-    }
-}
-
-static inline void tcg_out_shl_i64(TCGContext *s, TCGArg ret, TCGArg arg1,
-                                   TCGArg arg2, int const_arg2)
-{
-    if (const_arg2) {
-        tcg_out_bundle(s, miI,
-                       INSN_NOP_M,
-                       INSN_NOP_I,
-                       tcg_opc_i12(TCG_REG_P0, OPC_DEP_Z_I12, ret,
-                                   arg1, 63 - arg2, 63 - arg2));
-    } else {
-        tcg_out_bundle(s, miI,
-                       INSN_NOP_M,
-                       INSN_NOP_I,
-                       tcg_opc_i7 (TCG_REG_P0, OPC_SHL_I7, ret,
-                                   arg1, arg2));
-    }
-}
-
-static inline void tcg_out_shr_i32(TCGContext *s, TCGArg ret, TCGArg arg1,
-                                   TCGArg arg2, int const_arg2)
-{
-    if (const_arg2) {
-        tcg_out_bundle(s, miI,
-                       INSN_NOP_M,
-                       INSN_NOP_I,
-                       tcg_opc_i11(TCG_REG_P0, OPC_EXTR_U_I11, ret,
-                                   arg1, arg2, 31 - arg2));
-    } else {
-        tcg_out_bundle(s, mII,
-                       tcg_opc_a3 (TCG_REG_P0, OPC_AND_A3, TCG_REG_R3,
-                                   0x1f, arg2),
-                       tcg_opc_i29(TCG_REG_P0, OPC_ZXT4_I29, TCG_REG_R2, arg1),
-                       tcg_opc_i5 (TCG_REG_P0, OPC_SHR_U_I5, ret,
-                                   TCG_REG_R2, TCG_REG_R3));
-    }
-}
-
-static inline void tcg_out_shr_i64(TCGContext *s, TCGArg ret, TCGArg arg1,
-                                   TCGArg arg2, int const_arg2)
-{
-    if (const_arg2) {
-        tcg_out_bundle(s, miI,
-                       INSN_NOP_M,
-                       INSN_NOP_I,
-                       tcg_opc_i11(TCG_REG_P0, OPC_EXTR_U_I11, ret,
-                                   arg1, arg2, 63 - arg2));
-    } else {
-        tcg_out_bundle(s, miI,
-                       INSN_NOP_M,
-                       INSN_NOP_I,
-                       tcg_opc_i5 (TCG_REG_P0, OPC_SHR_U_I5, ret,
-                                   arg1, arg2));
-    }
-}
-
-static inline void tcg_out_rotl_i32(TCGContext *s, TCGArg ret, TCGArg arg1,
-                                    TCGArg arg2, int const_arg2)
-{
-    if (const_arg2) {
-        tcg_out_bundle(s, mII,
-                       INSN_NOP_M,
-                       tcg_opc_i2 (TCG_REG_P0, OPC_UNPACK4_L_I2,
-                                   TCG_REG_R2, arg1, arg1),
-                       tcg_opc_i11(TCG_REG_P0, OPC_EXTR_U_I11, ret,
-                                   TCG_REG_R2, 32 - arg2, 31));
-    } else {
-        tcg_out_bundle(s, miI,
-                       INSN_NOP_M,
-                       tcg_opc_i2 (TCG_REG_P0, OPC_UNPACK4_L_I2,
-                                   TCG_REG_R2, arg1, arg1),
-                       tcg_opc_a3 (TCG_REG_P0, OPC_AND_A3, TCG_REG_R3,
-                                   0x1f, arg2));
-        tcg_out_bundle(s, mII,
-                       INSN_NOP_M,
-                       tcg_opc_a3 (TCG_REG_P0, OPC_SUB_A3, TCG_REG_R3,
-                                   0x20, TCG_REG_R3),
-                       tcg_opc_i5 (TCG_REG_P0, OPC_SHR_U_I5, ret,
-                                   TCG_REG_R2, TCG_REG_R3));
-    }
-}
-
-static inline void tcg_out_rotl_i64(TCGContext *s, TCGArg ret, TCGArg arg1,
-                                    TCGArg arg2, int const_arg2)
-{
-    if (const_arg2) {
-        tcg_out_bundle(s, miI,
-                       INSN_NOP_M,
-                       INSN_NOP_I,
-                       tcg_opc_i10(TCG_REG_P0, OPC_SHRP_I10, ret, arg1,
-                                   arg1, 0x40 - arg2));
-    } else {
-        tcg_out_bundle(s, mII,
-                       tcg_opc_a3 (TCG_REG_P0, OPC_SUB_A3, TCG_REG_R2,
-                                   0x40, arg2),
-                       tcg_opc_i7 (TCG_REG_P0, OPC_SHL_I7, TCG_REG_R3,
-                                   arg1, arg2),
-                       tcg_opc_i5 (TCG_REG_P0, OPC_SHR_U_I5, TCG_REG_R2,
-                                   arg1, TCG_REG_R2));
-        tcg_out_bundle(s, miI,
-                       INSN_NOP_M,
-                       INSN_NOP_I,
-                       tcg_opc_a1 (TCG_REG_P0, OPC_OR_A1, ret,
-                                   TCG_REG_R2, TCG_REG_R3));
-    }
-}
-
-static inline void tcg_out_rotr_i32(TCGContext *s, TCGArg ret, TCGArg arg1,
-                                    TCGArg arg2, int const_arg2)
-{
-    if (const_arg2) {
-        tcg_out_bundle(s, mII,
-                       INSN_NOP_M,
-                       tcg_opc_i2 (TCG_REG_P0, OPC_UNPACK4_L_I2,
-                                   TCG_REG_R2, arg1, arg1),
-                       tcg_opc_i11(TCG_REG_P0, OPC_EXTR_U_I11, ret,
-                                   TCG_REG_R2, arg2, 31));
-    } else {
-        tcg_out_bundle(s, mII,
-                       tcg_opc_a3 (TCG_REG_P0, OPC_AND_A3, TCG_REG_R3,
-                                   0x1f, arg2),
-                       tcg_opc_i2 (TCG_REG_P0, OPC_UNPACK4_L_I2,
-                                   TCG_REG_R2, arg1, arg1),
-                       tcg_opc_i5 (TCG_REG_P0, OPC_SHR_U_I5, ret,
-                                   TCG_REG_R2, TCG_REG_R3));
-    }
-}
-
-static inline void tcg_out_rotr_i64(TCGContext *s, TCGArg ret, TCGArg arg1,
-                                    TCGArg arg2, int const_arg2)
-{
-    if (const_arg2) {
-        tcg_out_bundle(s, miI,
-                       INSN_NOP_M,
-                       INSN_NOP_I,
-                       tcg_opc_i10(TCG_REG_P0, OPC_SHRP_I10, ret, arg1,
-                                   arg1, arg2));
-    } else {
-        tcg_out_bundle(s, mII,
-                       tcg_opc_a3 (TCG_REG_P0, OPC_SUB_A3, TCG_REG_R2,
-                                   0x40, arg2),
-                       tcg_opc_i5 (TCG_REG_P0, OPC_SHR_U_I5, TCG_REG_R3,
-                                   arg1, arg2),
-                       tcg_opc_i7 (TCG_REG_P0, OPC_SHL_I7, TCG_REG_R2,
-                                   arg1, TCG_REG_R2));
-        tcg_out_bundle(s, miI,
-                       INSN_NOP_M,
-                       INSN_NOP_I,
-                       tcg_opc_a1 (TCG_REG_P0, OPC_OR_A1, ret,
-                                   TCG_REG_R2, TCG_REG_R3));
-    }
-}
-
-static const uint64_t opc_ext_i29[8] = {
-    OPC_ZXT1_I29, OPC_ZXT2_I29, OPC_ZXT4_I29, 0,
-    OPC_SXT1_I29, OPC_SXT2_I29, OPC_SXT4_I29, 0
-};
-
-static inline uint64_t tcg_opc_ext_i(int qp, TCGMemOp opc, TCGReg d, TCGReg s)
-{
-    if ((opc & MO_SIZE) == MO_64) {
-        return tcg_opc_mov_a(qp, d, s);
-    } else {
-        return tcg_opc_i29(qp, opc_ext_i29[opc & MO_SSIZE], d, s);
-    }
-}
-
-static inline void tcg_out_ext(TCGContext *s, uint64_t opc_i29,
-                               TCGArg ret, TCGArg arg)
-{
-    tcg_out_bundle(s, miI,
-                   INSN_NOP_M,
-                   INSN_NOP_I,
-                   tcg_opc_i29(TCG_REG_P0, opc_i29, ret, arg));
-}
-
-static inline uint64_t tcg_opc_bswap64_i(int qp, TCGReg d, TCGReg s)
-{
-    return tcg_opc_i3(qp, OPC_MUX1_I3, d, s, 0xb);
-}
-
-static inline void tcg_out_bswap16(TCGContext *s, TCGArg ret, TCGArg arg)
-{
-    tcg_out_bundle(s, mII,
-                   INSN_NOP_M,
-                   tcg_opc_i12(TCG_REG_P0, OPC_DEP_Z_I12, ret, arg, 15, 15),
-                   tcg_opc_bswap64_i(TCG_REG_P0, ret, ret));
-}
-
-static inline void tcg_out_bswap32(TCGContext *s, TCGArg ret, TCGArg arg)
-{
-    tcg_out_bundle(s, mII,
-                   INSN_NOP_M,
-                   tcg_opc_i12(TCG_REG_P0, OPC_DEP_Z_I12, ret, arg, 31, 31),
-                   tcg_opc_bswap64_i(TCG_REG_P0, ret, ret));
-}
-
-static inline void tcg_out_bswap64(TCGContext *s, TCGArg ret, TCGArg arg)
-{
-    tcg_out_bundle(s, miI,
-                   INSN_NOP_M,
-                   INSN_NOP_I,
-                   tcg_opc_bswap64_i(TCG_REG_P0, ret, arg));
-}
-
-static inline void tcg_out_deposit(TCGContext *s, TCGArg ret, TCGArg a1,
-                                   TCGArg a2, int const_a2, int pos, int len)
-{
-    uint64_t i1 = 0, i2 = 0;
-    int cpos = 63 - pos, lm1 = len - 1;
-
-    if (const_a2) {
-        /* Truncate the value of a constant a2 to the width of the field.  */
-        int mask = (1u << len) - 1;
-        a2 &= mask;
-
-        if (a2 == 0 || a2 == mask) {
-            /* 1-bit signed constant inserted into register.  */
-            i2 = tcg_opc_i14(TCG_REG_P0, OPC_DEP_I14, ret, a2, a1, cpos, lm1);
-        } else {
-            /* Otherwise, load any constant into a temporary.  Do this into
-               the first I slot to help out with cross-unit delays.  */
-            i1 = tcg_opc_movi_a(TCG_REG_P0, TCG_REG_R2, a2);
-            a2 = TCG_REG_R2;
-        }
-    }
-    if (i2 == 0) {
-        i2 = tcg_opc_i15(TCG_REG_P0, OPC_DEP_I15, ret, a2, a1, cpos, lm1);
-    }
-    tcg_out_bundle(s, (i1 ? mII : miI),
-                   INSN_NOP_M,
-                   i1 ? i1 : INSN_NOP_I,
-                   i2);
-}
-
-static inline uint64_t tcg_opc_cmp_a(int qp, TCGCond cond, TCGArg arg1,
-                                     TCGArg arg2, int cmp4)
-{
-    uint64_t opc_eq_a6, opc_lt_a6, opc_ltu_a6;
-
-    if (cmp4) {
-        opc_eq_a6 = OPC_CMP4_EQ_A6;
-        opc_lt_a6 = OPC_CMP4_LT_A6;
-        opc_ltu_a6 = OPC_CMP4_LTU_A6;
-    } else {
-        opc_eq_a6 = OPC_CMP_EQ_A6;
-        opc_lt_a6 = OPC_CMP_LT_A6;
-        opc_ltu_a6 = OPC_CMP_LTU_A6;
-    }
-
-    switch (cond) {
-    case TCG_COND_EQ:
-        return tcg_opc_a6 (qp, opc_eq_a6,  TCG_REG_P6, TCG_REG_P7, arg1, arg2);
-    case TCG_COND_NE:
-        return tcg_opc_a6 (qp, opc_eq_a6,  TCG_REG_P7, TCG_REG_P6, arg1, arg2);
-    case TCG_COND_LT:
-        return tcg_opc_a6 (qp, opc_lt_a6,  TCG_REG_P6, TCG_REG_P7, arg1, arg2);
-    case TCG_COND_LTU:
-        return tcg_opc_a6 (qp, opc_ltu_a6, TCG_REG_P6, TCG_REG_P7, arg1, arg2);
-    case TCG_COND_GE:
-        return tcg_opc_a6 (qp, opc_lt_a6,  TCG_REG_P7, TCG_REG_P6, arg1, arg2);
-    case TCG_COND_GEU:
-        return tcg_opc_a6 (qp, opc_ltu_a6, TCG_REG_P7, TCG_REG_P6, arg1, arg2);
-    case TCG_COND_LE:
-        return tcg_opc_a6 (qp, opc_lt_a6,  TCG_REG_P7, TCG_REG_P6, arg2, arg1);
-    case TCG_COND_LEU:
-        return tcg_opc_a6 (qp, opc_ltu_a6, TCG_REG_P7, TCG_REG_P6, arg2, arg1);
-    case TCG_COND_GT:
-        return tcg_opc_a6 (qp, opc_lt_a6,  TCG_REG_P6, TCG_REG_P7, arg2, arg1);
-    case TCG_COND_GTU:
-        return tcg_opc_a6 (qp, opc_ltu_a6, TCG_REG_P6, TCG_REG_P7, arg2, arg1);
-    default:
-        tcg_abort();
-        break;
-    }
-}
-
-static inline void tcg_out_brcond(TCGContext *s, TCGCond cond, TCGReg arg1,
-                                  TCGReg arg2, TCGLabel *l, int cmp4)
-{
-    uint64_t imm;
-
-    /* We pay attention here to not modify the branch target by reading
-       the existing value and using it again. This ensure that caches and
-       memory are kept coherent during retranslation. */
-    if (l->has_value) {
-        imm = l->u.value_ptr - s->code_ptr;
-    } else {
-        imm = get_reloc_pcrel21b_slot2(s->code_ptr);
-        tcg_out_reloc(s, s->code_ptr, R_IA64_PCREL21B, l, 0);
-    }
-
-    tcg_out_bundle(s, miB,
-                   INSN_NOP_M,
-                   tcg_opc_cmp_a(TCG_REG_P0, cond, arg1, arg2, cmp4),
-                   tcg_opc_b1(TCG_REG_P6, OPC_BR_DPTK_FEW_B1, imm));
-}
-
-static inline void tcg_out_setcond(TCGContext *s, TCGCond cond, TCGArg ret,
-                                   TCGArg arg1, TCGArg arg2, int cmp4)
-{
-    tcg_out_bundle(s, MmI,
-                   tcg_opc_cmp_a(TCG_REG_P0, cond, arg1, arg2, cmp4),
-                   tcg_opc_movi_a(TCG_REG_P6, ret, 1),
-                   tcg_opc_movi_a(TCG_REG_P7, ret, 0));
-}
-
-static inline void tcg_out_movcond(TCGContext *s, TCGCond cond, TCGArg ret,
-                                   TCGArg c1, TCGArg c2,
-                                   TCGArg v1, int const_v1,
-                                   TCGArg v2, int const_v2, int cmp4)
-{
-    uint64_t opc1, opc2;
-
-    if (const_v1) {
-        opc1 = tcg_opc_movi_a(TCG_REG_P6, ret, v1);
-    } else if (ret == v1) {
-        opc1 = INSN_NOP_M;
-    } else {
-        opc1 = tcg_opc_mov_a(TCG_REG_P6, ret, v1);
-    }
-    if (const_v2) {
-        opc2 = tcg_opc_movi_a(TCG_REG_P7, ret, v2);
-    } else if (ret == v2) {
-        opc2 = INSN_NOP_I;
-    } else {
-        opc2 = tcg_opc_mov_a(TCG_REG_P7, ret, v2);
-    }
-
-    tcg_out_bundle(s, MmI,
-                   tcg_opc_cmp_a(TCG_REG_P0, cond, c1, c2, cmp4),
-                   opc1,
-                   opc2);
-}
-
-#if defined(CONFIG_SOFTMMU)
-/* We're expecting to use an signed 22-bit immediate add.  */
-QEMU_BUILD_BUG_ON(offsetof(CPUArchState, tlb_table[NB_MMU_MODES - 1][1])
-                  > 0x1fffff)
-
-/* Load and compare a TLB entry, and return the result in (p6, p7).
-   R2 is loaded with the addend TLB entry.
-   R57 is loaded with the address, zero extented on 32-bit targets.
-   R1, R3 are clobbered, leaving R56 free for...
-   BSWAP_1, BSWAP_2 and I-slot insns for swapping data for store.  */
-static inline void tcg_out_qemu_tlb(TCGContext *s, TCGReg addr_reg,
-                                    TCGMemOp opc, int off_rw, int off_add,
-                                    uint64_t bswap1, uint64_t bswap2)
-{
-    unsigned s_bits = opc & MO_SIZE;
-    unsigned a_bits = get_alignment_bits(opc);
-
-    /* We don't support unaligned accesses, but overalignment is easy.  */
-    if (a_bits < s_bits) {
-        a_bits = s_bits;
-    }
-
-    /*
-        .mii
-        mov	r2 = off_rw
-        extr.u	r3 = addr_reg, ...		# extract tlb page
-        zxt4	r57 = addr_reg                  # or mov for 64-bit guest
-        ;;
-        .mii
-        addl	r2 = r2, areg0
-        shl	r3 = r3, cteb                   # via dep.z
-        dep	r1 = 0, r57, ...                # zero page ofs, keep align
-        ;;
-        .mmi
-        add	r2 = r2, r3
-        ;;
-        ld4	r3 = [r2], off_add-off_rw	# or ld8 for 64-bit guest
-        nop
-        ;;
-        .mmi
-        nop
-        cmp.eq	p6, p7 = r3, r58
-        nop
-        ;;
-    */
-    tcg_out_bundle(s, miI,
-                   tcg_opc_movi_a(TCG_REG_P0, TCG_REG_R2, off_rw),
-                   tcg_opc_i11(TCG_REG_P0, OPC_EXTR_U_I11, TCG_REG_R3,
-                               addr_reg, TARGET_PAGE_BITS, CPU_TLB_BITS - 1),
-                   tcg_opc_ext_i(TCG_REG_P0,
-                                 TARGET_LONG_BITS == 32 ? MO_UL : MO_Q,
-                                 TCG_REG_R57, addr_reg));
-    tcg_out_bundle(s, miI,
-                   tcg_opc_a1 (TCG_REG_P0, OPC_ADD_A1, TCG_REG_R2,
-                               TCG_REG_R2, TCG_AREG0),
-                   tcg_opc_i12(TCG_REG_P0, OPC_DEP_Z_I12, TCG_REG_R3,
-                               TCG_REG_R3, 63 - CPU_TLB_ENTRY_BITS,
-                               63 - CPU_TLB_ENTRY_BITS),
-                   tcg_opc_i14(TCG_REG_P0, OPC_DEP_I14, TCG_REG_R1, 0,
-                               TCG_REG_R57, 63 - a_bits,
-                               TARGET_PAGE_BITS - a_bits - 1));
-    tcg_out_bundle(s, MmI,
-                   tcg_opc_a1 (TCG_REG_P0, OPC_ADD_A1,
-                               TCG_REG_R2, TCG_REG_R2, TCG_REG_R3),
-                   tcg_opc_m3 (TCG_REG_P0,
-                               (TARGET_LONG_BITS == 32
-                                ? OPC_LD4_M3 : OPC_LD8_M3), TCG_REG_R3,
-                               TCG_REG_R2, off_add - off_rw),
-                   bswap1);
-    tcg_out_bundle(s, mmI,
-                   tcg_opc_m1 (TCG_REG_P0, OPC_LD8_M1, TCG_REG_R2, TCG_REG_R2),
-                   tcg_opc_a6 (TCG_REG_P0, OPC_CMP_EQ_A6, TCG_REG_P6,
-                               TCG_REG_P7, TCG_REG_R1, TCG_REG_R3),
-                   bswap2);
-}
-
-typedef struct TCGLabelQemuLdst {
-    bool is_ld;
-    TCGMemOp size;
-    tcg_insn_unit *label_ptr;     /* label pointers to be updated */
-    struct TCGLabelQemuLdst *next;
-} TCGLabelQemuLdst;
-
-typedef struct TCGBackendData {
-    TCGLabelQemuLdst *labels;
-} TCGBackendData;
-
-static inline void tcg_out_tb_init(TCGContext *s)
-{
-    s->be->labels = NULL;
-}
-
-static void add_qemu_ldst_label(TCGContext *s, bool is_ld, TCGMemOp opc,
-                                tcg_insn_unit *label_ptr)
-{
-    TCGBackendData *be = s->be;
-    TCGLabelQemuLdst *l = tcg_malloc(sizeof(*l));
-
-    l->is_ld = is_ld;
-    l->size = opc & MO_SIZE;
-    l->label_ptr = label_ptr;
-    l->next = be->labels;
-    be->labels = l;
-}
-
-static bool tcg_out_tb_finalize(TCGContext *s)
-{
-    static const void * const helpers[8] = {
-        helper_ret_stb_mmu,
-        helper_le_stw_mmu,
-        helper_le_stl_mmu,
-        helper_le_stq_mmu,
-        helper_ret_ldub_mmu,
-        helper_le_lduw_mmu,
-        helper_le_ldul_mmu,
-        helper_le_ldq_mmu,
-    };
-    tcg_insn_unit *thunks[8] = { };
-    TCGLabelQemuLdst *l;
-
-    for (l = s->be->labels; l != NULL; l = l->next) {
-        long x = l->is_ld * 4 + l->size;
-        tcg_insn_unit *dest = thunks[x];
-
-        /* The out-of-line thunks are all the same; load the return address
-           from B0, load the GP, and branch to the code.  Note that we are
-           always post-call, so the register window has rolled, so we're
-           using incoming parameter register numbers, not outgoing.  */
-        if (dest == NULL) {
-            uintptr_t *desc = (uintptr_t *)helpers[x];
-            uintptr_t func = desc[0], gp = desc[1], disp;
-
-            thunks[x] = dest = s->code_ptr;
-
-            tcg_out_bundle(s, mlx,
-                           INSN_NOP_M,
-                           tcg_opc_l2 (gp),
-                           tcg_opc_x2 (TCG_REG_P0, OPC_MOVL_X2,
-                                       TCG_REG_R1, gp));
-            tcg_out_bundle(s, mii,
-                           INSN_NOP_M,
-                           INSN_NOP_I,
-                           tcg_opc_i22(TCG_REG_P0, OPC_MOV_I22,
-                                       l->is_ld ? TCG_REG_R35 : TCG_REG_R36,
-                                       TCG_REG_B0));
-            disp = (tcg_insn_unit *)func - s->code_ptr;
-            tcg_out_bundle(s, mLX,
-                           INSN_NOP_M,
-                           tcg_opc_l3 (disp),
-                           tcg_opc_x3 (TCG_REG_P0, OPC_BRL_SPTK_MANY_X3, disp));
-        }
-
-        reloc_pcrel21b_slot2(l->label_ptr, dest);
-
-        /* Test for (pending) buffer overflow.  The assumption is that any
-           one operation beginning below the high water mark cannot overrun
-           the buffer completely.  Thus we can test for overflow after
-           generating code without having to check during generation.  */
-        if (unlikely((void *)s->code_ptr > s->code_gen_highwater)) {
-            return false;
-        }
-    }
-    return true;
-}
-
-static inline void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args)
-{
-    static const uint64_t opc_ld_m1[4] = {
-        OPC_LD1_M1, OPC_LD2_M1, OPC_LD4_M1, OPC_LD8_M1
-    };
-    int addr_reg, data_reg, mem_index;
-    TCGMemOpIdx oi;
-    TCGMemOp opc, s_bits;
-    uint64_t fin1, fin2;
-    tcg_insn_unit *label_ptr;
-
-    data_reg = args[0];
-    addr_reg = args[1];
-    oi = args[2];
-    opc = get_memop(oi);
-    mem_index = get_mmuidx(oi);
-    s_bits = opc & MO_SIZE;
-
-    /* Read the TLB entry */
-    tcg_out_qemu_tlb(s, addr_reg, opc,
-                     offsetof(CPUArchState, tlb_table[mem_index][0].addr_read),
-                     offsetof(CPUArchState, tlb_table[mem_index][0].addend),
-                     INSN_NOP_I, INSN_NOP_I);
-
-    /* P6 is the fast path, and P7 the slow path */
-
-    fin2 = 0;
-    if (opc & MO_BSWAP) {
-        fin1 = tcg_opc_bswap64_i(TCG_REG_P0, data_reg, TCG_REG_R8);
-        if (s_bits < MO_64) {
-            int shift = 64 - (8 << s_bits);
-            fin2 = (opc & MO_SIGN ? OPC_EXTR_I11 : OPC_EXTR_U_I11);
-            fin2 = tcg_opc_i11(TCG_REG_P0, fin2,
-                               data_reg, data_reg, shift, 63 - shift);
-        }
-    } else {
-        fin1 = tcg_opc_ext_i(TCG_REG_P0, opc, data_reg, TCG_REG_R8);
-    }
-
-    tcg_out_bundle(s, mmI,
-                   tcg_opc_mov_a(TCG_REG_P7, TCG_REG_R56, TCG_AREG0),
-                   tcg_opc_a1 (TCG_REG_P6, OPC_ADD_A1, TCG_REG_R2,
-                               TCG_REG_R2, TCG_REG_R57),
-                   tcg_opc_movi_a(TCG_REG_P7, TCG_REG_R58, oi));
-    label_ptr = s->code_ptr;
-    tcg_out_bundle(s, miB,
-                   tcg_opc_m1 (TCG_REG_P6, opc_ld_m1[s_bits],
-                               TCG_REG_R8, TCG_REG_R2),
-                   INSN_NOP_I,
-                   tcg_opc_b3 (TCG_REG_P7, OPC_BR_CALL_SPNT_FEW_B3, TCG_REG_B0,
-                               get_reloc_pcrel21b_slot2(label_ptr)));
-
-    add_qemu_ldst_label(s, 1, opc, label_ptr);
-
-    /* Note that we always use LE helper functions, so the bswap insns
-       here for the fast path also apply to the slow path.  */
-    tcg_out_bundle(s, (fin2 ? mII : miI),
-                   INSN_NOP_M,
-                   fin1,
-                   fin2 ? fin2 : INSN_NOP_I);
-}
-
-static inline void tcg_out_qemu_st(TCGContext *s, const TCGArg *args)
-{
-    static const uint64_t opc_st_m4[4] = {
-        OPC_ST1_M4, OPC_ST2_M4, OPC_ST4_M4, OPC_ST8_M4
-    };
-    TCGReg addr_reg, data_reg;
-    int mem_index;
-    uint64_t pre1, pre2;
-    TCGMemOpIdx oi;
-    TCGMemOp opc, s_bits;
-    tcg_insn_unit *label_ptr;
-
-    data_reg = args[0];
-    addr_reg = args[1];
-    oi = args[2];
-    opc = get_memop(oi);
-    mem_index = get_mmuidx(oi);
-    s_bits = opc & MO_SIZE;
-
-    /* Note that we always use LE helper functions, so the bswap insns
-       that are here for the fast path also apply to the slow path,
-       and move the data into the argument register.  */
-    pre2 = INSN_NOP_I;
-    if (opc & MO_BSWAP) {
-        pre1 = tcg_opc_bswap64_i(TCG_REG_P0, TCG_REG_R58, data_reg);
-        if (s_bits < MO_64) {
-            int shift = 64 - (8 << s_bits);
-            pre2 = tcg_opc_i11(TCG_REG_P0, OPC_EXTR_U_I11,
-                               TCG_REG_R58, TCG_REG_R58, shift, 63 - shift);
-        }
-    } else {
-        /* Just move the data into place for the slow path.  */
-        pre1 = tcg_opc_ext_i(TCG_REG_P0, opc, TCG_REG_R58, data_reg);
-    }
-
-    tcg_out_qemu_tlb(s, addr_reg, opc,
-                     offsetof(CPUArchState, tlb_table[mem_index][0].addr_write),
-                     offsetof(CPUArchState, tlb_table[mem_index][0].addend),
-                     pre1, pre2);
-
-    /* P6 is the fast path, and P7 the slow path */
-    tcg_out_bundle(s, mmI,
-                   tcg_opc_mov_a(TCG_REG_P7, TCG_REG_R56, TCG_AREG0),
-                   tcg_opc_a1 (TCG_REG_P6, OPC_ADD_A1, TCG_REG_R2,
-                               TCG_REG_R2, TCG_REG_R57),
-                   tcg_opc_movi_a(TCG_REG_P7, TCG_REG_R59, oi));
-    label_ptr = s->code_ptr;
-    tcg_out_bundle(s, miB,
-                   tcg_opc_m4 (TCG_REG_P6, opc_st_m4[s_bits],
-                               TCG_REG_R58, TCG_REG_R2),
-                   INSN_NOP_I,
-                   tcg_opc_b3 (TCG_REG_P7, OPC_BR_CALL_SPNT_FEW_B3, TCG_REG_B0,
-                               get_reloc_pcrel21b_slot2(label_ptr)));
-
-    add_qemu_ldst_label(s, 0, opc, label_ptr);
-}
-
-#else /* !CONFIG_SOFTMMU */
-# include "tcg-be-null.h"
-
-static inline void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args)
-{
-    static uint64_t const opc_ld_m1[4] = {
-        OPC_LD1_M1, OPC_LD2_M1, OPC_LD4_M1, OPC_LD8_M1
-    };
-    int addr_reg, data_reg;
-    TCGMemOp opc, s_bits, bswap;
-
-    data_reg = args[0];
-    addr_reg = args[1];
-    opc = args[2];
-    s_bits = opc & MO_SIZE;
-    bswap = opc & MO_BSWAP;
-
-#if TARGET_LONG_BITS == 32
-    if (guest_base != 0) {
-        tcg_out_bundle(s, mII,
-                       INSN_NOP_M,
-                       tcg_opc_i29(TCG_REG_P0, OPC_ZXT4_I29,
-                                   TCG_REG_R3, addr_reg),
-                       tcg_opc_a1 (TCG_REG_P0, OPC_ADD_A1, TCG_REG_R2,
-                                   TCG_GUEST_BASE_REG, TCG_REG_R3));
-    } else {
-        tcg_out_bundle(s, miI,
-                       INSN_NOP_M,
-                       tcg_opc_i29(TCG_REG_P0, OPC_ZXT4_I29,
-                                   TCG_REG_R2, addr_reg),
-                       INSN_NOP_I);
-    }
-
-    if (!bswap) {
-        if (!(opc & MO_SIGN)) {
-            tcg_out_bundle(s, miI,
-                           tcg_opc_m1 (TCG_REG_P0, opc_ld_m1[s_bits],
-                                       data_reg, TCG_REG_R2),
-                           INSN_NOP_I,
-                           INSN_NOP_I);
-        } else {
-            tcg_out_bundle(s, mII,
-                           tcg_opc_m1 (TCG_REG_P0, opc_ld_m1[s_bits],
-                                       data_reg, TCG_REG_R2),
-                           INSN_NOP_I,
-                           tcg_opc_ext_i(TCG_REG_P0, opc, data_reg, data_reg));
-        }
-    } else if (s_bits == MO_64) {
-            tcg_out_bundle(s, mII,
-                           tcg_opc_m1 (TCG_REG_P0, opc_ld_m1[s_bits],
-                                       data_reg, TCG_REG_R2),
-                           INSN_NOP_I,
-                           tcg_opc_bswap64_i(TCG_REG_P0, data_reg, data_reg));
-    } else {
-        if (s_bits == MO_16) {
-            tcg_out_bundle(s, mII,
-                           tcg_opc_m1 (TCG_REG_P0, opc_ld_m1[s_bits],
-                                       data_reg, TCG_REG_R2),
-                           INSN_NOP_I,
-                           tcg_opc_i12(TCG_REG_P0, OPC_DEP_Z_I12,
-                                      data_reg, data_reg, 15, 15));
-        } else {
-            tcg_out_bundle(s, mII,
-                           tcg_opc_m1 (TCG_REG_P0, opc_ld_m1[s_bits],
-                                       data_reg, TCG_REG_R2),
-                           INSN_NOP_I,
-                           tcg_opc_i12(TCG_REG_P0, OPC_DEP_Z_I12,
-                                      data_reg, data_reg, 31, 31));
-        }
-        if (!(opc & MO_SIGN)) {
-            tcg_out_bundle(s, miI,
-                           INSN_NOP_M,
-                           INSN_NOP_I,
-                           tcg_opc_bswap64_i(TCG_REG_P0, data_reg, data_reg));
-        } else {
-            tcg_out_bundle(s, mII,
-                           INSN_NOP_M,
-                           tcg_opc_bswap64_i(TCG_REG_P0, data_reg, data_reg),
-                           tcg_opc_ext_i(TCG_REG_P0, opc, data_reg, data_reg));
-        }
-    }
-#else
-    if (guest_base != 0) {
-        tcg_out_bundle(s, MmI,
-                       tcg_opc_a1 (TCG_REG_P0, OPC_ADD_A1, TCG_REG_R2,
-                                   TCG_GUEST_BASE_REG, addr_reg),
-                       tcg_opc_m1 (TCG_REG_P0, opc_ld_m1[s_bits],
-                                   data_reg, TCG_REG_R2),
-                       INSN_NOP_I);
-    } else {
-        tcg_out_bundle(s, mmI,
-                       INSN_NOP_M,
-                       tcg_opc_m1 (TCG_REG_P0, opc_ld_m1[s_bits],
-                                   data_reg, addr_reg),
-                       INSN_NOP_I);
-    }
-
-    if (bswap && s_bits == MO_16) {
-        tcg_out_bundle(s, mII,
-                       INSN_NOP_M,
-                       tcg_opc_i12(TCG_REG_P0, OPC_DEP_Z_I12,
-                                   data_reg, data_reg, 15, 15),
-                       tcg_opc_bswap64_i(TCG_REG_P0, data_reg, data_reg));
-    } else if (bswap && s_bits == MO_32) {
-        tcg_out_bundle(s, mII,
-                       INSN_NOP_M,
-                       tcg_opc_i12(TCG_REG_P0, OPC_DEP_Z_I12,
-                                   data_reg, data_reg, 31, 31),
-                       tcg_opc_bswap64_i(TCG_REG_P0, data_reg, data_reg));
-    } else if (bswap && s_bits == MO_64) {
-        tcg_out_bundle(s, miI,
-                       INSN_NOP_M,
-                       INSN_NOP_I,
-                       tcg_opc_bswap64_i(TCG_REG_P0, data_reg, data_reg));
-    }
-    if (opc & MO_SIGN) {
-        tcg_out_bundle(s, miI,
-                       INSN_NOP_M,
-                       INSN_NOP_I,
-                       tcg_opc_ext_i(TCG_REG_P0, opc, data_reg, data_reg));
-    }
-#endif
-}
-
-static inline void tcg_out_qemu_st(TCGContext *s, const TCGArg *args)
-{
-    static uint64_t const opc_st_m4[4] = {
-        OPC_ST1_M4, OPC_ST2_M4, OPC_ST4_M4, OPC_ST8_M4
-    };
-    int addr_reg, data_reg;
-#if TARGET_LONG_BITS == 64
-    uint64_t add_guest_base;
-#endif
-    TCGMemOp opc, s_bits, bswap;
-
-    data_reg = args[0];
-    addr_reg = args[1];
-    opc = args[2];
-    s_bits = opc & MO_SIZE;
-    bswap = opc & MO_BSWAP;
-
-#if TARGET_LONG_BITS == 32
-    if (guest_base != 0) {
-        tcg_out_bundle(s, mII,
-                       INSN_NOP_M,
-                       tcg_opc_i29(TCG_REG_P0, OPC_ZXT4_I29,
-                                   TCG_REG_R3, addr_reg),
-                       tcg_opc_a1 (TCG_REG_P0, OPC_ADD_A1, TCG_REG_R2,
-                                   TCG_GUEST_BASE_REG, TCG_REG_R3));
-    } else {
-        tcg_out_bundle(s, miI,
-                       INSN_NOP_M,
-                       tcg_opc_i29(TCG_REG_P0, OPC_ZXT4_I29,
-                                   TCG_REG_R2, addr_reg),
-                       INSN_NOP_I);
-    }
-
-    if (bswap) {
-        if (s_bits == MO_16) {
-            tcg_out_bundle(s, mII,
-                           INSN_NOP_M,
-                           tcg_opc_i12(TCG_REG_P0, OPC_DEP_Z_I12,
-                                       TCG_REG_R3, data_reg, 15, 15),
-                           tcg_opc_bswap64_i(TCG_REG_P0,
-                                             TCG_REG_R3, TCG_REG_R3));
-            data_reg = TCG_REG_R3;
-        } else if (s_bits == MO_32) {
-            tcg_out_bundle(s, mII,
-                           INSN_NOP_M,
-                           tcg_opc_i12(TCG_REG_P0, OPC_DEP_Z_I12,
-                                       TCG_REG_R3, data_reg, 31, 31),
-                           tcg_opc_bswap64_i(TCG_REG_P0,
-                                             TCG_REG_R3, TCG_REG_R3));
-            data_reg = TCG_REG_R3;
-        } else if (s_bits == MO_64) {
-            tcg_out_bundle(s, miI,
-                           INSN_NOP_M,
-                           INSN_NOP_I,
-                           tcg_opc_bswap64_i(TCG_REG_P0, TCG_REG_R3, data_reg));
-            data_reg = TCG_REG_R3;
-        }
-    }
-    tcg_out_bundle(s, mmI,
-                   tcg_opc_m4 (TCG_REG_P0, opc_st_m4[s_bits],
-                               data_reg, TCG_REG_R2),
-                   INSN_NOP_M,
-                   INSN_NOP_I);
-#else
-    if (guest_base != 0) {
-        add_guest_base = tcg_opc_a1 (TCG_REG_P0, OPC_ADD_A1, TCG_REG_R2,
-                                     TCG_GUEST_BASE_REG, addr_reg);
-        addr_reg = TCG_REG_R2;
-    } else {
-        add_guest_base = INSN_NOP_M;
-    }
-
-    if (!bswap) {
-        tcg_out_bundle(s, (guest_base ? MmI : mmI),
-                       add_guest_base,
-                       tcg_opc_m4 (TCG_REG_P0, opc_st_m4[s_bits],
-                                   data_reg, addr_reg),
-                       INSN_NOP_I);
-    } else {
-        if (s_bits == MO_16) {
-            tcg_out_bundle(s, mII,
-                           add_guest_base,
-                           tcg_opc_i12(TCG_REG_P0, OPC_DEP_Z_I12,
-                                       TCG_REG_R3, data_reg, 15, 15),
-                           tcg_opc_bswap64_i(TCG_REG_P0,
-                                             TCG_REG_R3, TCG_REG_R3));
-            data_reg = TCG_REG_R3;
-        } else if (s_bits == MO_32) {
-            tcg_out_bundle(s, mII,
-                           add_guest_base,
-                           tcg_opc_i12(TCG_REG_P0, OPC_DEP_Z_I12,
-                                       TCG_REG_R3, data_reg, 31, 31),
-                           tcg_opc_bswap64_i(TCG_REG_P0,
-                                             TCG_REG_R3, TCG_REG_R3));
-            data_reg = TCG_REG_R3;
-        } else if (s_bits == MO_64) {
-            tcg_out_bundle(s, miI,
-                           add_guest_base,
-                           INSN_NOP_I,
-                           tcg_opc_bswap64_i(TCG_REG_P0, TCG_REG_R3, data_reg));
-            data_reg = TCG_REG_R3;
-        }
-        tcg_out_bundle(s, miI,
-                       tcg_opc_m4 (TCG_REG_P0, opc_st_m4[s_bits],
-                                   data_reg, addr_reg),
-                       INSN_NOP_I,
-                       INSN_NOP_I);
-    }
-#endif
-}
-
-#endif
-
-static inline void tcg_out_op(TCGContext *s, TCGOpcode opc,
-                              const TCGArg *args, const int *const_args)
-{
-    switch(opc) {
-    case INDEX_op_exit_tb:
-        tcg_out_exit_tb(s, args[0]);
-        break;
-    case INDEX_op_br:
-        tcg_out_br(s, arg_label(args[0]));
-        break;
-    case INDEX_op_goto_tb:
-        tcg_out_goto_tb(s, args[0]);
-        break;
-
-    case INDEX_op_ld8u_i32:
-    case INDEX_op_ld8u_i64:
-        tcg_out_ld_rel(s, OPC_LD1_M1, args[0], args[1], args[2]);
-        break;
-    case INDEX_op_ld8s_i32:
-    case INDEX_op_ld8s_i64:
-        tcg_out_ld_rel(s, OPC_LD1_M1, args[0], args[1], args[2]);
-        tcg_out_ext(s, OPC_SXT1_I29, args[0], args[0]);
-        break;
-    case INDEX_op_ld16u_i32:
-    case INDEX_op_ld16u_i64:
-        tcg_out_ld_rel(s, OPC_LD2_M1, args[0], args[1], args[2]);
-        break;
-    case INDEX_op_ld16s_i32:
-    case INDEX_op_ld16s_i64:
-        tcg_out_ld_rel(s, OPC_LD2_M1, args[0], args[1], args[2]);
-        tcg_out_ext(s, OPC_SXT2_I29, args[0], args[0]);
-        break;
-    case INDEX_op_ld_i32:
-    case INDEX_op_ld32u_i64:
-        tcg_out_ld_rel(s, OPC_LD4_M1, args[0], args[1], args[2]);
-        break;
-    case INDEX_op_ld32s_i64:
-        tcg_out_ld_rel(s, OPC_LD4_M1, args[0], args[1], args[2]);
-        tcg_out_ext(s, OPC_SXT4_I29, args[0], args[0]);
-        break;
-    case INDEX_op_ld_i64:
-        tcg_out_ld_rel(s, OPC_LD8_M1, args[0], args[1], args[2]);
-        break;
-    case INDEX_op_st8_i32:
-    case INDEX_op_st8_i64:
-        tcg_out_st_rel(s, OPC_ST1_M4, args[0], args[1], args[2]);
-        break;
-    case INDEX_op_st16_i32:
-    case INDEX_op_st16_i64:
-        tcg_out_st_rel(s, OPC_ST2_M4, args[0], args[1], args[2]);
-        break;
-    case INDEX_op_st_i32:
-    case INDEX_op_st32_i64:
-        tcg_out_st_rel(s, OPC_ST4_M4, args[0], args[1], args[2]);
-        break;
-    case INDEX_op_st_i64:
-        tcg_out_st_rel(s, OPC_ST8_M4, args[0], args[1], args[2]);
-        break;
-
-    case INDEX_op_add_i32:
-    case INDEX_op_add_i64:
-        tcg_out_add(s, args[0], args[1], args[2], const_args[2]);
-        break;
-    case INDEX_op_sub_i32:
-    case INDEX_op_sub_i64:
-        tcg_out_sub(s, args[0], args[1], const_args[1], args[2], const_args[2]);
-        break;
-
-    case INDEX_op_and_i32:
-    case INDEX_op_and_i64:
-        /* TCG expects arg2 constant; A3 expects arg1 constant.  Swap.  */
-        tcg_out_alu(s, OPC_AND_A1, OPC_AND_A3, args[0],
-                    args[2], const_args[2], args[1], const_args[1]);
-        break;
-    case INDEX_op_andc_i32:
-    case INDEX_op_andc_i64:
-        tcg_out_alu(s, OPC_ANDCM_A1, OPC_ANDCM_A3, args[0],
-                    args[1], const_args[1], args[2], const_args[2]);
-        break;
-    case INDEX_op_eqv_i32:
-    case INDEX_op_eqv_i64:
-        tcg_out_eqv(s, args[0], args[1], const_args[1],
-                    args[2], const_args[2]);
-        break;
-    case INDEX_op_nand_i32:
-    case INDEX_op_nand_i64:
-        tcg_out_nand(s, args[0], args[1], const_args[1],
-                     args[2], const_args[2]);
-        break;
-    case INDEX_op_nor_i32:
-    case INDEX_op_nor_i64:
-        tcg_out_nor(s, args[0], args[1], const_args[1],
-                    args[2], const_args[2]);
-        break;
-    case INDEX_op_or_i32:
-    case INDEX_op_or_i64:
-        /* TCG expects arg2 constant; A3 expects arg1 constant.  Swap.  */
-        tcg_out_alu(s, OPC_OR_A1, OPC_OR_A3, args[0],
-                    args[2], const_args[2], args[1], const_args[1]);
-        break;
-    case INDEX_op_orc_i32:
-    case INDEX_op_orc_i64:
-        tcg_out_orc(s, args[0], args[1], const_args[1],
-                    args[2], const_args[2]);
-        break;
-    case INDEX_op_xor_i32:
-    case INDEX_op_xor_i64:
-        /* TCG expects arg2 constant; A3 expects arg1 constant.  Swap.  */
-        tcg_out_alu(s, OPC_XOR_A1, OPC_XOR_A3, args[0],
-                    args[2], const_args[2], args[1], const_args[1]);
-        break;
-
-    case INDEX_op_mul_i32:
-    case INDEX_op_mul_i64:
-        tcg_out_mul(s, args[0], args[1], args[2]);
-        break;
-
-    case INDEX_op_sar_i32:
-        tcg_out_sar_i32(s, args[0], args[1], args[2], const_args[2]);
-        break;
-    case INDEX_op_sar_i64:
-        tcg_out_sar_i64(s, args[0], args[1], args[2], const_args[2]);
-        break;
-    case INDEX_op_shl_i32:
-        tcg_out_shl_i32(s, args[0], args[1], args[2], const_args[2]);
-        break;
-    case INDEX_op_shl_i64:
-        tcg_out_shl_i64(s, args[0], args[1], args[2], const_args[2]);
-        break;
-    case INDEX_op_shr_i32:
-        tcg_out_shr_i32(s, args[0], args[1], args[2], const_args[2]);
-        break;
-    case INDEX_op_shr_i64:
-        tcg_out_shr_i64(s, args[0], args[1], args[2], const_args[2]);
-        break;
-    case INDEX_op_rotl_i32:
-        tcg_out_rotl_i32(s, args[0], args[1], args[2], const_args[2]);
-        break;
-    case INDEX_op_rotl_i64:
-        tcg_out_rotl_i64(s, args[0], args[1], args[2], const_args[2]);
-        break;
-    case INDEX_op_rotr_i32:
-        tcg_out_rotr_i32(s, args[0], args[1], args[2], const_args[2]);
-        break;
-    case INDEX_op_rotr_i64:
-        tcg_out_rotr_i64(s, args[0], args[1], args[2], const_args[2]);
-        break;
-
-    case INDEX_op_ext8s_i32:
-    case INDEX_op_ext8s_i64:
-        tcg_out_ext(s, OPC_SXT1_I29, args[0], args[1]);
-        break;
-    case INDEX_op_ext8u_i32:
-    case INDEX_op_ext8u_i64:
-        tcg_out_ext(s, OPC_ZXT1_I29, args[0], args[1]);
-        break;
-    case INDEX_op_ext16s_i32:
-    case INDEX_op_ext16s_i64:
-        tcg_out_ext(s, OPC_SXT2_I29, args[0], args[1]);
-        break;
-    case INDEX_op_ext16u_i32:
-    case INDEX_op_ext16u_i64:
-        tcg_out_ext(s, OPC_ZXT2_I29, args[0], args[1]);
-        break;
-    case INDEX_op_ext_i32_i64:
-    case INDEX_op_ext32s_i64:
-        tcg_out_ext(s, OPC_SXT4_I29, args[0], args[1]);
-        break;
-    case INDEX_op_extu_i32_i64:
-    case INDEX_op_ext32u_i64:
-        tcg_out_ext(s, OPC_ZXT4_I29, args[0], args[1]);
-        break;
-
-    case INDEX_op_bswap16_i32:
-    case INDEX_op_bswap16_i64:
-        tcg_out_bswap16(s, args[0], args[1]);
-        break;
-    case INDEX_op_bswap32_i32:
-    case INDEX_op_bswap32_i64:
-        tcg_out_bswap32(s, args[0], args[1]);
-        break;
-    case INDEX_op_bswap64_i64:
-        tcg_out_bswap64(s, args[0], args[1]);
-        break;
-
-    case INDEX_op_deposit_i32:
-    case INDEX_op_deposit_i64:
-        tcg_out_deposit(s, args[0], args[1], args[2], const_args[2],
-                        args[3], args[4]);
-        break;
-
-    case INDEX_op_brcond_i32:
-        tcg_out_brcond(s, args[2], args[0], args[1], arg_label(args[3]), 1);
-        break;
-    case INDEX_op_brcond_i64:
-        tcg_out_brcond(s, args[2], args[0], args[1], arg_label(args[3]), 0);
-        break;
-    case INDEX_op_setcond_i32:
-        tcg_out_setcond(s, args[3], args[0], args[1], args[2], 1);
-        break;
-    case INDEX_op_setcond_i64:
-        tcg_out_setcond(s, args[3], args[0], args[1], args[2], 0);
-        break;
-    case INDEX_op_movcond_i32:
-        tcg_out_movcond(s, args[5], args[0], args[1], args[2],
-                        args[3], const_args[3], args[4], const_args[4], 1);
-        break;
-    case INDEX_op_movcond_i64:
-        tcg_out_movcond(s, args[5], args[0], args[1], args[2],
-                        args[3], const_args[3], args[4], const_args[4], 0);
-        break;
-
-    case INDEX_op_qemu_ld_i32:
-        tcg_out_qemu_ld(s, args);
-        break;
-    case INDEX_op_qemu_ld_i64:
-        tcg_out_qemu_ld(s, args);
-        break;
-    case INDEX_op_qemu_st_i32:
-        tcg_out_qemu_st(s, args);
-        break;
-    case INDEX_op_qemu_st_i64:
-        tcg_out_qemu_st(s, args);
-        break;
-
-    case INDEX_op_mb:
-        tcg_out_bundle(s, mmI, OPC_MF_M24, INSN_NOP_M, INSN_NOP_I);
-        break;
-    case INDEX_op_mov_i32:  /* Always emitted via tcg_out_mov.  */
-    case INDEX_op_mov_i64:
-    case INDEX_op_movi_i32: /* Always emitted via tcg_out_movi.  */
-    case INDEX_op_movi_i64:
-    case INDEX_op_call:     /* Always emitted via tcg_out_call.  */
-    default:
-        tcg_abort();
-    }
-}
-
-static const TCGTargetOpDef ia64_op_defs[] = {
-    { INDEX_op_br, { } },
-    { INDEX_op_exit_tb, { } },
-    { INDEX_op_goto_tb, { } },
-
-    { INDEX_op_ld8u_i32, { "r", "r" } },
-    { INDEX_op_ld8s_i32, { "r", "r" } },
-    { INDEX_op_ld16u_i32, { "r", "r" } },
-    { INDEX_op_ld16s_i32, { "r", "r" } },
-    { INDEX_op_ld_i32, { "r", "r" } },
-    { INDEX_op_st8_i32, { "rZ", "r" } },
-    { INDEX_op_st16_i32, { "rZ", "r" } },
-    { INDEX_op_st_i32, { "rZ", "r" } },
-
-    { INDEX_op_add_i32, { "r", "rZ", "rI" } },
-    { INDEX_op_sub_i32, { "r", "rI", "rI" } },
-
-    { INDEX_op_and_i32, { "r", "rI", "rI" } },
-    { INDEX_op_andc_i32, { "r", "rI", "rI" } },
-    { INDEX_op_eqv_i32, { "r", "rZ", "rZ" } },
-    { INDEX_op_nand_i32, { "r", "rZ", "rZ" } },
-    { INDEX_op_nor_i32, { "r", "rZ", "rZ" } },
-    { INDEX_op_or_i32, { "r", "rI", "rI" } },
-    { INDEX_op_orc_i32, { "r", "rZ", "rZ" } },
-    { INDEX_op_xor_i32, { "r", "rI", "rI" } },
-
-    { INDEX_op_mul_i32, { "r", "rZ", "rZ" } },
-
-    { INDEX_op_sar_i32, { "r", "rZ", "ri" } },
-    { INDEX_op_shl_i32, { "r", "rZ", "ri" } },
-    { INDEX_op_shr_i32, { "r", "rZ", "ri" } },
-    { INDEX_op_rotl_i32, { "r", "rZ", "ri" } },
-    { INDEX_op_rotr_i32, { "r", "rZ", "ri" } },
-
-    { INDEX_op_ext8s_i32, { "r", "rZ"} },
-    { INDEX_op_ext8u_i32, { "r", "rZ"} },
-    { INDEX_op_ext16s_i32, { "r", "rZ"} },
-    { INDEX_op_ext16u_i32, { "r", "rZ"} },
-
-    { INDEX_op_bswap16_i32, { "r", "rZ" } },
-    { INDEX_op_bswap32_i32, { "r", "rZ" } },
-
-    { INDEX_op_brcond_i32, { "rZ", "rZ" } },
-    { INDEX_op_setcond_i32, { "r", "rZ", "rZ" } },
-    { INDEX_op_movcond_i32, { "r", "rZ", "rZ", "rI", "rI" } },
-
-    { INDEX_op_ld8u_i64, { "r", "r" } },
-    { INDEX_op_ld8s_i64, { "r", "r" } },
-    { INDEX_op_ld16u_i64, { "r", "r" } },
-    { INDEX_op_ld16s_i64, { "r", "r" } },
-    { INDEX_op_ld32u_i64, { "r", "r" } },
-    { INDEX_op_ld32s_i64, { "r", "r" } },
-    { INDEX_op_ld_i64, { "r", "r" } },
-    { INDEX_op_st8_i64, { "rZ", "r" } },
-    { INDEX_op_st16_i64, { "rZ", "r" } },
-    { INDEX_op_st32_i64, { "rZ", "r" } },
-    { INDEX_op_st_i64, { "rZ", "r" } },
-
-    { INDEX_op_add_i64, { "r", "rZ", "rI" } },
-    { INDEX_op_sub_i64, { "r", "rI", "rI" } },
-
-    { INDEX_op_and_i64, { "r", "rI", "rI" } },
-    { INDEX_op_andc_i64, { "r", "rI", "rI" } },
-    { INDEX_op_eqv_i64, { "r", "rZ", "rZ" } },
-    { INDEX_op_nand_i64, { "r", "rZ", "rZ" } },
-    { INDEX_op_nor_i64, { "r", "rZ", "rZ" } },
-    { INDEX_op_or_i64, { "r", "rI", "rI" } },
-    { INDEX_op_orc_i64, { "r", "rZ", "rZ" } },
-    { INDEX_op_xor_i64, { "r", "rI", "rI" } },
-
-    { INDEX_op_mul_i64, { "r", "rZ", "rZ" } },
-
-    { INDEX_op_sar_i64, { "r", "rZ", "ri" } },
-    { INDEX_op_shl_i64, { "r", "rZ", "ri" } },
-    { INDEX_op_shr_i64, { "r", "rZ", "ri" } },
-    { INDEX_op_rotl_i64, { "r", "rZ", "ri" } },
-    { INDEX_op_rotr_i64, { "r", "rZ", "ri" } },
-
-    { INDEX_op_ext8s_i64, { "r", "rZ"} },
-    { INDEX_op_ext8u_i64, { "r", "rZ"} },
-    { INDEX_op_ext16s_i64, { "r", "rZ"} },
-    { INDEX_op_ext16u_i64, { "r", "rZ"} },
-    { INDEX_op_ext32s_i64, { "r", "rZ"} },
-    { INDEX_op_ext32u_i64, { "r", "rZ"} },
-    { INDEX_op_ext_i32_i64, { "r", "rZ" } },
-    { INDEX_op_extu_i32_i64, { "r", "rZ" } },
-
-    { INDEX_op_bswap16_i64, { "r", "rZ" } },
-    { INDEX_op_bswap32_i64, { "r", "rZ" } },
-    { INDEX_op_bswap64_i64, { "r", "rZ" } },
-
-    { INDEX_op_brcond_i64, { "rZ", "rZ" } },
-    { INDEX_op_setcond_i64, { "r", "rZ", "rZ" } },
-    { INDEX_op_movcond_i64, { "r", "rZ", "rZ", "rI", "rI" } },
-
-    { INDEX_op_deposit_i32, { "r", "rZ", "ri" } },
-    { INDEX_op_deposit_i64, { "r", "rZ", "ri" } },
-
-    { INDEX_op_qemu_ld_i32, { "r", "r" } },
-    { INDEX_op_qemu_ld_i64, { "r", "r" } },
-    { INDEX_op_qemu_st_i32, { "SZ", "r" } },
-    { INDEX_op_qemu_st_i64, { "SZ", "r" } },
-
-    { INDEX_op_mb, { } },
-    { -1 },
-};
-
-static const TCGTargetOpDef *tcg_target_op_def(TCGOpcode op)
-{
-    int i, n = ARRAY_SIZE(ia64_op_defs);
-
-    for (i = 0; i < n; ++i) {
-        if (ia64_op_defs[i].op == op) {
-            return &ia64_op_defs[i];
-        }
-    }
-    return NULL;
-}
-
-/* Generate global QEMU prologue and epilogue code */
-static void tcg_target_qemu_prologue(TCGContext *s)
-{
-    int frame_size;
-
-    /* reserve some stack space */
-    frame_size = TCG_STATIC_CALL_ARGS_SIZE +
-                 CPU_TEMP_BUF_NLONGS * sizeof(long);
-    frame_size = (frame_size + TCG_TARGET_STACK_ALIGN - 1) &
-                 ~(TCG_TARGET_STACK_ALIGN - 1);
-    tcg_set_frame(s, TCG_REG_CALL_STACK, TCG_STATIC_CALL_ARGS_SIZE,
-                  CPU_TEMP_BUF_NLONGS * sizeof(long));
-
-    /* First emit adhoc function descriptor */
-    *s->code_ptr = (tcg_insn_unit){
-        (uint64_t)(s->code_ptr + 1), /* entry point */
-        0                            /* skip gp */
-    };
-    s->code_ptr++;
-
-    /* prologue */
-    tcg_out_bundle(s, miI,
-                   tcg_opc_m34(TCG_REG_P0, OPC_ALLOC_M34,
-                               TCG_REG_R34, 32, 24, 0),
-                   INSN_NOP_I,
-                   tcg_opc_i21(TCG_REG_P0, OPC_MOV_I21,
-                               TCG_REG_B6, TCG_REG_R33, 0));
-
-    /* ??? If guest_base < 0x200000, we could load the register via
-       an ADDL in the M slot of the next bundle.  */
-    if (guest_base != 0) {
-        tcg_out_bundle(s, mlx,
-                       INSN_NOP_M,
-                       tcg_opc_l2(guest_base),
-                       tcg_opc_x2 (TCG_REG_P0, OPC_MOVL_X2,
-                                   TCG_GUEST_BASE_REG, guest_base));
-        tcg_regset_set_reg(s->reserved_regs, TCG_GUEST_BASE_REG);
-    }
-
-    tcg_out_bundle(s, miB,
-                   tcg_opc_a4 (TCG_REG_P0, OPC_ADDS_A4,
-                               TCG_REG_R12, -frame_size, TCG_REG_R12),
-                   tcg_opc_i22(TCG_REG_P0, OPC_MOV_I22,
-                               TCG_REG_R33, TCG_REG_B0),
-                   tcg_opc_b4 (TCG_REG_P0, OPC_BR_SPTK_MANY_B4, TCG_REG_B6));
-
-    /* epilogue */
-    tb_ret_addr = s->code_ptr;
-    tcg_out_bundle(s, miI,
-                   INSN_NOP_M,
-                   tcg_opc_i21(TCG_REG_P0, OPC_MOV_I21,
-                               TCG_REG_B0, TCG_REG_R33, 0),
-                   tcg_opc_a4 (TCG_REG_P0, OPC_ADDS_A4,
-                               TCG_REG_R12, frame_size, TCG_REG_R12));
-    tcg_out_bundle(s, miB,
-                   INSN_NOP_M,
-                   tcg_opc_i26(TCG_REG_P0, OPC_MOV_I_I26,
-                               TCG_REG_PFS, TCG_REG_R34),
-                   tcg_opc_b4 (TCG_REG_P0, OPC_BR_RET_SPTK_MANY_B4,
-                               TCG_REG_B0));
-}
-
-static void tcg_target_init(TCGContext *s)
-{
-    tcg_regset_set(tcg_target_available_regs[TCG_TYPE_I32],
-                   0xffffffffffffffffull);
-    tcg_regset_set(tcg_target_available_regs[TCG_TYPE_I64],
-                   0xffffffffffffffffull);
-
-    tcg_regset_clear(tcg_target_call_clobber_regs);
-    tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R8);
-    tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R9);
-    tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R10);
-    tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R11);
-    tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R14);
-    tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R15);
-    tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R16);
-    tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R17);
-    tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R18);
-    tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R19);
-    tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R20);
-    tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R21);
-    tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R22);
-    tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R23);
-    tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R24);
-    tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R25);
-    tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R26);
-    tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R27);
-    tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R28);
-    tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R29);
-    tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R30);
-    tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R31);
-    tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R56);
-    tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R57);
-    tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R58);
-    tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R59);
-    tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R60);
-    tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R61);
-    tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R62);
-    tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R63);
-
-    tcg_regset_clear(s->reserved_regs);
-    tcg_regset_set_reg(s->reserved_regs, TCG_REG_R0);   /* zero register */
-    tcg_regset_set_reg(s->reserved_regs, TCG_REG_R1);   /* global pointer */
-    tcg_regset_set_reg(s->reserved_regs, TCG_REG_R2);   /* internal use */
-    tcg_regset_set_reg(s->reserved_regs, TCG_REG_R3);   /* internal use */
-    tcg_regset_set_reg(s->reserved_regs, TCG_REG_R12);  /* stack pointer */
-    tcg_regset_set_reg(s->reserved_regs, TCG_REG_R13);  /* thread pointer */
-    tcg_regset_set_reg(s->reserved_regs, TCG_REG_R33);  /* return address */
-    tcg_regset_set_reg(s->reserved_regs, TCG_REG_R34);  /* PFS */
-
-    /* The following 4 are not in use, are call-saved, but *not* saved
-       by the prologue.  Therefore we cannot use them without modifying
-       the prologue.  There doesn't seem to be any good reason to use
-       these as opposed to the windowed registers.  */
-    tcg_regset_set_reg(s->reserved_regs, TCG_REG_R4);
-    tcg_regset_set_reg(s->reserved_regs, TCG_REG_R5);
-    tcg_regset_set_reg(s->reserved_regs, TCG_REG_R6);
-    tcg_regset_set_reg(s->reserved_regs, TCG_REG_R7);
-}
diff --git a/MAINTAINERS b/MAINTAINERS
index 5ec945c9af..caf7e8aca8 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1647,12 +1647,6 @@  S: Maintained
 F: tcg/i386/
 F: disas/i386.c
 
-IA64 target
-M: Aurelien Jarno <aurelien@aurel32.net>
-S: Maintained
-F: tcg/ia64/
-F: disas/ia64.c
-
 MIPS target
 M: Aurelien Jarno <aurelien@aurel32.net>
 S: Maintained
diff --git a/configure b/configure
index fb7e34a901..a541aadebc 100755
--- a/configure
+++ b/configure
@@ -634,9 +634,6 @@  case "$cpu" in
     cpu="$cpu"
     supported_cpu="yes"
   ;;
-  ia64)
-    cpu="$cpu"
-  ;;
   i386|i486|i586|i686|i86pc|BePC)
     cpu="i386"
     supported_cpu="yes"
@@ -6459,9 +6456,6 @@  for i in $ARCH $TARGET_BASE_ARCH ; do
   i386|x86_64|x32)
     disas_config "I386"
   ;;
-  ia64*)
-    disas_config "IA64"
-  ;;
   lm32)
     disas_config "LM32"
   ;;
diff --git a/disas/Makefile.objs b/disas/Makefile.objs
index 62632ef0dd..194648fb1a 100644
--- a/disas/Makefile.objs
+++ b/disas/Makefile.objs
@@ -11,7 +11,6 @@  arm-a64.o-cflags := -I$(libvixldir) -Wno-sign-compare
 common-obj-$(CONFIG_CRIS_DIS) += cris.o
 common-obj-$(CONFIG_HPPA_DIS) += hppa.o
 common-obj-$(CONFIG_I386_DIS) += i386.o
-common-obj-$(CONFIG_IA64_DIS) += ia64.o
 common-obj-$(CONFIG_M68K_DIS) += m68k.o
 common-obj-$(CONFIG_MICROBLAZE_DIS) += microblaze.o
 common-obj-$(CONFIG_MIPS_DIS) += mips.o