From patchwork Tue Sep 12 09:54:35 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kunihiko Hayashi X-Patchwork-Id: 112259 Delivered-To: patch@linaro.org Received: by 10.80.202.13 with SMTP id d13csp5665283edi; Tue, 12 Sep 2017 02:54:52 -0700 (PDT) X-Google-Smtp-Source: ADKCNb6VPq2TIxhcsPes42rB71mxdlNFY8iAOiJpe0hkpi+9XZzH3NAvEH0SDTejnQ25OK/QQ3eK X-Received: by 10.84.254.4 with SMTP id b4mr15948455plm.285.1505210092114; Tue, 12 Sep 2017 02:54:52 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1505210092; cv=none; d=google.com; s=arc-20160816; b=QK9iDDHJtbSGcpkLqFhYUnDNt/jV4joyVW1vWdedfmeaNWUHe+7ETfr3vj9733jbJF 1HGeI+8qImN+57lk4YREroDMijNPsEFYpvKwLlQuorpuCIO7zGLVP5y2IXSFCODAWRg9 0HWFShNSCbPoJaa42s4gZjfF3cb5mlCkmUtqbBhRAykBF3g63OPWaZQ6t+4hMMLboBrS x/nYygtTzpVLxbSRYcalwZDeRpulvqgQvLqnCPgWO4QvedtyPzkJC8oYz6eM6qB1s2b4 23e/RAwiHYPldnurvnMC1rYGtZbFYRjq7D1yEWg2QybbFys4GrzMKKphoi/ovJvIO9Tw 2bPw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:message-id:date:subject:cc:to:from :arc-authentication-results; bh=GBzbf4qWk6GgBAawo1kjW+d3w0rgOWwlNl7YWTJLR10=; b=S7xiMySUXck4ukz5GWhAQm7o6BqM6QwN4sgjB+y4E3zEt8puVfHba6d5uj/jck42R/ KpAikSdno3Zox380LAp4LcUfO2NGkMKJTwZvigyMovsdGFE0UXHuYcz8usC6SMLBAVAz JIK5Gu4ljAYFtWcrNVGPQUT2qtQ3sQFO5nPYDfxfcK8GcD15RZ0xOhN5j2Oo3+K7IrLH iFIiRV56CeSNYqwSND8yngeonSgYiCIWixmB+j8IRTEW4PT9N5QQA93GLAOQpa0qxgmU VC2UPnhomTg1RlFf5yv2u9LY01kfCbEEYdWLeu/W6bEFU6x9axFTmBi2EDkJKR3uNx4r Layg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of netdev-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=netdev-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id e29si7711094pfl.586.2017.09.12.02.54.51; Tue, 12 Sep 2017 02:54:52 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of netdev-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of netdev-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=netdev-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751381AbdILJyr (ORCPT + 7 others); Tue, 12 Sep 2017 05:54:47 -0400 Received: from mx.socionext.com ([202.248.49.38]:35968 "EHLO mx.socionext.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751286AbdILJyq (ORCPT ); Tue, 12 Sep 2017 05:54:46 -0400 Received: from unknown (HELO iyokan-ex.css.socionext.com) ([172.31.9.54]) by mx.socionext.com with ESMTP; 12 Sep 2017 18:54:45 +0900 Received: from mail.mfilter.local (unknown [10.213.24.62]) by iyokan-ex.css.socionext.com (Postfix) with ESMTP id DDE83610C6; Tue, 12 Sep 2017 18:54:45 +0900 (JST) Received: from 172.31.9.51 (172.31.9.51) by m-FILTER with ESMTP; Tue, 12 Sep 2017 18:54:45 +0900 Received: from plum.e01.socionext.com (unknown [10.213.132.32]) by kinkan.css.socionext.com (Postfix) with ESMTP id A1CBB1A0E11; Tue, 12 Sep 2017 18:54:45 +0900 (JST) From: Kunihiko Hayashi To: Andrew Lunn , Florian Fainelli , netdev@vger.kernel.org Cc: Jassi Brar , Kunihiko Hayashi Subject: [PATCH net-next v2 1/2] net: phy: realtek: rename RTL8211F_PAGE_SELECT to RTL821x_PAGE_SELECT Date: Tue, 12 Sep 2017 18:54:35 +0900 Message-Id: <1505210076-32311-1-git-send-email-hayashi.kunihiko@socionext.com> X-Mailer: git-send-email 2.7.4 Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org This renames the definition of page select register from RTL8211F_PAGE_SELECT to RTL821x_PAGE_SELECT to use it across models. Signed-off-by: Kunihiko Hayashi --- Changes since v1: - new patch in this series --- drivers/net/phy/realtek.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) -- 2.7.4 Reviewed-by: Andrew Lunn diff --git a/drivers/net/phy/realtek.c b/drivers/net/phy/realtek.c index 9cbe645..99c3297 100644 --- a/drivers/net/phy/realtek.c +++ b/drivers/net/phy/realtek.c @@ -22,11 +22,11 @@ #define RTL821x_INER 0x12 #define RTL821x_INER_INIT 0x6400 #define RTL821x_INSR 0x13 +#define RTL821x_PAGE_SELECT 0x1f #define RTL8211E_INER_LINK_STATUS 0x400 #define RTL8211F_INER_LINK_STATUS 0x0010 #define RTL8211F_INSR 0x1d -#define RTL8211F_PAGE_SELECT 0x1f #define RTL8211F_TX_DELAY 0x100 MODULE_DESCRIPTION("Realtek PHY driver"); @@ -46,10 +46,10 @@ static int rtl8211f_ack_interrupt(struct phy_device *phydev) { int err; - phy_write(phydev, RTL8211F_PAGE_SELECT, 0xa43); + phy_write(phydev, RTL821x_PAGE_SELECT, 0xa43); err = phy_read(phydev, RTL8211F_INSR); /* restore to default page 0 */ - phy_write(phydev, RTL8211F_PAGE_SELECT, 0x0); + phy_write(phydev, RTL821x_PAGE_SELECT, 0x0); return (err < 0) ? err : 0; } @@ -102,7 +102,7 @@ static int rtl8211f_config_init(struct phy_device *phydev) if (ret < 0) return ret; - phy_write(phydev, RTL8211F_PAGE_SELECT, 0xd08); + phy_write(phydev, RTL821x_PAGE_SELECT, 0xd08); reg = phy_read(phydev, 0x11); /* enable TX-delay for rgmii-id and rgmii-txid, otherwise disable it */ @@ -114,7 +114,7 @@ static int rtl8211f_config_init(struct phy_device *phydev) phy_write(phydev, 0x11, reg); /* restore to default page 0 */ - phy_write(phydev, RTL8211F_PAGE_SELECT, 0x0); + phy_write(phydev, RTL821x_PAGE_SELECT, 0x0); return 0; }