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[192.237.175.120]) by mx.google.com with ESMTPS id d6si139236iog.213.2017.09.12.03.05.52 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 12 Sep 2017 03:05:52 -0700 (PDT) Received-SPF: neutral (google.com: 192.237.175.120 is neither permitted nor denied by best guess record for domain of xen-devel-bounces@lists.xen.org) client-ip=192.237.175.120; Authentication-Results: mx.google.com; spf=neutral (google.com: 192.237.175.120 is neither permitted nor denied by best guess record for domain of xen-devel-bounces@lists.xen.org) smtp.mailfrom=xen-devel-bounces@lists.xen.org Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1dri2t-0002yC-Dp; Tue, 12 Sep 2017 10:03:55 +0000 Received: from mail6.bemta3.messagelabs.com ([195.245.230.39]) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1dri2r-0002rb-Cq for xen-devel@lists.xen.org; Tue, 12 Sep 2017 10:03:53 +0000 Received: from [85.158.137.68] by server-14.bemta-3.messagelabs.com id 59/1D-01910-901B7B95; Tue, 12 Sep 2017 10:03:53 +0000 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFnrELMWRWlGSWpSXmKPExsVysyfVTZdj4/Z Ig9bPWhZLPi5mcWD0OLr7N1MAYxRrZl5SfkUCa8ayc2uYC54IVPS0PWJtYNzH28XIxSEksJlR 4ube/UxdjJxAzmlGiRu9pSA2m4CmxJ3Pn8DiIgLSEtc+X2YEsZkFIiUOf/jBDmILCyRJtPw+A WazCKhK9F77CVbPK2ApMW/rQmYQW0JAXmJX20VWEJsTKL7i4y82iF0WEt9f/mCcwMi9gJFhFa NGcWpRWWqRrqGlXlJRZnpGSW5iZo6uoYGxXm5qcXFiempOYlKxXnJ+7iZGoH/rGRgYdzD+Pu5 3iFGSg0lJlPfI+u2RQnxJ+SmVGYnFGfFFpTmpxYcYZTg4lCR42TcA5QSLUtNTK9Iyc4CBBpOW 4OBREuG9BtLKW1yQmFucmQ6ROsWoy9Fx8+4fJiGWvPy8VClx3jcgRQIgRRmleXAjYEF/iVFWS piXkYGBQYinILUoN7MEVf4VozgHo5Iw7x2QKTyZeSVwm14BHcEEdATPpS0gR5QkIqSkGhi3Bj 5OuWVlkads1XDYYOoRdaENy3Zulvfjve37aeWTAnPdhRlhAiE5Nv4n9/EtaH/52XDynqMLhe4 sjnH/6N1+92nWLYsqPTnr+QJ+q2sV/5UsOK5xWSNU01SwkTF9rf2qNS1fy8/X2h3b9Xzag42X Yt6dNOmavC7U1CuD3Xv3xk0luhuavdOUWIozEg21mIuKEwEcu1cadQIAAA== X-Env-Sender: julien.grall@arm.com X-Msg-Ref: server-3.tower-31.messagelabs.com!1505210632!114366376!1 X-Originating-IP: [217.140.101.70] X-SpamReason: No, hits=0.0 required=7.0 tests= X-StarScan-Received: X-StarScan-Version: 9.4.45; banners=-,-,- X-VirusChecked: Checked Received: (qmail 56488 invoked from network); 12 Sep 2017 10:03:52 -0000 Received: from usa-sjc-mx-foss1.foss.arm.com (HELO foss.arm.com) (217.140.101.70) by server-3.tower-31.messagelabs.com with SMTP; 12 Sep 2017 10:03:52 -0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id E9A2115A2; Tue, 12 Sep 2017 03:03:51 -0700 (PDT) Received: from e108454-lin.cambridge.arm.com (e108454-lin.cambridge.arm.com [10.1.206.53]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 075B43F578; Tue, 12 Sep 2017 03:03:50 -0700 (PDT) From: Julien Grall To: xen-devel@lists.xen.org Date: Tue, 12 Sep 2017 11:03:16 +0100 Message-Id: <20170912100330.2168-11-julien.grall@arm.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20170912100330.2168-1-julien.grall@arm.com> References: <20170912100330.2168-1-julien.grall@arm.com> Cc: andre.przywara@arm.com, Julien Grall , sstabellini@kernel.org Subject: [Xen-devel] [PATCH v2 10/24] xen/arm: traps: Introduce a helper to read the hypersivor fault register X-BeenThere: xen-devel@lists.xen.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: xen-devel-bounces@lists.xen.org Sender: "Xen-devel" While ARM32 has 2 distinct registers for the hypervisor fault register (one for prefetch abort, the other for data abort), AArch64 has only one. Currently, the logic is open-code but a follow-up patch will require to read it too. So move the logic in a separate helper and use it instead of open-coding it. Signed-off-by: Julien Grall Reviewed-by: Andre Przywara Reviewed-by: Stefano Stabellini --- Changes in v2: - Add Andre's reviewed-by --- xen/arch/arm/traps.c | 35 +++++++++++++++++++++++++---------- 1 file changed, 25 insertions(+), 10 deletions(-) diff --git a/xen/arch/arm/traps.c b/xen/arch/arm/traps.c index 967bfea4ed..2e48089d61 100644 --- a/xen/arch/arm/traps.c +++ b/xen/arch/arm/traps.c @@ -2549,6 +2549,28 @@ done: if (first) unmap_domain_page(first); } +/* + * Return the value of the hypervisor fault address register. + * + * On ARM32, the register will be different depending whether the + * fault is a prefetch abort or data abort. + */ +static inline vaddr_t get_hfar(bool is_data) +{ + vaddr_t gva; + +#ifdef CONFIG_ARM_32 + if ( is_data ) + gva = READ_CP32(HDFAR); + else + gva = READ_CP32(HIFAR); +#else + gva = READ_SYSREG(FAR_EL2); +#endif + + return gva; +} + static inline paddr_t get_faulting_ipa(vaddr_t gva) { register_t hpfar = READ_SYSREG(HPFAR_EL2); @@ -2584,11 +2606,7 @@ static void do_trap_instr_abort_guest(struct cpu_user_regs *regs, paddr_t gpa; mfn_t mfn; -#ifdef CONFIG_ARM_32 - gva = READ_CP32(HIFAR); -#else - gva = READ_SYSREG64(FAR_EL2); -#endif + gva = get_hfar(false /* is_data */); /* * If this bit has been set, it means that this instruction abort is caused @@ -2730,11 +2748,8 @@ static void do_trap_data_abort_guest(struct cpu_user_regs *regs, return __do_trap_serror(regs, true); info.dabt = dabt; -#ifdef CONFIG_ARM_32 - info.gva = READ_CP32(HDFAR); -#else - info.gva = READ_SYSREG64(FAR_EL2); -#endif + + info.gva = get_hfar(true /* is_data */); if ( hpfar_is_valid(dabt.s1ptw, fsc) ) info.gpa = get_faulting_ipa(info.gva);