diff mbox series

[PULL,13/18] AArch64: Fix single stepping of ERET instruction

Message ID 1505411573-27848-14-git-send-email-peter.maydell@linaro.org
State Accepted
Commit dddbba9943ef6a81c8702e4a50cb0a8b1a4201fe
Headers show
Series target-arm queue | expand

Commit Message

Peter Maydell Sept. 14, 2017, 5:52 p.m. UTC 
From: Jaroslaw Pelczar <j.pelczar@samsung.com>


Previously when single stepping through ERET instruction via GDB
would result in debugger entering the "next" PC after ERET instruction.
When debugging in kernel mode, this will also cause unintended behavior,
because debugger will try to access memory from EL0 point of view.

Signed-off-by: Jaroslaw Pelczar <j.pelczar@samsung.com>

Message-id: 001c01d32895$483027f0$d89077d0$@samsung.com
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

---
 target/arm/translate-a64.c | 1 +
 1 file changed, 1 insertion(+)

-- 
2.7.4
diff mbox series

Patch

diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c
index 9017e30..1bc12d9 100644
--- a/target/arm/translate-a64.c
+++ b/target/arm/translate-a64.c
@@ -11348,6 +11348,7 @@  static void aarch64_tr_tb_stop(DisasContextBase *dcbase, CPUState *cpu)
         default:
             gen_a64_set_pc_im(dc->pc);
             /* fall through */
+        case DISAS_EXIT:
         case DISAS_JUMP:
             if (dc->base.singlestep_enabled) {
                 gen_exception_internal(EXCP_DEBUG);