From patchwork Tue Sep 19 13:56:17 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: gary guo X-Patchwork-Id: 112997 Delivered-To: patch@linaro.org Received: by 10.140.106.117 with SMTP id d108csp4968672qgf; Tue, 19 Sep 2017 07:13:00 -0700 (PDT) X-Received: by 10.200.27.235 with SMTP id m40mr2292370qtk.228.1505830379887; Tue, 19 Sep 2017 07:12:59 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1505830379; cv=none; d=google.com; s=arc-20160816; b=LzmpVPa7JDhiUjVCwkPDRY4caFyW38djoJV7fSwvXS1AnRGIkKb9Dl8RhNGamQTKau 1OPIRstFrYS4Htp57aCs8nfbPipulwraph/dttymwMv/9gR/uCs3EqPEbiWWOdPrxHfF BxX4//5M0TSsCpy2BxXD1GcZjJoSoXvqX6muRJXYC3QodHkDgGe2zOgE6xzN6COqC5TO Zj9h8dpZZPKAOnZydAWTLOVnf/7F40S56IhS4FX3sprSA6Am7Ksn5WouuSp3iCb6WRqI utE8/QeYmaT2D8OC5myiSzVnKzVxAAiAh+ZY0trwS1J7wpwCeTbv3ZuZj8SQRo52LaqY pM6A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version :list-subscribe:list-help:list-post:list-archive:list-unsubscribe :list-id:precedence:subject:cc:references:in-reply-to:message-id :date:to:from:delivered-to:arc-authentication-results; bh=LsIjwMdVVZ9UbGyFrIEvTm+KBlZKSmeiVP0/5vDJbUg=; b=f5g74nlwokgWFzE4d46fAh04im2zMhwTQ0fLO23NhVoABoi8NSWomev31xSyXqG3lK AekNHd4NwHbmIbTYJU4GevyjlVp2K7h88jdklHMhpb1peR6BdSTWT2oHRQmsPXHec2r5 i07+4qvaMFGFS/qcCH7ArkXsvY8j5iZTFb16u6554zZnIRmzMDHsQ7HlLl9ECrFJcFuI M8qM2za4hrPNFzCQAXW6ikhcoxVIFmaNd1mHlTUFeQRQDHtBRjg0KsNGlcNqZi+m0F01 pzsgZT6h2+wNtVEvz/cbCqIl59tLaB/tMjnBq1MfFcjduTtNFxxPStrx9DtelGAM4jcZ 5MRQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linaro-uefi-bounces@lists.linaro.org designates 54.225.227.206 as permitted sender) smtp.mailfrom=linaro-uefi-bounces@lists.linaro.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.linaro.org (lists.linaro.org. [54.225.227.206]) by mx.google.com with ESMTP id u128si2549643qkc.424.2017.09.19.07.12.59; Tue, 19 Sep 2017 07:12:59 -0700 (PDT) Received-SPF: pass (google.com: domain of linaro-uefi-bounces@lists.linaro.org designates 54.225.227.206 as permitted sender) client-ip=54.225.227.206; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linaro-uefi-bounces@lists.linaro.org designates 54.225.227.206 as permitted sender) smtp.mailfrom=linaro-uefi-bounces@lists.linaro.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: by lists.linaro.org (Postfix, from userid 109) id 6F14762D0D; Tue, 19 Sep 2017 14:12:59 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on ip-10-142-244-252 X-Spam-Level: X-Spam-Status: No, score=-1.4 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL, RCVD_IN_SORBS_SPAM, URIBL_BLOCKED autolearn=disabled version=3.4.0 Received: from [127.0.0.1] (localhost [127.0.0.1]) by lists.linaro.org (Postfix) with ESMTP id 4B3FA62D32; Tue, 19 Sep 2017 14:09:56 +0000 (UTC) X-Original-To: linaro-uefi@lists.linaro.org Delivered-To: linaro-uefi@lists.linaro.org Received: by lists.linaro.org (Postfix, from userid 109) id 344EB62C6C; Tue, 19 Sep 2017 14:05:44 +0000 (UTC) Received: from mail-pg0-f46.google.com (mail-pg0-f46.google.com [74.125.83.46]) by lists.linaro.org (Postfix) with ESMTPS id 5F32962CF0 for ; Tue, 19 Sep 2017 14:05:23 +0000 (UTC) Received: by mail-pg0-f46.google.com with SMTP id 7so2041824pgd.13 for ; Tue, 19 Sep 2017 07:05:23 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=50Amd3U5hbPlrZBvzYD98IG5lVFdMIcFFEtpew74l1o=; b=UE70gEvsl5eGSo7DWBTZ9TC+34o4mgjFcbTfbci8wF5+cEiK0SUtnQ0onErYDOALUe SJrI+5FHRCSCSvQWdZbd67SXC7zbnEIXxayt//qlhAOolmN0Tk9QpkM/p3PAS6a55mDR MNA0jHL3HkeDGrWbH5NeIzT4nK/Qp+hU3ewQQCKAnsIZBPgJPD09BbH1YqCc50p6HGfz qqxepMVOwyN5rjlskC3IFCbl72TZSbxKzuNx/wPRv4ZKwFb/MFy3xWdnuKAZgu6MN37L qEZs/FnlefvoRZQInb8LIgpdsGCf3AhYtyI2FVBKC7vcS7MDGJCUY7NOa1VrEkr7v2Bo v5DA== X-Gm-Message-State: AHPjjUiOq+dJ6DX3uIbPB0ILlhInopDMrQTqgfHrqoyDy/grwZwLCiak c3piEVZlXTmaertiFb9Xo8JiKCTi X-Google-Smtp-Source: AOwi7QCN5JaWBNyjmI+5A4CDIrsTcutdqU6Kb2dJaX7ecmvaLP7vYXDj0vSi6POK3sIrDsHbd/ygkA== X-Received: by 10.84.179.67 with SMTP id a61mr1415633plc.230.1505829922698; Tue, 19 Sep 2017 07:05:22 -0700 (PDT) Received: from localhost.localdomain ([119.145.15.121]) by smtp.gmail.com with ESMTPSA id 13sm4390439pfm.138.2017.09.19.07.05.20 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 19 Sep 2017 07:05:22 -0700 (PDT) From: Heyi Guo To: leif.lindholm@linaro.org, linaro-uefi@lists.linaro.org, graeme.gregory@linaro.org Date: Tue, 19 Sep 2017 21:56:17 +0800 Message-Id: <1505829398-52214-12-git-send-email-heyi.guo@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1505829398-52214-1-git-send-email-heyi.guo@linaro.org> References: <1505829398-52214-1-git-send-email-heyi.guo@linaro.org> Cc: huangming23@huawei.com, zhangjinsong2@huawei.com, guoheyi@huawei.com, Chenhui Sun , wanghuiqiang@huawei.com Subject: [Linaro-uefi] [linaro-uefi v1 11/32] Hisilicon D05: add dbg2 table X-BeenThere: linaro-uefi@lists.linaro.org X-Mailman-Version: 2.1.16 Precedence: list List-Id: "For discussions about Linaro-related UEFI development. Not a substitute for edk2-devel." List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: linaro-uefi-bounces@lists.linaro.org Sender: "Linaro-uefi" From: Chenhui Sun Change-Id: Icf98e5cbf43c837e634fb37407da179d060be692 Signed-off-by: Chenhui Sun --- .../Hi1616/D05AcpiTables/AcpiTablesHi1616.inf | 2 + Chips/Hisilicon/Hi1616/D05AcpiTables/Dbg2.aslc | 86 ++++++++++++++++++++++ Platforms/Hisilicon/D05/D05.dsc | 2 + 3 files changed, 90 insertions(+) create mode 100644 Chips/Hisilicon/Hi1616/D05AcpiTables/Dbg2.aslc diff --git a/Chips/Hisilicon/Hi1616/D05AcpiTables/AcpiTablesHi1616.inf b/Chips/Hisilicon/Hi1616/D05AcpiTables/AcpiTablesHi1616.inf index 5e8f14d..9876a50 100644 --- a/Chips/Hisilicon/Hi1616/D05AcpiTables/AcpiTablesHi1616.inf +++ b/Chips/Hisilicon/Hi1616/D05AcpiTables/AcpiTablesHi1616.inf @@ -36,6 +36,7 @@ D05Slit.aslc D05Srat.aslc D05Spcr.aslc + Dbg2.aslc [Packages] ArmPkg/ArmPkg.dec @@ -55,5 +56,6 @@ gArmTokenSpaceGuid.PcdArmArchTimerIntrNum gArmTokenSpaceGuid.PcdArmArchTimerHypIntrNum gArmTokenSpaceGuid.PcdArmArchTimerVirtIntrNum + gArmPlatformTokenSpaceGuid.PcdSerialDbgRegisterBase gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase diff --git a/Chips/Hisilicon/Hi1616/D05AcpiTables/Dbg2.aslc b/Chips/Hisilicon/Hi1616/D05AcpiTables/Dbg2.aslc new file mode 100644 index 0000000..fb55a07 --- /dev/null +++ b/Chips/Hisilicon/Hi1616/D05AcpiTables/Dbg2.aslc @@ -0,0 +1,86 @@ +/* + * Copyright (c) 2017 Linaro Limited + * Copyright (c) 2017 Hisilicon Limited + * + * All rights reserved. This program and the accompanying materials + * are made available under the terms of the BSD License which accompanies + * this distribution, and is available at + * http://opensource.org/licenses/bsd-license.php + * +*/ + +#include +#include +#include +#include +#include "Hi1616Platform.h" + +#define NUMBER_DEBUG_DEVICE_INFO 1 +#define NUMBER_OF_GENERIC_ADDRESS 1 +#define NAMESPACE_STRING_SIZE 8 +#define UART_LENGTH 0x1000 + +#pragma pack(1) + +typedef struct { + EFI_ACPI_DBG2_DEBUG_DEVICE_INFORMATION_STRUCT DdiHeader; + EFI_ACPI_6_1_GENERIC_ADDRESS_STRUCTURE Address[NUMBER_OF_GENERIC_ADDRESS]; + UINT32 AddressSize[NUMBER_OF_GENERIC_ADDRESS]; + CHAR8 NamespaceString[NAMESPACE_STRING_SIZE]; +} EFI_ACPI_DBG2_DDI_STRUCT; + +typedef struct { + EFI_ACPI_DEBUG_PORT_2_DESCRIPTION_TABLE Desc; + EFI_ACPI_DBG2_DDI_STRUCT Ddi[NUMBER_DEBUG_DEVICE_INFO]; +} EFI_ACPI_DEBUG_PORT_2_TABLE; + +#pragma pack() + +EFI_ACPI_DEBUG_PORT_2_TABLE Dbg2 = { + { + ARM_ACPI_HEADER( + EFI_ACPI_6_1_DEBUG_PORT_2_TABLE_SIGNATURE, + EFI_ACPI_DEBUG_PORT_2_TABLE, + EFI_ACPI_DEBUG_PORT_2_TABLE_REVISION + ), + OFFSET_OF(EFI_ACPI_DEBUG_PORT_2_TABLE, Ddi), + NUMBER_DEBUG_DEVICE_INFO + }, + { + { + { + EFI_ACPI_DBG2_DEBUG_DEVICE_INFORMATION_STRUCT_REVISION, + sizeof(EFI_ACPI_DBG2_DDI_STRUCT), + NUMBER_OF_GENERIC_ADDRESS, + NAMESPACE_STRING_SIZE, + OFFSET_OF(EFI_ACPI_DBG2_DDI_STRUCT, NamespaceString), + 0, //OemDataLength + 0, //OemDataOffset + EFI_ACPI_DBG2_PORT_TYPE_SERIAL, + EFI_ACPI_DBG2_PORT_SUBTYPE_SERIAL_FULL_16550, + {EFI_ACPI_RESERVED_BYTE, EFI_ACPI_RESERVED_BYTE}, + OFFSET_OF(EFI_ACPI_DBG2_DDI_STRUCT, Address), + OFFSET_OF(EFI_ACPI_DBG2_DDI_STRUCT, AddressSize), + }, + { + { + EFI_ACPI_6_1_SYSTEM_MEMORY, + 32, + 0, + EFI_ACPI_6_1_BYTE, + FixedPcdGet64 (PcdSerialDbgRegisterBase) + } + }, + { + UART_LENGTH + }, + "COM1" + } + } +}; + +// +// Reference the table being generated to prevent the optimizer from removing the +// data structure from the executable +// +VOID* CONST ReferenceAcpiTable = &Dbg2; diff --git a/Platforms/Hisilicon/D05/D05.dsc b/Platforms/Hisilicon/D05/D05.dsc index ffa1897..8191459 100644 --- a/Platforms/Hisilicon/D05/D05.dsc +++ b/Platforms/Hisilicon/D05/D05.dsc @@ -179,6 +179,8 @@ # use the TTY terminal type (which has a working backspace) gEfiMdePkgTokenSpaceGuid.PcdDefaultTerminalType|4 + ## Serial Debug UART + gArmPlatformTokenSpaceGuid.PcdSerialDbgRegisterBase|0xD00C0000 gHisiTokenSpaceGuid.PcdM3SmmuBaseAddress|0xa0040000 gHisiTokenSpaceGuid.PcdPcieSmmuBaseAddress|0xb0040000