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[54.225.227.206]) by mx.google.com with ESMTP id h190si3264425qkd.340.2017.09.19.07.18.20; Tue, 19 Sep 2017 07:18:21 -0700 (PDT) Received-SPF: pass (google.com: domain of linaro-uefi-bounces@lists.linaro.org designates 54.225.227.206 as permitted sender) client-ip=54.225.227.206; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linaro-uefi-bounces@lists.linaro.org designates 54.225.227.206 as permitted sender) smtp.mailfrom=linaro-uefi-bounces@lists.linaro.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: by lists.linaro.org (Postfix, from userid 109) id A33D562DF9; Tue, 19 Sep 2017 14:18:20 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on ip-10-142-244-252 X-Spam-Level: X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL, URIBL_BLOCKED autolearn=disabled version=3.4.0 Received: from [127.0.0.1] (localhost [127.0.0.1]) by lists.linaro.org (Postfix) with ESMTP id 293E76445D; Tue, 19 Sep 2017 14:11:07 +0000 (UTC) X-Original-To: linaro-uefi@lists.linaro.org Delivered-To: linaro-uefi@lists.linaro.org Received: by lists.linaro.org (Postfix, from userid 109) id 66AF862C7E; Tue, 19 Sep 2017 14:06:07 +0000 (UTC) Received: from mail-pg0-f54.google.com (mail-pg0-f54.google.com [74.125.83.54]) by lists.linaro.org (Postfix) with ESMTPS id A3AF960F34 for ; Tue, 19 Sep 2017 14:05:53 +0000 (UTC) Received: by mail-pg0-f54.google.com with SMTP id v23so2055373pgc.5 for ; Tue, 19 Sep 2017 07:05:53 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=/b5NR//Fpohqo4foAkISyK5PRmcS+J5vyEpFfz0J5HE=; b=m6Libple9L0TX9BQVel3a/KqrUCsxBxHqgoOEHADDPY0nJH4TrpjVZ9laoyP0YGnqH vq9PsREcyWtbci2kvyslgG5wWhmldtofqBIXWbftqVnDBd8/40BgS7ha5jh+bMXnJR// nxxlL4A3s2D04AMg3U+A1LW9Xn4bIvWdR0w+e9wNui4B5ZwJEcIPFs4MWHHDFl/iWuSa tDzh9E79d3POtvnIRfljUp+0OBIYmdhU7/VjqEZnMOmEL3CxB09zEDbzwjs+h/KIB09r 7cOBJkojs+JtiHWnVvG6okHdPIyj/WckB9a63efcDg8nfhYoSxelk6xLr1kBNa2Ju6ys EEVQ== X-Gm-Message-State: AHPjjUjStr9eqDR8n3Tdub1PmTYt9Y3k4nDrtuGVc3db/JC51Ixn26Xr /+HzYYa6hIw640iRBnNyi0chMQZB X-Google-Smtp-Source: AOwi7QBFcxO/a7RxbqUT/suRT8yH7EvgRSisQJOxJssQr+iSZg0tqPmk+wngTZzCCGfSsLr501ktNQ== X-Received: by 10.98.58.210 with SMTP id v79mr1422538pfj.131.1505829952952; Tue, 19 Sep 2017 07:05:52 -0700 (PDT) Received: from localhost.localdomain ([119.145.15.121]) by smtp.gmail.com with ESMTPSA id 13sm4390439pfm.138.2017.09.19.07.05.50 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 19 Sep 2017 07:05:52 -0700 (PDT) From: Heyi Guo To: leif.lindholm@linaro.org, linaro-uefi@lists.linaro.org, graeme.gregory@linaro.org Date: Tue, 19 Sep 2017 21:56:29 +0800 Message-Id: <1505829398-52214-24-git-send-email-heyi.guo@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1505829398-52214-1-git-send-email-heyi.guo@linaro.org> References: <1505829398-52214-1-git-send-email-heyi.guo@linaro.org> Cc: huangming23@huawei.com, zhangjinsong2@huawei.com, wangzhou , guoheyi@huawei.com, wanghuiqiang@huawei.com Subject: [Linaro-uefi] [linaro-uefi v1 23/32] Hisilicon/D05: add map for PCIe0 in smmu node X-BeenThere: linaro-uefi@lists.linaro.org X-Mailman-Version: 2.1.16 Precedence: list List-Id: "For discussions about Linaro-related UEFI development. Not a substitute for edk2-devel." List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: linaro-uefi-bounces@lists.linaro.org Sender: "Linaro-uefi" From: huangming Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: wangzhou --- Chips/Hisilicon/Hi1616/D05AcpiTables/D05Iort.asl | 13 ++++++++++--- 1 file changed, 10 insertions(+), 3 deletions(-) diff --git a/Chips/Hisilicon/Hi1616/D05AcpiTables/D05Iort.asl b/Chips/Hisilicon/Hi1616/D05AcpiTables/D05Iort.asl index be47671..f62b4fc 100644 --- a/Chips/Hisilicon/Hi1616/D05AcpiTables/D05Iort.asl +++ b/Chips/Hisilicon/Hi1616/D05AcpiTables/D05Iort.asl @@ -220,8 +220,15 @@ [0004] Output Reference : 00000064 [0004] Flags (decoded below) : 00000000 Single Mapping : 0 +/* this is the map for PCIe0 in 1P NB */ +[0004] Input base : 00008800 +[0004] ID Count : 00000800 +[0004] Output Base : 00008800 +[0004] Output Reference : 00000064 +[0004] Flags (decoded below) : 00000000 + Single Mapping : 0 -//234 +//248 /* 2P NA PCIe SMMU */ [0001] Type : 04 [0002] Length : 0050 @@ -581,7 +588,7 @@ [0004] Input base : 00008800 [0004] ID Count : 00000800 [0004] Output Base : 00008800 -[0004] Output Reference : 0000007c +[0004] Output Reference : 000001e4 [0004] Flags (decoded below) : 00000000 Single Mapping : 0 @@ -695,7 +702,7 @@ [0004] Input base : 00001000 [0004] ID Count : 00001000 [0004] Output Base : 00021000 -[0004] Output Reference : 00000234 +[0004] Output Reference : 00000248 [0004] Flags (decoded below) : 00000000 Single Mapping : 0