From patchwork Thu Sep 21 14:30:10 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jean-Jacques Hiblot X-Patchwork-Id: 113268 Delivered-To: patch@linaro.org Received: by 10.140.106.117 with SMTP id d108csp2112623qgf; Thu, 21 Sep 2017 07:45:52 -0700 (PDT) X-Google-Smtp-Source: AOwi7QAZ5+MNip+bzTqAGsuurtyxTSGmMabC9fYDgqF9I0rcAgGT6Zkgv1+X9wjLhaQTlTlXZqy5 X-Received: by 10.80.150.69 with SMTP id y63mr1462202eda.75.1506005152472; Thu, 21 Sep 2017 07:45:52 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1506005152; cv=none; d=google.com; s=arc-20160816; b=kOhj9D/tpMc7QlX9eZB5pwTESrOfBi6hWeH9iGEvSnxgVfewwJoBgWhdefICDrtsAS pvJwlzX25wg8Al8v6D6VBrrSyq4e1TYo1xvW8eripdoh3U69agGGSSA9wEK3TwsXe9Nk rG0R2oqCizScuQNbrZDsm7nlAZlJGMjlH6QaZY3y0S5xxJIL8xpSGGRiNt8c4rn1h2S9 fJuE7Ui85W3/N/wak53465Y6LbpV4Ab+KJ2GEa8anwUokIa1B1d6l1HryuKdjw0y69rq hXD+pNQ+fXuWV51t4gm8HagQ+pW+RS/6MPEEV/AW5GbjlFtDzJp+H69AA+494sDy6o0K B0Fg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:list-subscribe:list-help :list-post:list-archive:list-unsubscribe:list-id:precedence:subject :cc:mime-version:references:in-reply-to:message-id:date:to:from :dkim-signature:arc-authentication-results; bh=FHywQd5e4pRa4+PC63CKDOE01x+SQw2SzFY+a0Tunew=; b=ZDcsi66KKIHSwA2ywh/EsKCtTflqzsttwQm2QwxxplcyyhmnMcNQFS9P6iWx8YMIR0 zVOcYDlBUpFToqsM9xH1OJPkmFA5i+WtV2LQqKbdXT+mQvMbCsaxMANQoUDj0Rqks3CU Ne2+I4WsLs6FhWqQrJwZS9O1A8QD9o4nzPvUcv5Fck+bUP1/bgLNU0YVBk0aHTj3ShB1 wL3coriu99sU3oAesN6qHxno+vyXvIxLYd4Jt/1puUD0ReV6D5/o/P9Da12ecDjG+pbs RkWHQfjPgyTVS8Z9ZUDZPRUzGvgrvNWgHLDDkIv6PEz5qHwaFhGDEbzoCdkRvf5QVIRh cRWg== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@ti.com header.s=ti-com-17Q1 header.b=v1PCcgHX; spf=pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 81.169.180.215 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=fail (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from lists.denx.de (dione.denx.de. [81.169.180.215]) by mx.google.com with ESMTP id a10si1521946edh.459.2017.09.21.07.45.52; Thu, 21 Sep 2017 07:45:52 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 81.169.180.215 as permitted sender) client-ip=81.169.180.215; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@ti.com header.s=ti-com-17Q1 header.b=v1PCcgHX; spf=pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 81.169.180.215 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=fail (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: by lists.denx.de (Postfix, from userid 105) id EC5A5C2208D; Thu, 21 Sep 2017 14:34:43 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=RCVD_IN_DNSWL_NONE, T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id A7755C21E3B; Thu, 21 Sep 2017 14:32:08 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id E0354C21E78; Thu, 21 Sep 2017 14:31:18 +0000 (UTC) Received: from lelnx194.ext.ti.com (lelnx194.ext.ti.com [198.47.27.80]) by lists.denx.de (Postfix) with ESMTPS id 98BF7C22012 for ; Thu, 21 Sep 2017 14:31:12 +0000 (UTC) Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by lelnx194.ext.ti.com (8.15.1/8.15.1) with ESMTP id v8LEVAbx002971; Thu, 21 Sep 2017 09:31:10 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ti.com; s=ti-com-17Q1; t=1506004270; bh=aDxGCQF+JQ6H5+zNl3D4EQ+pWu9BLualohyPFFbj11o=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=v1PCcgHX5FXH53OgEIKdi85u761emw+FuVwNDdCHKeDMShav0cklkilHHvtn8BHNn mPHZqLlpC9Rb07hyXJB2NHBJOJlK4zb32rNmAKZuZmyyWkzhI/y4QUatE0WLdmTdg+ xsvZRSZKrfcIQMxg2e+PgvaMc6a0QAijmemE6v/o= Received: from DFLE108.ent.ti.com (dfle108.ent.ti.com [10.64.6.29]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id v8LEVAUb020674; Thu, 21 Sep 2017 09:31:10 -0500 Received: from DFLE109.ent.ti.com (10.64.6.30) by DFLE108.ent.ti.com (10.64.6.29) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384_P256) id 15.1.845.34; Thu, 21 Sep 2017 09:31:10 -0500 Received: from dlep33.itg.ti.com (157.170.170.75) by DFLE109.ent.ti.com (10.64.6.30) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.845.34 via Frontend Transport; Thu, 21 Sep 2017 09:31:10 -0500 Received: from localhost (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep33.itg.ti.com (8.14.3/8.13.8) with ESMTP id v8LEV8c6012050; Thu, 21 Sep 2017 09:31:09 -0500 From: Jean-Jacques Hiblot To: , , , Date: Thu, 21 Sep 2017 16:30:10 +0200 Message-ID: <1506004213-22620-24-git-send-email-jjhiblot@ti.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1506004213-22620-1-git-send-email-jjhiblot@ti.com> References: <1506004213-22620-1-git-send-email-jjhiblot@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Cc: u-boot@lists.denx.de Subject: [U-Boot] [PATCH v2 23/26] mmc: Retry some MMC cmds on failure X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" From: Kishon Vijay Abraham I With certain SD cards like Kingston 8GB/16GB UHS card, it is seen that MMC_CMD_ALL_SEND_CID cmd fails on first attempt, but succeeds subsequently. Therefore, retry MMC_CMD_ALL_SEND_CID cmd a few time as done in Linux kernel. Similarly, it is seen that MMC_CMD_SET_BLOCKLEN may fail on first attempt, therefore retry this cmd a few times as done in kernel. To make it clear that those are optionnal workarounds, a new Kconfig option 'MMC_QUIRKS' is added (enabled by default). Signed-off-by: Vignesh R Signed-off-by: Kishon Vijay Abraham I Signed-off-by: Jean-Jacques Hiblot --- drivers/mmc/Kconfig | 9 +++++++++ drivers/mmc/mmc.c | 41 +++++++++++++++++++++++++++++++++++++++-- include/mmc.h | 4 ++++ 3 files changed, 52 insertions(+), 2 deletions(-) diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig index 3d577e0..78e58d4 100644 --- a/drivers/mmc/Kconfig +++ b/drivers/mmc/Kconfig @@ -33,6 +33,15 @@ config SPL_DM_MMC if MMC +config MMC_QUIRKS + bool "Enable quirks" + default y + help + Some cards and hosts may sometimes behave unexpectedly (quirks). + This option enable workarounds to handle those quirks. Some of them + are enabled by default, other may require additionnal flags or are + enabled by the host driver. + config MMC_VERBOSE bool "Output more information about the MMC" default y diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c index c5eaeaf..6d1bf94 100644 --- a/drivers/mmc/mmc.c +++ b/drivers/mmc/mmc.c @@ -279,6 +279,7 @@ int mmc_send_status(struct mmc *mmc, int timeout) int mmc_set_blocklen(struct mmc *mmc, int len) { struct mmc_cmd cmd; + int err; if (mmc->ddr_mode) return 0; @@ -287,7 +288,24 @@ int mmc_set_blocklen(struct mmc *mmc, int len) cmd.resp_type = MMC_RSP_R1; cmd.cmdarg = len; - return mmc_send_cmd(mmc, &cmd, NULL); + err = mmc_send_cmd(mmc, &cmd, NULL); + +#ifdef CONFIG_MMC_QUIRKS + if (err && (mmc->quirks & MMC_QUIRK_RETRY_SET_BLOCKLEN)) { + int retries = 4; + /* + * It has been seen that SET_BLOCKLEN may fail on the first + * attempt, let's try a few more time + */ + do { + err = mmc_send_cmd(mmc, &cmd, NULL); + if (!err) + break; + } while (retries--); + } +#endif + + return err; } static int mmc_read_blocks(struct mmc *mmc, void *dst, lbaint_t start, @@ -1881,7 +1899,6 @@ static int mmc_startup(struct mmc *mmc) cmd.resp_type = MMC_RSP_R1; cmd.cmdarg = 1; err = mmc_send_cmd(mmc, &cmd, NULL); - if (err) return err; } @@ -1895,6 +1912,21 @@ static int mmc_startup(struct mmc *mmc) err = mmc_send_cmd(mmc, &cmd, NULL); +#ifdef CONFIG_MMC_QUIRKS + if (err && (mmc->quirks & MMC_QUIRK_RETRY_SEND_CID)) { + int retries = 4; + /* + * It has been seen that SEND_CID may fail on the first + * attempt, let's try a few more time + */ + do { + err = mmc_send_cmd(mmc, &cmd, NULL); + if (!err) + break; + } while (retries--); + } +#endif + if (err) return err; @@ -2239,6 +2271,11 @@ int mmc_start_init(struct mmc *mmc) if (err) return err; +#ifdef CONFIG_MMC_QUIRKS + mmc->quirks = MMC_QUIRK_RETRY_SET_BLOCKLEN | + MMC_QUIRK_RETRY_SEND_CID; +#endif + err = mmc_power_cycle(mmc); if (err) { /* diff --git a/include/mmc.h b/include/mmc.h index a8901bf..a9ebc88 100644 --- a/include/mmc.h +++ b/include/mmc.h @@ -306,6 +306,9 @@ static inline bool mmc_is_tuning_cmd(uint cmdidx) #define ENHNCD_SUPPORT (0x2) #define PART_ENH_ATTRIB (0x1f) +#define MMC_QUIRK_RETRY_SEND_CID BIT(0) +#define MMC_QUIRK_RETRY_SET_BLOCKLEN BIT(1) + enum mmc_voltage { MMC_SIGNAL_VOLTAGE_000 = 0, MMC_SIGNAL_VOLTAGE_120, @@ -591,6 +594,7 @@ struct mmc { * operating mode due to limitations when * accessing the boot partitions */ + u32 quirks; }; struct mmc_hwpart_conf {