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[209.132.180.67]) by mx.google.com with ESMTP id 1si1310791pli.46.2017.09.21.09.51.08; Thu, 21 Sep 2017 09:51:08 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=b0Zcf9RD; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752007AbdIUQvE (ORCPT + 26 others); Thu, 21 Sep 2017 12:51:04 -0400 Received: from mail-wm0-f44.google.com ([74.125.82.44]:49812 "EHLO mail-wm0-f44.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751894AbdIUQtx (ORCPT ); Thu, 21 Sep 2017 12:49:53 -0400 Received: by mail-wm0-f44.google.com with SMTP id r74so3554156wme.4 for ; Thu, 21 Sep 2017 09:49:52 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=tvRW2ZSF2XUBLk395jXryNnxHAWgY9ROCgPUaZMbC8w=; b=b0Zcf9RDIC0Z3oZ1s9sgkofgD01KIrBN86LEizAIsR/mVXQxRYo0GNaPIW9hAfCjop ofy5cQ5SZyua4B5s01KSolIYhZxXk/oMWdZqKJ1LjXh0y/aguM1D+45bXb3mvivd4gHh +Ney5sDf2VjVVMUX5tZnpC/IIdbA+m9arof9Q= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=tvRW2ZSF2XUBLk395jXryNnxHAWgY9ROCgPUaZMbC8w=; b=lWhSvSk5PX8ywIhK1F9ODTnuK/2nMxXTvTBA4HDxysyh7pz30HOK13b1XA+vEy0X+a OCr7XwHhIEmZOzYhHIqMQzxUPr7V4PZ6X4HTVcY6xKiNNZl5FZHNc0CjzZXMkJ/SeY+h akVRnmLKy/AbAMt0N9NhUp0EOavCwWVWA+JYKS40cuuQOC/UfzXkVQRPJ/mKd6ybOLs8 wpkkisq5qaGQ/pAUmR/wE8wGDvivA0x0uPLbHhNX50YfWxpyKWwFnaSTBeVV+ZGKwG7i AdPW0vq3NR7A07QynUvZ3mm3lF/C6Endu/QBzm2dsyXOgWID8IPL1BLQVC2igXRFGY/s MaNA== X-Gm-Message-State: AHPjjUiUl/8ScSWAmC0fYoko5mU7NcYw95HNex5lyr5lC/t65cEOR6F3 lsVoNFBqbjYjl0oR1iaWnAV+9Q== X-Google-Smtp-Source: AOwi7QAypNwlOOYlEjOs0ajb8tXIb9ZkYNxbcZlTSqM44NPoySFxbp9jq8FxQW0tBkX12A4ZD8YP8w== X-Received: by 10.80.241.22 with SMTP id w22mr1865215edl.188.1506012591954; Thu, 21 Sep 2017 09:49:51 -0700 (PDT) Received: from mms-0441.qualcomm.mm-sol.com ([212.45.67.2]) by smtp.googlemail.com with ESMTPSA id i16sm993311edj.29.2017.09.21.09.49.50 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 21 Sep 2017 09:49:51 -0700 (PDT) From: Georgi Djakov To: sboyd@codeaurora.org, jassisinghbrar@gmail.com, bjorn.andersson@linaro.org, robh+dt@kernel.org Cc: mturquette@baylibre.com, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, georgi.djakov@linaro.org Subject: [PATCH v9 6/7] dt-bindings: clock: Document qcom,apcs binding Date: Thu, 21 Sep 2017 19:49:39 +0300 Message-Id: <20170921164940.20343-7-georgi.djakov@linaro.org> X-Mailer: git-send-email 2.14.1 In-Reply-To: <20170921164940.20343-1-georgi.djakov@linaro.org> References: <20170921164940.20343-1-georgi.djakov@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add device-tree binding documentation for the Qualcom APCS clock controller. This clock controller is a mux and half-integer divider and provides the clock for the application CPU. Signed-off-by: Georgi Djakov --- .../devicetree/bindings/clock/qcom,apcs.txt | 27 ++++++++++++++++++++++ 1 file changed, 27 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/qcom,apcs.txt diff --git a/Documentation/devicetree/bindings/clock/qcom,apcs.txt b/Documentation/devicetree/bindings/clock/qcom,apcs.txt new file mode 100644 index 000000000000..8083bcc33ebe --- /dev/null +++ b/Documentation/devicetree/bindings/clock/qcom,apcs.txt @@ -0,0 +1,27 @@ +Qualcomm APCS Clock Controller Binding +-------------------------------------- +The APCS hardware block provides a combined mux and half-integer divider +functionality. It is used for a main CPU clock mux on MSM8916 platforms. + +Required properties : +- compatible : shall contain only one of the following: + + "qcom,msm8916-apcs-clk" + +- clocks : shall be the phandle to the main input CPU PLL clock + +- #clock-cells : must be set to <0> + +Example: + + apcs: mailbox@b011000 { + compatible = "qcom,msm8916-apcs-kpss-global"; + reg = <0xb011000 0x1000>; + #mbox-cells = <1>; + + apcs_clk: apcs_clk { + compatible = "qcom,msm8916-apcs-clk"; + clocks = <&a53pll>; + #clock-cells = <0>; + }; + };