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Tue, 03 Oct 2017 11:00:31 +0100 (BST) From: Marek Szyprowski To: linux-clk@vger.kernel.org, linux-samsung-soc@vger.kernel.org Cc: Marek Szyprowski , Sylwester Nawrocki , Chanwoo Choi , Krzysztof Kozlowski , Bartlomiej Zolnierkiewicz Subject: [PATCH 8/9] clk: samsung: Add explicit MPLL and EPLL clkdev aliases in S3C2443 driver Date: Tue, 03 Oct 2017 12:00:15 +0200 Message-id: <20171003100016.32029-9-m.szyprowski@samsung.com> X-Mailer: git-send-email 2.14.2 In-reply-to: <20171003100016.32029-1-m.szyprowski@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFtrEIsWRmVeSWpSXmKPExsWy7djPc7oH4i9HGhxeyG+xccZ6VovrX56z Wpw/v4Hd4mPPPVaLGef3MVmsPXKX3eLwm3ZWB3aPTas62Tz6tqxi9Pi8SS6AOYrLJiU1J7Ms tUjfLoEro3NbG3vBJOGK/QeWsTQwfubvYuTkkBAwkbjx6gYjhC0mceHeerYuRi4OIYGljBI3 224wQTifGSWe/N3G2sXIAdbx4jQXRHwZo8SG5duZIZwGJomm46dZQUaxCRhKdL3tYgOxRQQc JD5/es0IUsQs8JRR4sSh50wgCWGBBIndZ5cygkxlEVCVWHhSAiTMK2ArsWHvJ2aIk+Ql3i+4 D3Yep4CdxOKPy1lB5kgIdLBJbOpcxwZR5CLx6WoLO4QtLPHq+BYoW0bi8uRuFgi7n1GiqVUb wp7BKHHuLS+EbS1x+PhFsKOZBfgkJm2bzgzxJa9ER5sQRImHxK8vX6HGOEqsmfUK7B4hgYmM Eg/fWU5glF7AyLCKUSS1tDg3PbXYVK84Mbe4NC9dLzk/dxMjMCZP/zv+dQfj0mNWhxgFOBiV eHh3eFyKFGJNLCuuzD3EKMHBrCTCO83rcqQQb0piZVVqUX58UWlOavEhRmkOFiVxXtuotkgh gfTEktTs1NSC1CKYLBMHp1QD427VN+IBCxbuXtHoP6H7wd7TU2r9U/tf7taKvB+79rG3RaTv 9zXCPRdfmLI3xmh3B5xtnLvc7nhnUMi6jgXl8bvryjmMTpkdfrpb9LLNesMejSXrfvnmbZZl tHojaRZ1Q3bhLe/nyk+2W7DMYXotmLrIwa/iyEx/68lcNy4J3fNzEF6YMfH+FCWW4oxEQy3m ouJEAJ0C6+zFAgAA X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFupgluLIzCtJLcpLzFFi42I5/e/4Fd398ZcjDTr/GVhsnLGe1eL6l+es FufPb2C3+Nhzj9Vixvl9TBZrj9xltzj8pp3Vgd1j06pONo++LasYPT5vkgtgjuKySUnNySxL LdK3S+DK6NzWxl4wSbhi/4FlLA2Mn/m7GDk4JARMJF6c5upi5AQyxSQu3FvP1sXIxSEksIRR 4u2J64wQThOTxJ3G5SwgVWwChhJdb7vYQGwRAQeJz59egxUxCzxllDj+dipYkbBAgsSlht1M IBtYBFQlFp6UAAnzCthKbNj7iRlim7zE+wX3GUFsTgE7icUfl7OC2EJANY3zVzFPYORdwMiw ilEktbQ4Nz232EivODG3uDQvXS85P3cTIzB8th37uWUHY9e74EOMAhyMSjy8OzwuRQqxJpYV V+YeYpTgYFYS4Z3mdTlSiDclsbIqtSg/vqg0J7X4EKM0B4uSOG/vntWRQgLpiSWp2ampBalF MFkmDk6pBkaPGMdlOaaLZYIqOyU8d/vIZr/7x/yid+Fsz3z/HpXWqJ1qrff4AyNbvt68Vfzt sMhUlXWbXx/y3dfa/edMhVXTa5PaDdu1Duyx9Tvk9PiV44FCwWDDzx3bPZK87877rO+h8lg+ 2EbUqfx3yI7Eu0s+vl0axJ9m+lvO4A/7X5dlDm92nY8TuarEUpyRaKjFXFScCAAEwxFnGwIA AA== X-CMS-MailID: 20171003100031eucas1p142552d25c13db986a50951c988073223 X-Msg-Generator: CA X-Sender-IP: 182.198.249.180 X-Local-Sender: =?utf-8?q?Marek_Szyprowski=1BSRPOL-Kernel_=28TP=29=1B?= =?utf-8?b?7IK87ISx7KCE7J6QG1NlbmlvciBTb2Z0d2FyZSBFbmdpbmVlcg==?= X-Global-Sender: =?utf-8?q?Marek_Szyprowski=1BSRPOL-Kernel_=28TP=29=1BSam?= =?utf-8?q?sung_Electronics=1BSenior_Software_Engineer?= X-Sender-Code: =?utf-8?q?C10=1BEHQ=1BC10CD02CD027392?= CMS-TYPE: 201P X-CMS-RootMailID: 20171003100031eucas1p142552d25c13db986a50951c988073223 X-RootMTR: 20171003100031eucas1p142552d25c13db986a50951c988073223 References: <20171003100016.32029-1-m.szyprowski@samsung.com> Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org S3C2443 platform still use non-dt based lookup in some of its drivers to get MPLL and EPLL clocks. Till now it worked only because PLL() macro implicitely created aliases for all instatiated clocks. This feature will be removed, so explicitely create aliases for MPLL and EPLL clocks. Signed-off-by: Marek Szyprowski --- drivers/clk/samsung/clk-s3c2443.c | 10 ++++++---- include/dt-bindings/clock/s3c2443.h | 2 ++ 2 files changed, 8 insertions(+), 4 deletions(-) -- 2.14.2 -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Acked-by: Chanwoo Choi diff --git a/drivers/clk/samsung/clk-s3c2443.c b/drivers/clk/samsung/clk-s3c2443.c index 45166033f638..d94b85a42356 100644 --- a/drivers/clk/samsung/clk-s3c2443.c +++ b/drivers/clk/samsung/clk-s3c2443.c @@ -191,6 +191,8 @@ struct samsung_gate_clock s3c2443_common_gates[] __initdata = { struct samsung_clock_alias s3c2443_common_aliases[] __initdata = { ALIAS(MSYSCLK, NULL, "msysclk"), ALIAS(ARMCLK, NULL, "armclk"), + ALIAS(MPLL, NULL, "mpll"), + ALIAS(EPLL, NULL, "epll"), ALIAS(HCLK, NULL, "hclk"), ALIAS(HCLK_SSMC, NULL, "nand"), ALIAS(PCLK_UART0, "s3c2440-uart.0", "uart"), @@ -223,9 +225,9 @@ struct samsung_clock_alias s3c2443_common_aliases[] __initdata = { /* S3C2416 specific clocks */ static struct samsung_pll_clock s3c2416_pll_clks[] __initdata = { - [mpll] = PLL(pll_6552_s3c2416, 0, "mpll", "mpllref", + [mpll] = PLL(pll_6552_s3c2416, MPLL, "mpll", "mpllref", LOCKCON0, MPLLCON, NULL), - [epll] = PLL(pll_6553, 0, "epll", "epllref", + [epll] = PLL(pll_6553, EPLL, "epll", "epllref", LOCKCON1, EPLLCON, NULL), }; @@ -277,9 +279,9 @@ struct samsung_clock_alias s3c2416_aliases[] __initdata = { /* S3C2443 specific clocks */ static struct samsung_pll_clock s3c2443_pll_clks[] __initdata = { - [mpll] = PLL(pll_3000, 0, "mpll", "mpllref", + [mpll] = PLL(pll_3000, MPLL, "mpll", "mpllref", LOCKCON0, MPLLCON, NULL), - [epll] = PLL(pll_2126, 0, "epll", "epllref", + [epll] = PLL(pll_2126, EPLL, "epll", "epllref", LOCKCON1, EPLLCON, NULL), }; diff --git a/include/dt-bindings/clock/s3c2443.h b/include/dt-bindings/clock/s3c2443.h index 37e66b054d64..f3ba68a25ecb 100644 --- a/include/dt-bindings/clock/s3c2443.h +++ b/include/dt-bindings/clock/s3c2443.h @@ -26,6 +26,8 @@ #define ARMCLK 4 #define HCLK 5 #define PCLK 6 +#define MPLL 7 +#define EPLL 8 /* Special clocks */ #define SCLK_HSSPI0 16