From patchwork Thu Oct 5 02:30:57 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Masahiro Yamada X-Patchwork-Id: 114822 Delivered-To: patch@linaro.org Received: by 10.140.22.163 with SMTP id 32csp92819qgn; Wed, 4 Oct 2017 19:32:22 -0700 (PDT) X-Google-Smtp-Source: AOwi7QCfD9bvu7zHFNi6C51hCfmKFApu7K+t3d94DRNqZ0x2CelO2r/jdA2GV1GydmlUd5c/irLq X-Received: by 10.84.225.145 with SMTP id u17mr15694700plj.369.1507170742774; Wed, 04 Oct 2017 19:32:22 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1507170742; cv=none; d=google.com; s=arc-20160816; b=UENkgJvjaABtE0aWusPiaC7zH/fHBlyq4ZS7mXNLS2YXaw686+MSUrC5zkZhuVIrHH lTVqt4gshwZV8xu7fQuMCTAFNHpQcLRGBaDchMFzGa6PW+CkCLCByxrhNhGt//O72ayW joE5zz1SQnDu2Vw4AHzs7eBzt72KtI5MkDR/0W5z3q0mBmcSVbSUuYUWEkF/9Ptq/Bz2 6K1QqsiXMLRxNy9PjoDrjbyG2u1WWAPX9Zp3E9pu7dhb1Xy7hsww8kdkW74qrgybG2CR +8nAdm+lLXjZmriNs7ulkPZMO0t+QgrE0UPq4kcO1zTJ9DIsdiIp/a7ULZJbzdTbvFT1 95ag== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:message-id:date:subject:cc:to:from :dkim-signature:dkim-filter:arc-authentication-results; bh=20Qb2en9TUdZG+ymtlupVjFaEmNHsJsuyyuzqH79vmA=; b=0YOgzFFuwac4jqyohNSbzOCyGWJzwRsU/OGQbUofL6OjxZThVCqfF+z3FtQ2eG3Mhy tz4Q2A5XhsumL2C3C/q7tMCmJ35ybfoVRUQ6CaRWy88w9xMWVVEGDocJvc2kyFwPzbo0 Q0T7iMzX4GBh9Y3G+MVTEfQrhj7nzH6UXpgL5w5vlAqJ1j11DaVMksmBqTQhx5g/bjxD gsf8NlIKKQCng303ZbkdpkoRjhOhV9B0F0u9LAyS1n44/kLek42iJaYhB4kxfTfwEyKs a4C34AEgdvFBgtc8KChdoGHPcSmi6ccMkfFQGV6Pc6MKVpdOrte4P16i80P32CdpK9e2 lYrQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@nifty.com header.s=dec2015msa header.b=ljtGgEWw; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id m63si12910701pld.173.2017.10.04.19.32.21; Wed, 04 Oct 2017 19:32:22 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@nifty.com header.s=dec2015msa header.b=ljtGgEWw; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751253AbdJECcT (ORCPT + 6 others); Wed, 4 Oct 2017 22:32:19 -0400 Received: from conuserg-07.nifty.com ([210.131.2.74]:57941 "EHLO conuserg-07.nifty.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751234AbdJECcT (ORCPT ); Wed, 4 Oct 2017 22:32:19 -0400 Received: from pug.e01.socionext.com (p14092-ipngnfx01kyoto.kyoto.ocn.ne.jp [153.142.97.92]) (authenticated) by conuserg-07.nifty.com with ESMTP id v952V7ql016133; Thu, 5 Oct 2017 11:31:07 +0900 DKIM-Filter: OpenDKIM Filter v2.10.3 conuserg-07.nifty.com v952V7ql016133 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nifty.com; s=dec2015msa; t=1507170667; bh=wwK1yjeR7wKVqY+2mW9yPLwPvii1HNyD7FYrGOwM96Q=; h=From:To:Cc:Subject:Date:From; b=ljtGgEWwbn/1xdkIGe5H/e2cKKUamuuFt4e69haFdluZ15dBz3fyJBEoGAurgl+wm azS4W4FRyN5kqku+lcDG6rVA7G4ujsfj2iJJRJz2JBNH9HhS0SuGNNjYwEHN6i2aAQ s1h8f2erGKO6jtU+PasxJpQitSyp71+ARI7MsIZRJDU/PucJTCFRxN56Ktei6HwKX8 vsKKhgt5cPRyULNCFSy6Fm8t6BFT1LxiUlh590gqlLkRWBHeQzcQVMDi2R/NR/N+QR zr18JOxUubDLkU5wL95xfDaelg0gRSZtIB01C/yBeH6xN7RWUnLU4qM3ct3i6H1cNy zGpTqoKgM2udw== X-Nifty-SrcIP: [153.142.97.92] From: Masahiro Yamada To: Philipp Zabel Cc: Masahiro Yamada , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Rob Herring , Mark Rutland , linux-arm-kernel@lists.infradead.org Subject: [PATCH] reset: uniphier: add PXs3 reset data Date: Thu, 5 Oct 2017 11:30:57 +0900 Message-Id: <1507170657-26432-1-git-send-email-yamada.masahiro@socionext.com> X-Mailer: git-send-email 2.7.4 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add basic reset data for Socionext's new SoC PXs3. Signed-off-by: Masahiro Yamada --- .../devicetree/bindings/reset/uniphier-reset.txt | 3 +++ drivers/reset/reset-uniphier.c | 26 ++++++++++++++++++++++ 2 files changed, 29 insertions(+) -- 2.7.4 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/Documentation/devicetree/bindings/reset/uniphier-reset.txt b/Documentation/devicetree/bindings/reset/uniphier-reset.txt index 68a6f48..93efed6 100644 --- a/Documentation/devicetree/bindings/reset/uniphier-reset.txt +++ b/Documentation/devicetree/bindings/reset/uniphier-reset.txt @@ -13,6 +13,7 @@ Required properties: "socionext,uniphier-pxs2-reset" - for PXs2/LD6b SoC "socionext,uniphier-ld11-reset" - for LD11 SoC "socionext,uniphier-ld20-reset" - for LD20 SoC + "socionext,uniphier-pxs3-reset" - for PXs3 SoC - #reset-cells: should be 1. Example: @@ -44,6 +45,7 @@ Required properties: "socionext,uniphier-ld11-mio-reset" - for LD11 SoC (MIO) "socionext,uniphier-ld11-sd-reset" - for LD11 SoC (SD) "socionext,uniphier-ld20-sd-reset" - for LD20 SoC + "socionext,uniphier-pxs3-sd-reset" - for PXs3 SoC - #reset-cells: should be 1. Example: @@ -74,6 +76,7 @@ Required properties: "socionext,uniphier-pxs2-peri-reset" - for PXs2/LD6b SoC "socionext,uniphier-ld11-peri-reset" - for LD11 SoC "socionext,uniphier-ld20-peri-reset" - for LD20 SoC + "socionext,uniphier-pxs3-peri-reset" - for PXs3 SoC - #reset-cells: should be 1. Example: diff --git a/drivers/reset/reset-uniphier.c b/drivers/reset/reset-uniphier.c index bda2dd1..6ed808d 100644 --- a/drivers/reset/reset-uniphier.c +++ b/drivers/reset/reset-uniphier.c @@ -114,6 +114,20 @@ static const struct uniphier_reset_data uniphier_ld20_sys_reset_data[] = { UNIPHIER_RESET_END, }; +static const struct uniphier_reset_data uniphier_pxs3_sys_reset_data[] = { + UNIPHIER_RESETX(2, 0x200c, 0), /* NAND */ + UNIPHIER_RESETX(4, 0x200c, 2), /* eMMC */ + UNIPHIER_RESETX(8, 0x200c, 12), /* STDMAC */ + UNIPHIER_RESETX(12, 0x200c, 4), /* USB30 link (GIO0) */ + UNIPHIER_RESETX(13, 0x200c, 5), /* USB31 link (GIO1) */ + UNIPHIER_RESETX(16, 0x200c, 16), /* USB30-PHY0 */ + UNIPHIER_RESETX(17, 0x200c, 18), /* USB30-PHY1 */ + UNIPHIER_RESETX(18, 0x200c, 20), /* USB30-PHY2 */ + UNIPHIER_RESETX(20, 0x200c, 17), /* USB31-PHY0 */ + UNIPHIER_RESETX(21, 0x200c, 19), /* USB31-PHY1 */ + UNIPHIER_RESET_END, +}; + /* Media I/O reset data */ #define UNIPHIER_MIO_RESET_SD(id, ch) \ UNIPHIER_RESETX((id), 0x110 + 0x200 * (ch), 0) @@ -359,6 +373,10 @@ static const struct of_device_id uniphier_reset_match[] = { .compatible = "socionext,uniphier-ld20-reset", .data = uniphier_ld20_sys_reset_data, }, + { + .compatible = "socionext,uniphier-pxs3-reset", + .data = uniphier_pxs3_sys_reset_data, + }, /* Media I/O reset, SD reset */ { .compatible = "socionext,uniphier-ld4-mio-reset", @@ -392,6 +410,10 @@ static const struct of_device_id uniphier_reset_match[] = { .compatible = "socionext,uniphier-ld20-sd-reset", .data = uniphier_pro5_sd_reset_data, }, + { + .compatible = "socionext,uniphier-pxs3-sd-reset", + .data = uniphier_pro5_sd_reset_data, + }, /* Peripheral reset */ { .compatible = "socionext,uniphier-ld4-peri-reset", @@ -421,6 +443,10 @@ static const struct of_device_id uniphier_reset_match[] = { .compatible = "socionext,uniphier-ld20-peri-reset", .data = uniphier_pro4_peri_reset_data, }, + { + .compatible = "socionext,uniphier-pxs3-peri-reset", + .data = uniphier_pro4_peri_reset_data, + }, /* Analog signal amplifiers reset */ { .compatible = "socionext,uniphier-ld11-adamv-reset",