[02/10] insane: Add entries for riscv 32bit/64bit

Message ID f8af837248f8a07733f9066891d7c045bbc8250e.1507250774.git.raj.khem@gmail.com
State New
Headers show
Series
  • Add foundation for riscv architecture
Related show

Commit Message

Khem Raj Oct. 6, 2017, 12:50 a.m.
Signed-off-by: Khem Raj <raj.khem@gmail.com>

---
 meta/classes/insane.bbclass | 4 ++++
 1 file changed, 4 insertions(+)

-- 
2.14.2

-- 
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Patch

diff --git a/meta/classes/insane.bbclass b/meta/classes/insane.bbclass
index 0a3b528ddb..def9c707a4 100644
--- a/meta/classes/insane.bbclass
+++ b/meta/classes/insane.bbclass
@@ -94,6 +94,8 @@  def package_qa_get_machine_dict(d):
                         "mipsisa64r6":   ( 8,  0,    0,          False,         64),
                         "mipsisa64r6el": ( 8,  0,    0,          True,          64),
                         "nios2":      (113,    0,    0,          True,          32),
+                        "riscv":      (243,    0,    0,          True,          32),
+                        "riscv64":    (243,    0,    0,          True,          64),
                         "s390":       (22,     0,    0,          False,         32),
                         "sh4":        (42,     0,    0,          True,          32),
                         "sparc":      ( 2,     0,    0,          False,         32),
@@ -119,6 +121,8 @@  def package_qa_get_machine_dict(d):
                         "microblaze":  (189,     0,    0,          False,         32),
                         "microblazeeb":(189,     0,    0,          False,         32),
                         "microblazeel":(189,     0,    0,          True,          32),
+                        "riscv":      (243,      0,    0,          True,          32),
+                        "riscv64":    (243,      0,    0,          True,          64),
                         "sh4":        (  42,     0,    0,          True,          32),
                       },
             "uclinux-uclibc" : {