diff mbox series

nvic: Fix miscalculation of offsets into ITNS array

Message ID 1507650856-11718-1-git-send-email-peter.maydell@linaro.org
State Superseded
Headers show
Series nvic: Fix miscalculation of offsets into ITNS array | expand

Commit Message

Peter Maydell Oct. 10, 2017, 3:54 p.m. UTC
This calculation of the first exception vector in
the ITNS<n> register being accessed:
        int startvec = 32 * (offset - 0x380) + NVIC_FIRST_IRQ;

is incorrect, because offset is in bytes, so we only want
to multiply by 8.

Spotted by Coverity (CID 1381484, CID 1381488), though it is
not correct that it actually overflows the buffer, because
we have a 'startvec + i < s->num_irq' guard.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

---
Oops. I guess this is what Coverity is there to catch :-)

 hw/intc/armv7m_nvic.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

-- 
2.7.4

Comments

Richard Henderson Oct. 12, 2017, 3 p.m. UTC | #1
On 10/10/2017 08:54 AM, Peter Maydell wrote:
> This calculation of the first exception vector in

> the ITNS<n> register being accessed:

>         int startvec = 32 * (offset - 0x380) + NVIC_FIRST_IRQ;

> 

> is incorrect, because offset is in bytes, so we only want

> to multiply by 8.

> 

> Spotted by Coverity (CID 1381484, CID 1381488), though it is

> not correct that it actually overflows the buffer, because

> we have a 'startvec + i < s->num_irq' guard.

> 

> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

> ---

> Oops. I guess this is what Coverity is there to catch :-)

> 

>  hw/intc/armv7m_nvic.c | 4 ++--

>  1 file changed, 2 insertions(+), 2 deletions(-)


Reviewed-by: Richard Henderson <richard.henderson@linaro.org>



r~
diff mbox series

Patch

diff --git a/hw/intc/armv7m_nvic.c b/hw/intc/armv7m_nvic.c
index 22d5e6e..201e90f 100644
--- a/hw/intc/armv7m_nvic.c
+++ b/hw/intc/armv7m_nvic.c
@@ -698,7 +698,7 @@  static uint32_t nvic_readl(NVICState *s, uint32_t offset, MemTxAttrs attrs)
         return ((s->num_irq - NVIC_FIRST_IRQ) / 32) - 1;
     case 0x380 ... 0x3bf: /* NVIC_ITNS<n> */
     {
-        int startvec = 32 * (offset - 0x380) + NVIC_FIRST_IRQ;
+        int startvec = 8 * (offset - 0x380) + NVIC_FIRST_IRQ;
         int i;
 
         if (!arm_feature(&cpu->env, ARM_FEATURE_V8)) {
@@ -1102,7 +1102,7 @@  static void nvic_writel(NVICState *s, uint32_t offset, uint32_t value,
     switch (offset) {
     case 0x380 ... 0x3bf: /* NVIC_ITNS<n> */
     {
-        int startvec = 32 * (offset - 0x380) + NVIC_FIRST_IRQ;
+        int startvec = 8 * (offset - 0x380) + NVIC_FIRST_IRQ;
         int i;
 
         if (!arm_feature(&cpu->env, ARM_FEATURE_V8)) {