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[209.132.180.131]) by mx.google.com with ESMTPS id g65si234403pfk.453.2017.10.13.00.42.01 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 13 Oct 2017 00:42:01 -0700 (PDT) Received-SPF: pass (google.com: domain of gcc-patches-return-464106-patch=linaro.org@gcc.gnu.org designates 209.132.180.131 as permitted sender) client-ip=209.132.180.131; Authentication-Results: mx.google.com; dkim=pass header.i=@gcc.gnu.org header.s=default header.b=A/0cHVWR; spf=pass (google.com: domain of gcc-patches-return-464106-patch=linaro.org@gcc.gnu.org designates 209.132.180.131 as permitted sender) smtp.mailfrom=gcc-patches-return-464106-patch=linaro.org@gcc.gnu.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :mime-version:from:date:message-id:subject:to:content-type; q= dns; s=default; b=Cyo+7a3fc7cIZSPzaPyNVnS4mnIbMSw/SmdM/9xLriXZKQ xD6LBMj9JVjzyQTCLoSYASLM+inCMBC6cPQ52MRvyvznCXzGH0cFFbVU3edDMIj4 zughFZsYbl3woMSdePYzktOWxyLjzdT7i4xxT78hr+Izuo91jPH6ZLnC8GrTc= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :mime-version:from:date:message-id:subject:to:content-type; s= default; bh=VK56XgtZN9iVsRY1yXUtjmxEMlI=; b=A/0cHVWREMdpLy2W1mMk C+ZGHepzeR4O2MSgnQHvrtXeDX6RzTuB/O76t6abiWbOHW3XMO9KpC5gE8YU6rZ/ G2i2fqvoe41MMxUp91hpc1RlLT+XlTTYCCaRA2smyTz972LnRSWq0zR8rmWFq7my +48j9874xfMKldhDcvsWAPc= Received: (qmail 26398 invoked by alias); 13 Oct 2017 07:41:44 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 26385 invoked by uid 89); 13 Oct 2017 07:41:43 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-25.2 required=5.0 tests=AWL, BAYES_00, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, RCVD_IN_DNSWL_NONE, SPF_PASS autolearn=ham version=3.3.2 spammy=HX-Envelope-From:sk:christo X-HELO: mail-ua0-f179.google.com Received: from mail-ua0-f179.google.com (HELO mail-ua0-f179.google.com) (209.85.217.179) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Fri, 13 Oct 2017 07:41:41 +0000 Received: by mail-ua0-f179.google.com with SMTP id n38so4703720uai.11 for ; Fri, 13 Oct 2017 00:41:41 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:from:date:message-id:subject:to; bh=1nbNzi9uhiDH84v3aTG2VstHa+uekb6ytv3vMdnFIC0=; b=dr9ELbwDAQJ9XEq5VYWWENkAFjwwPeRXC8cdo/Lp1qRmmfXu7lnxilODkD3K2bSW2t 0OexmiNaOfS0+M96ph51p+5J/P51V5O0HHQ0LgLP8vntLh7PTKLGmS1mds7fbIoTADpM JFJbuB6ADzj6tXEGLQWnOvrR/XNtA/sKmyhvaH1e48s27NPORfE4Kv9Uzhxsh/HvV61c ehPE9z/VM3sTeTsGKOCEsGUVpyt+NZ7SH+uzFu0CHpEcbhwSXIT8mAB5VfRxU+/MkYAb ULH03kyKkuD8G4ieRq7ovrh2AnfSvt4or8btoMKyUUEk5nQXt3GPf6koloMkCLyS6XDt ujEw== X-Gm-Message-State: AMCzsaUGUhBzCjPu6J+m5bjModxRX+opUj4BbGJEtw9St5OInwLFu63T +dtDbbCB1qPoU83l8TqQpDjvRZwzLkSI59eKmrfkbLUR X-Google-Smtp-Source: ABhQp+RkesIygFePSV2jRNUTtYSbyv31CYVT1VJJ2c4y6y3TyXGoqQ7mEI3j1vtX641r1P6zaXnu9muRl8Bi98HcLX4= X-Received: by 10.176.16.221 with SMTP id x29mr496248uab.44.1507880499468; Fri, 13 Oct 2017 00:41:39 -0700 (PDT) MIME-Version: 1.0 Received: by 10.103.94.66 with HTTP; Fri, 13 Oct 2017 00:41:38 -0700 (PDT) From: Christophe Lyon Date: Fri, 13 Oct 2017 09:41:38 +0200 Message-ID: Subject: [ARM] PR 67591 ARM v8 Thumb IT blocks are deprecated part 2 To: "gcc-patches@gcc.gnu.org" X-IsSubscribed: yes Hi, The attached small patch solves PR 67591 and removes occurrences of "IT blocks containing 32-bit Thumb instructions are deprecated in ARMv8". It is similar to the patch I committed recently and updates the 3 remaining patterns that can generate such instructions. I checked gcc.log, g++.log, libstdc++.log and gfortran.log and found no occurrence of the warning with this patch applied. Cross-tested on arm-none-linux-gnueabihf with -mthumb/-march=armv8-a and --with-cpu=cortex-a57 --with-mode=thumb, and also bootstrapped successfully on armv8 HW in thumb mode. Benchmarking shows no noticeable difference. OK for trunk? Thanks, Christophe 2017-10-13 Christophe Lyon PR target/67591 * config/arm/arm.md (*sub_shiftsi): Add predicable_short_it attribute. (*cmp_ite0): Add enabled_for_depr_it attribute. (*cmp_ite1): Likewise. diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md index f241f9d..093db74 100644 --- a/gcc/config/arm/arm.md +++ b/gcc/config/arm/arm.md @@ -8960,6 +8960,7 @@ "TARGET_32BIT" "sub%?\\t%0, %1, %3%S2" [(set_attr "predicable" "yes") + (set_attr "predicable_short_it" "no") (set_attr "shift" "3") (set_attr "arch" "32,a") (set_attr "type" "alus_shift_imm,alus_shift_reg")]) @@ -9398,6 +9399,7 @@ }" [(set_attr "conds" "set") (set_attr "arch" "t2,t2,t2,t2,t2,any,any,any,any") + (set_attr "enabled_for_depr_it" "yes,no,no,no,no,no,no,no,no") (set_attr "type" "multiple") (set_attr_alternative "length" [(const_int 6) @@ -9481,6 +9483,7 @@ }" [(set_attr "conds" "set") (set_attr "arch" "t2,t2,t2,t2,t2,any,any,any,any") + (set_attr "enabled_for_depr_it" "yes,no,no,no,no,no,no,no,no") (set_attr_alternative "length" [(const_int 6) (const_int 8)