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[2001:19d0:306:5::1]) by mx.google.com with ESMTPS id t23si2783189pgo.645.2017.10.15.02.55.24 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sun, 15 Oct 2017 02:55:25 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 2001:19d0:306:5::1 as permitted sender) client-ip=2001:19d0:306:5::1; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=bc30rfph; spf=pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 2001:19d0:306:5::1 as permitted sender) smtp.mailfrom=edk2-devel-bounces@lists.01.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id E6726202E6111; Sun, 15 Oct 2017 02:51:46 -0700 (PDT) X-Original-To: edk2-devel@lists.01.org Delivered-To: edk2-devel@lists.01.org Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2a00:1450:400c:c09::22e; helo=mail-wm0-x22e.google.com; envelope-from=ard.biesheuvel@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-wm0-x22e.google.com (mail-wm0-x22e.google.com [IPv6:2a00:1450:400c:c09::22e]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 7E8F9202E60F0 for ; Sun, 15 Oct 2017 02:51:45 -0700 (PDT) Received: by mail-wm0-x22e.google.com with SMTP id k4so28662947wmc.1 for ; Sun, 15 Oct 2017 02:55:19 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=PWiQHDdb1fyEcpVsgW/zInEkrf4sVkKCJCGWJTufbQ8=; b=bc30rfph6GaB9DKmPOMy06jR91maf/XDXu37rmIujecTQW67n7BuqrOIXf+iolXZv/ mDxPt0WFJk23OMMUv93Ac5CFIpmnv7BunAE3q9EedrdmeGgCIAvMiPAeBWgrL17pv8Du 5F6SsMm7cB6K3njd61eZvl5gtYI1aqGpdrYD8= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=PWiQHDdb1fyEcpVsgW/zInEkrf4sVkKCJCGWJTufbQ8=; b=W8OdpcaDCbVNSknaE9h89wlX7tQSWF9TPQaLK7EBHB7Ku9kZ6NSgA49FBhSrWrFtW2 U/dpf7FUbwIsatx6Mb89jpkzGNhHnZ1a+ItuN8H7X6tdsZaYlxvfMfPcJW0gAMCZulwZ 5D5hwnz5zBvuCpHZJfTj1J/glXF3OMbenCYbEMyV/Mp4hfkN+/oCyczmJiuQJMi6+W5/ D3TnfMfgJFvuLKg8O9+MpZ6l2uaHFdl54WzdiqSX9KFNyJ8h8gXzhN2+xoq4GIHApG+O ccRenndnveXkj50Jl06K59h9EllxXy8nNKxXbXFH+iyANZFtEMrB+UOiBrA2COgz1m1l OeFw== X-Gm-Message-State: AMCzsaWmfgK1Yc7tKUCqHlq6mHgrR9usvO8BH0nGDx6PcmgRdM+EvaxR HU7rVsvsObqiPybyR8gLKJZwr+D3AWA= X-Google-Smtp-Source: ABhQp+Tj0A5d2CEfGG2bc/MS502h2rTIbdD7IjVPZ7LAd8zANtZyrysaGP9WdAm842jkpVvV5yL5xg== X-Received: by 10.28.181.2 with SMTP id e2mr4482330wmf.81.1508061317463; Sun, 15 Oct 2017 02:55:17 -0700 (PDT) Received: from localhost.localdomain ([154.146.29.151]) by smtp.gmail.com with ESMTPSA id 25sm3938943wrv.8.2017.10.15.02.55.15 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sun, 15 Oct 2017 02:55:16 -0700 (PDT) From: Ard Biesheuvel To: edk2-devel@lists.01.org Date: Sun, 15 Oct 2017 10:54:52 +0100 Message-Id: <20171015095453.4420-5-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20171015095453.4420-1-ard.biesheuvel@linaro.org> References: <20171015095453.4420-1-ard.biesheuvel@linaro.org> Subject: [edk2] [PATCH 4/5] Silicon/AMD/Styx: add PlatformFlashAccessLib implementation X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: alan@softiron.co.uk, Ard Biesheuvel , leif.lindholm@linaro.org, naresh.bhat@linaro.org MIME-Version: 1.0 Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" In preparation of adding capsule support to the AMD Styx aka Seattle based platforms, implement a PlatformFlashAccessLib instance that invokes the ISCP to update the FV containing our UEFI image. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel --- Silicon/AMD/Styx/Library/StyxPlatformFlashAccessLib/StyxPlatformFlashAccessLib.c | 128 ++++++++++++++++++++ Silicon/AMD/Styx/Library/StyxPlatformFlashAccessLib/StyxPlatformFlashAccessLib.inf | 47 +++++++ 2 files changed, 175 insertions(+) -- 2.11.0 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel diff --git a/Silicon/AMD/Styx/Library/StyxPlatformFlashAccessLib/StyxPlatformFlashAccessLib.c b/Silicon/AMD/Styx/Library/StyxPlatformFlashAccessLib/StyxPlatformFlashAccessLib.c new file mode 100644 index 000000000000..a23500dd35dc --- /dev/null +++ b/Silicon/AMD/Styx/Library/StyxPlatformFlashAccessLib/StyxPlatformFlashAccessLib.c @@ -0,0 +1,128 @@ +/** @file + Platform flash device access library for AMD Styx + + Copyright (c) 2017, Linaro, Ltd. All rights reserved.
+ + This program and the accompanying materials + are licensed and made available under the terms and conditions of the BSD License + which accompanies this distribution. The full text of the license may be found at + http://opensource.org/licenses/bsd-license.php + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +**/ + +#include + +#include +#include +#include +#include + +#include + +STATIC CONST UINT64 mFlashOffset = FixedPcdGet64 (PcdFvBaseAddress) - + FixedPcdGet64 (PcdFdBaseAddress); +STATIC CONST UINT64 mFlashMaxSize = FixedPcdGet64 (PcdFvSize); + +STATIC CONST UINTN mBlockSize = SIZE_64KB; + +/** + Perform flash write operation. + + @param[in] FirmwareType The type of firmware. + @param[in] FlashAddress The address of flash device to be accessed. + @param[in] FlashAddressType The type of flash device address. + @param[in] Buffer The pointer to the data buffer. + @param[in] Length The length of data buffer in bytes. + + @retval EFI_SUCCESS The operation returns successfully. + @retval EFI_WRITE_PROTECTED The flash device is read only. + @retval EFI_UNSUPPORTED The flash device access is unsupported. + @retval EFI_INVALID_PARAMETER The input parameter is not valid. +**/ +EFI_STATUS +EFIAPI +PerformFlashWrite ( + IN PLATFORM_FIRMWARE_TYPE FirmwareType, + IN EFI_PHYSICAL_ADDRESS FlashAddress, + IN FLASH_ADDRESS_TYPE FlashAddressType, + IN VOID *Buffer, + IN UINTN Length + ) +{ + EFI_STATUS Status; + AMD_ISCP_DXE_PROTOCOL *IscpDxeProtocol; + + if (FlashAddressType != FlashAddressTypeRelativeAddress) { + DEBUG ((DEBUG_ERROR, "%a: only FlashAddressTypeRelativeAddress supported\n", + __FUNCTION__)); + + return EFI_INVALID_PARAMETER; + } + + if (FirmwareType != PlatformFirmwareTypeSystemFirmware) { + DEBUG ((DEBUG_ERROR, + "%a: only PlatformFirmwareTypeSystemFirmware supported\n", + __FUNCTION__)); + + return EFI_INVALID_PARAMETER; + } + + if ((FlashAddress % mBlockSize) != 0 || (Length % mBlockSize) != 0) { + DEBUG ((DEBUG_ERROR, + "%a:region [0x%lx, 0x%lx) is not a multiple of the blocksize 0x%lx\n", + __FUNCTION__, FlashAddress, Length, mBlockSize)); + return EFI_INVALID_PARAMETER; + } + + if (FlashAddress < mFlashOffset || + (FlashAddress + Length) > (mFlashOffset + mFlashMaxSize)) { + DEBUG ((DEBUG_ERROR, + "%a: updated region [0x%lx, 0x%lx) outside of FV region [0x%lx, 0x%lx)\n", + __FUNCTION__, FlashAddress, FlashAddress + Length, mFlashOffset, + mFlashOffset + mFlashMaxSize)); + return EFI_INVALID_PARAMETER; + } + + Status = gBS->LocateProtocol (&gAmdIscpDxeProtocolGuid, NULL, + (VOID **)&IscpDxeProtocol); + ASSERT_EFI_ERROR (Status); + + while (Length > 0) { + // + // Erase the block + // + DEBUG ((DEBUG_INFO, "%a: erasing 0x%llx bytes at address 0x%llx\n", + __FUNCTION__, mBlockSize, FlashAddress)); + + Status = IscpDxeProtocol->AmdExecuteEraseFvBlockDxe (IscpDxeProtocol, + FlashAddress, mBlockSize); + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_ERROR, "%a: AmdExecuteEraseFvBlockDxe () failed - %r\n", + __FUNCTION__, Status)); + } + + // + // Write the new data + // + DEBUG ((DEBUG_INFO, "%a: writing 0x%llx bytes at at address 0x%llx\\n", + __FUNCTION__, mBlockSize, FlashAddress)); + + Status = IscpDxeProtocol->AmdExecuteUpdateFvBlockDxe (IscpDxeProtocol, + FlashAddress, Buffer, mBlockSize); + + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_ERROR, + "%a: write of block address 0x%lx failed - %r\n", + __FUNCTION__, FlashAddress, Status)); + } + + FlashAddress += mBlockSize; + Buffer += mBlockSize; + Length -= mBlockSize; + } + + return EFI_SUCCESS; +} diff --git a/Silicon/AMD/Styx/Library/StyxPlatformFlashAccessLib/StyxPlatformFlashAccessLib.inf b/Silicon/AMD/Styx/Library/StyxPlatformFlashAccessLib/StyxPlatformFlashAccessLib.inf new file mode 100644 index 000000000000..411173f1f3c5 --- /dev/null +++ b/Silicon/AMD/Styx/Library/StyxPlatformFlashAccessLib/StyxPlatformFlashAccessLib.inf @@ -0,0 +1,47 @@ +## @file +# Platform flash device access library. +# +# Copyright (c) 2017, Linaro, Ltd. All rights reserved.
+# +# This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +## + +[Defines] + INF_VERSION = 0x00010019 + BASE_NAME = StyxPlatformFlashAccessLib + FILE_GUID = 3fd08c10-07de-4851-a891-acaeea5055f8 + MODULE_TYPE = BASE + VERSION_STRING = 1.0 + LIBRARY_CLASS = PlatformFlashAccessLib|DXE_DRIVER + +[Sources] + StyxPlatformFlashAccessLib.c + +[Packages] + ArmPkg/ArmPkg.dec + MdePkg/MdePkg.dec + SignedCapsulePkg/SignedCapsulePkg.dec + Silicon/AMD/Styx/AmdModulePkg/AmdModulePkg.dec + +[LibraryClasses] + BaseMemoryLib + DebugLib + UefiBootServicesTableLib + +[Protocols] + gAmdIscpDxeProtocolGuid ## CONSUMES + +[FixedPcd] + gArmTokenSpaceGuid.PcdFdBaseAddress + gArmTokenSpaceGuid.PcdFvBaseAddress + gArmTokenSpaceGuid.PcdFvSize + +[Depex] + gAmdIscpDxeProtocolGuid