From patchwork Tue Oct 17 10:19:04 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 116058 Delivered-To: patch@linaro.org Received: by 10.140.22.163 with SMTP id 32csp4702332qgn; Tue, 17 Oct 2017 03:19:48 -0700 (PDT) X-Received: by 10.99.174.78 with SMTP id e14mr10376353pgp.155.1508235588225; Tue, 17 Oct 2017 03:19:48 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1508235588; cv=none; d=google.com; s=arc-20160816; b=eFy9AfBtsMPf2L2sXb5++1ccxh+3Yl0t4CxdXvTogmQImfZynGBPjE2rbxfq3Pl9dJ 50u0px6R/dlyweUD1Bv2r5qZSCO0iNJ3qUSpQWqd/mAUtbOdiP3fYq63HtPIa201LUHW 5Hef44EIPg4WHKRSSdbETNvZdw172qXSAFYYGz9YOZTwZnjqC66q/39lTnb26mITRkj0 vEyegeXPKPfp75U91wYxO4y9SWXssPEo1xtGt4gPjclwPEo1obBQAE0scYbWpDTt2y76 Gs7niZjVQgF2S/39phgzf/05VO3SrjQQGahLxPe7ofbBfxQAqz3ObHto4cHK/gQW7mBC V6zw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version :list-subscribe:list-help:list-post:list-archive:list-unsubscribe :list-id:precedence:cc:references:in-reply-to:message-id:date :subject:to:from:dkim-signature:delivered-to :arc-authentication-results; bh=fuG1tYEcF8/e7Npt5nJa24JUrEF8ejxuhXv+brbZdNg=; b=OI1+bytPYU+MQt407zuFqpXv5YDCeWVmVwYjjsT+a7IVuoAhjLLWQdxaoMEbCqEjr4 9FhOQ+gwelBWHpSOk5/XeJdCkiF/ss5rrbzRfktLt36xvgTwgjoivq1PavoDtOAZfbCR 2UZcftlaHm7zog2GrKyKDhA13+UqlJxqY37hqLI1SjBcK+9UUkeK3qwwqUE6rri0yWiv mQvhNukkOaVv4UzoyiSxDYaaj4yxDKuOPpUTG4aq12hxgcegZMY6gQXrQajJFR9YMmBk mFdY9jMM1DSA1oJh4aCoFecXJ888co0RsRgbsU1KkZaa+HRW6g31xT7pRocrt0xpnCg2 f9lA== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=WtUODsJg; spf=pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from gabe.freedesktop.org (gabe.freedesktop.org. [131.252.210.177]) by mx.google.com with ESMTPS id r8si288830pgt.573.2017.10.17.03.19.47 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 17 Oct 2017 03:19:48 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) client-ip=131.252.210.177; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=WtUODsJg; spf=pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 5AC9E6E5FA; Tue, 17 Oct 2017 10:19:17 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail-lf0-x234.google.com (mail-lf0-x234.google.com [IPv6:2a00:1450:4010:c07::234]) by gabe.freedesktop.org (Postfix) with ESMTPS id 054AF6E5FA for ; Tue, 17 Oct 2017 10:19:13 +0000 (UTC) Received: by mail-lf0-x234.google.com with SMTP id r129so1372162lff.8 for ; Tue, 17 Oct 2017 03:19:13 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=3pcsj+s3hEDus9jvPbLCNmGesfTmLzksSbEyu83EFeI=; b=WtUODsJg+GOS/iiH1ydn6OgVQPJscFPtrNprJVxT2timrNqzI1wMIbzjsQjUdEK04e L9pf/KOnOsWlA7aC8SFs9cQi8Ti3RqgEXYx6bkN09BSlr7vHivfkNyizV66HHj3Pfgzz NHD/KInef1n817PcSIHQZV1ad0oYsuMnUGRyc= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=3pcsj+s3hEDus9jvPbLCNmGesfTmLzksSbEyu83EFeI=; b=bNlIuWKgNp06IF+5CtlHFI0uUqHtQZLY7hDtQNG2fnuM5TggHDBaH60dtCoz/zw6eL 3ekS3ZwpxM1AlON/3otVHoGS3ilKxhYAKCxRwfp86YdVh19KjM2JhNAKvpB7EWq8FwmS O6gEJar9ba5zxWJKMPLIXD/ayHNlSxYEVojgZCrgEulLdaTV5x1BBY2qLxHYes/3vNU0 3mrUQeeKv3ncYcCJDI0pDxdD6QWHqJoGn8iLFE8CrIe19x9I0D/KEig/vdjdeBHDRXHs d0rdOmzLFUdBVm0dXEJz72TKwomhQ8nNWkijSCD6UncCQx2j0tZZSZG7uRsMxG9ZhWJO gflQ== X-Gm-Message-State: AMCzsaV4v/Amz7geZIeOx5TGsIZUbxQ6PECsckJNJLuXNPc3t1nJ2YOE X7j7gURqBVOGQ6zcRWIMMtg+xw== X-Google-Smtp-Source: ABhQp+Ruz7+BCbJKBNgVbKiKVUFZQEGOdcCj7Y5YoLxp79ZFPKP2bTK5EPr2ign9murwxWbhU1NY9Q== X-Received: by 10.25.67.4 with SMTP id q4mr3888089lfa.69.1508235552339; Tue, 17 Oct 2017 03:19:12 -0700 (PDT) Received: from genomnajs.ideon.se ([85.235.10.227]) by smtp.gmail.com with ESMTPSA id q192sm428099ljb.5.2017.10.17.03.19.10 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 17 Oct 2017 03:19:11 -0700 (PDT) From: Linus Walleij To: Archit Taneja , Andrzej Hajda , Laurent Pinchart Subject: [PATCH 2/2 v2] drm: bridge: Add THS8134A/B support to dumb VGA DAC Date: Tue, 17 Oct 2017 12:19:04 +0200 Message-Id: <20171017101904.22308-2-linus.walleij@linaro.org> X-Mailer: git-send-email 2.13.5 In-Reply-To: <20171017101904.22308-1-linus.walleij@linaro.org> References: <20171017101904.22308-1-linus.walleij@linaro.org> Cc: Laurent Pinchart , dri-devel@lists.freedesktop.org, Bartosz Golaszewski , Maxime Ripard , linux-arm-kernel@lists.infradead.org X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" This extends the dumb VGA DAC bridge to handle the THS8134A and THS8134B VGA DACs in addition to those already handled. The THS8134A, THS8134B and as it turns out also THS8135 need to have data clocked out at the negative edge of the clock pulse, since they clock it into the DAC at the positive edge (so by then it needs to be stable) so we need some extra logic to flag this on the connector to the driver. The semantics of the flag DRM_BUS_FLAG_PIXDATA_NEGEDGE in clearly indicates that this flag tells when to *drive* the data, not when the receiver *reads* it, so the TI variants needs to be handled like this. Introduce a variant struct and contain the information there, and add a bit of helpful comments about how this works so people will get it right when adding new DACs or connectiong new display drivers to DACs. The fact that THS8135 might be working on some systems today is probably due to the fact that the display driver cannot configure when the data is clocked out and the electronics have simply been designed around it so it works anyways. The phenomenon is very real on the ARM reference designs using PL111 where the hardware can control which edge to push out the data. Cc: Laurent Pinchart Cc: Bartosz Golaszewski Cc: Maxime Ripard Signed-off-by: Linus Walleij --- ChangeLog v1->v2: - Alphabetize includes - Use a u32 with the bus polarity flags and just encode the polarity using the DRM define directly. - Rename vendor_data to vendor_info. - Simplify assignment of the flag as it is just a simple u32 now. - Probe all TI variants on the "ti,ths813x" wildcard for now, we only need to know that the device is in this family to set the clock edge flag right. --- drivers/gpu/drm/bridge/dumb-vga-dac.c | 51 ++++++++++++++++++++++++++++++++--- 1 file changed, 47 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/bridge/dumb-vga-dac.c b/drivers/gpu/drm/bridge/dumb-vga-dac.c index 831a606c4706..9cd19e4c33c9 100644 --- a/drivers/gpu/drm/bridge/dumb-vga-dac.c +++ b/drivers/gpu/drm/bridge/dumb-vga-dac.c @@ -11,6 +11,7 @@ */ #include +#include #include #include @@ -19,9 +20,18 @@ #include #include +/** + * struct vga_dac_info - characteristics of the DAC + * @clk_edge_latch: this defines the clock edge latch for the variant + */ +struct vga_dac_info { + u32 clk_edge_latch; +}; + struct dumb_vga { struct drm_bridge bridge; struct drm_connector connector; + struct vga_dac_info const *variant; struct i2c_adapter *ddc; struct regulator *vdd; @@ -55,7 +65,9 @@ static int dumb_vga_get_modes(struct drm_connector *connector) } drm_mode_connector_update_edid_property(connector, edid); - return drm_add_edid_modes(connector, edid); + ret = drm_add_edid_modes(connector, edid); + connector->display_info.bus_flags |= vga->variant->clk_edge_latch; + return ret; fallback: /* @@ -67,6 +79,8 @@ static int dumb_vga_get_modes(struct drm_connector *connector) /* And prefer a mode pretty much anyone can handle */ drm_set_preferred_mode(connector, 1024, 768); + connector->display_info.bus_flags |= vga->variant->clk_edge_latch; + return ret; } @@ -183,6 +197,7 @@ static int dumb_vga_probe(struct platform_device *pdev) if (!vga) return -ENOMEM; platform_set_drvdata(pdev, vga); + vga->variant = of_device_get_match_data(&pdev->dev); vga->vdd = devm_regulator_get_optional(&pdev->dev, "vdd"); if (IS_ERR(vga->vdd)) { @@ -226,10 +241,38 @@ static int dumb_vga_remove(struct platform_device *pdev) return 0; } +static const struct vga_dac_info default_dac_variant = { + /* + * These DACs read data on the negative edge. For example in the + * ADV7123 datasheet (revision D, page 8) there is a timing diagram + * making this clear. So consequently we need to latch the data + * on the positive edge. + */ + .clk_edge_latch = DRM_BUS_FLAG_PIXDATA_POSEDGE, +}; + +static const struct vga_dac_info ti_ths_dac_variant = { + /* + * The TI DACs read the data on the positive edge of the CLK, + * so consequently we need to latch the data on the negative + * edge. + */ + .clk_edge_latch = DRM_BUS_FLAG_PIXDATA_NEGEDGE, +}; + static const struct of_device_id dumb_vga_match[] = { - { .compatible = "dumb-vga-dac" }, - { .compatible = "adi,adv7123" }, - { .compatible = "ti,ths8135" }, + { + .compatible = "dumb-vga-dac", + .data = &default_dac_variant, + }, + { + .compatible = "adi,adv7123", + .data = &default_dac_variant, + }, + { + .compatible = "ti,ths813x", + .data = &ti_ths_dac_variant, + }, {}, }; MODULE_DEVICE_TABLE(of, dumb_vga_match);