From patchwork Wed Oct 18 04:24:33 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Masahiro Yamada X-Patchwork-Id: 116183 Delivered-To: patch@linaro.org Received: by 10.140.22.163 with SMTP id 32csp5636644qgn; Tue, 17 Oct 2017 21:25:47 -0700 (PDT) X-Google-Smtp-Source: AOwi7QCEJ9t1N5rnz6e4sjsmacS9eZ9zbvSaO/ZDo8tEcwmrgY7hT/WfBVa4VS15mQNCNpnqhkqS X-Received: by 10.98.46.69 with SMTP id u66mr13327704pfu.288.1508300746986; Tue, 17 Oct 2017 21:25:46 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1508300746; cv=none; d=google.com; s=arc-20160816; b=rO5GrVi9SZOXgkix7nSlMMfHN4fTAlWBOxtOKAn6TGusoVPPw9xra4zr6FMraGDwL7 XX/cskdb7jHCIQqtxVA8WkonVb4kYjShv+8ZfMlmcE/9ZlrNCYHpBxGgeDeDle1CUbX7 Z3gWOJ+cw1r04k/famTw/N/+poGoJTHLc9UUC6cafY9HsT/mPe8vzozo8ZxOkgSaf1n9 6U0/lUy6QLtzlx7kuVT1bxo/nXuG//lH3ysxysXHALfMWOSs9LE41LCPZ5CBH4Cp3Tlq UNJ1eevX5bIP8zxhy75igKLAZOSUCJ6MyQppBvuvt6e/K2ScLBA4kLN667zzlWFbhEvs XjIw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature:dkim-filter :arc-authentication-results; bh=9xWVw9w+/xJrkY6J//jf9pdIMFc4cavyNg9jFWB7XJU=; b=o4Vi5m++nmnas32FNAatVUPL2S2Ewxff1v8z5eY+AtPaR8ysJPHC/1i7238UKTmbH4 QLsuYvF2DkgNoPzNzG8BttnJ3Ju282voSG6Az/44ipDOL4Wcml0qFgnZpoJOUIp9HtWZ 2mdGuqSGQSZ5w9/a7Ig8sNL9E31oy9mL56yVUZUrchDgSsKHocovw2qytR9fL79yiNrz ng/alVZ0SR/U/JkzEoqkGHoDkJNxJYsIXP63GR/ExHnZnZwlniMHa9TPGC2932rxUrAV drQJbOTXbiQwHcsgr6saDLGGIUlObZrfVkwOFMgIundMITHANkUEe2UmJqVV9n7jtwsN RKAg== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@nifty.com header.s=dec2015msa header.b=eMv2QV6V; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id f22si857705pli.501.2017.10.17.21.25.46; Tue, 17 Oct 2017 21:25:46 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@nifty.com header.s=dec2015msa header.b=eMv2QV6V; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932661AbdJREZo (ORCPT + 6 others); Wed, 18 Oct 2017 00:25:44 -0400 Received: from conuserg-12.nifty.com ([210.131.2.79]:30306 "EHLO conuserg-12.nifty.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932487AbdJREZn (ORCPT ); Wed, 18 Oct 2017 00:25:43 -0400 Received: from pug.e01.socionext.com (p14092-ipngnfx01kyoto.kyoto.ocn.ne.jp [153.142.97.92]) (authenticated) by conuserg-12.nifty.com with ESMTP id v9I4OgxM020843; Wed, 18 Oct 2017 13:24:44 +0900 DKIM-Filter: OpenDKIM Filter v2.10.3 conuserg-12.nifty.com v9I4OgxM020843 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nifty.com; s=dec2015msa; t=1508300685; bh=Z6NaPW0lLdljp3kZt1GfSGMzfRnrDggY+mROalWJIrA=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=eMv2QV6VuASaRaWMOzw9fkKnq+w73qfAkm84IjWaIoH1GnFeNbNiOFG61XnfxxrL2 +xMbvhphu7pdptHPnzenpDFAkZQKZNvYUNNy7FKernhzG21YkmFL1gIWz+/c1MvCAQ oI7T+ml4nhCwmkLzGBxM/bWP+Hz/v5x/16VRMLJV+3/zYTgpTJzmCmjcLmGG3xgLz5 22rIH4SQbA/tUTCFEOxbelTLZxfj0o3JL0HFHtUvcCTwPffjCCWMGa82rvMLFqKEke sK6aiz1GE/2fBsCs0aUGk/tqcsZajXZmXJS/XXZr8uGpCA8GZVn2dUFfNOESQ7t4mW skevt/PW+W13Q== X-Nifty-SrcIP: [153.142.97.92] From: Masahiro Yamada To: linux-arm-kernel@lists.infradead.org Cc: Masahiro Yamada , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Rob Herring , Will Deacon , Mark Rutland , Catalin Marinas Subject: [PATCH 2/6] arm64: dts: uniphier: add GPIO controller nodes Date: Wed, 18 Oct 2017 13:24:33 +0900 Message-Id: <1508300677-23190-3-git-send-email-yamada.masahiro@socionext.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1508300677-23190-1-git-send-email-yamada.masahiro@socionext.com> References: <1508300677-23190-1-git-send-email-yamada.masahiro@socionext.com> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The GPIO controller also acts as an interrupt controller and the interrupt lines are connected to the AIDET block. Signed-off-by: Masahiro Yamada --- arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi | 25 ++++++++++++++++++++++++ arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi | 19 ++++++++++++++++++ arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi | 19 ++++++++++++++++++ 3 files changed, 63 insertions(+) -- 2.7.4 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi b/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi index ee4aff5..99f14cc 100644 --- a/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi +++ b/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi @@ -161,6 +161,31 @@ }; }; + gpio: gpio@55000000 { + compatible = "socionext,uniphier-gpio"; + reg = <0x55000000 0x200>; + interrupt-parent = <&aidet>; + interrupt-controller; + #interrupt-cells = <2>; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pinctrl 0 0 0>, + <&pinctrl 43 0 0>, + <&pinctrl 51 0 0>, + <&pinctrl 96 0 0>, + <&pinctrl 160 0 0>, + <&pinctrl 184 0 0>; + gpio-ranges-group-names = "gpio_range0", + "gpio_range1", + "gpio_range2", + "gpio_range3", + "gpio_range4", + "gpio_range5"; + ngpios = <200>; + socionext,interrupt-ranges = <0 48 16>, <16 154 5>, + <21 217 3>; + }; + i2c0: i2c@58780000 { compatible = "socionext,uniphier-fi2c"; status = "disabled"; diff --git a/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi b/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi index a29c279..17c1c92 100644 --- a/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi +++ b/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi @@ -230,6 +230,25 @@ }; }; + gpio: gpio@55000000 { + compatible = "socionext,uniphier-gpio"; + reg = <0x55000000 0x200>; + interrupt-parent = <&aidet>; + interrupt-controller; + #interrupt-cells = <2>; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pinctrl 0 0 0>, + <&pinctrl 96 0 0>, + <&pinctrl 160 0 0>; + gpio-ranges-group-names = "gpio_range0", + "gpio_range1", + "gpio_range2"; + ngpios = <205>; + socionext,interrupt-ranges = <0 48 16>, <16 154 5>, + <21 217 3>; + }; + i2c0: i2c@58780000 { compatible = "socionext,uniphier-fi2c"; status = "disabled"; diff --git a/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi b/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi index 384729f..87cb290 100644 --- a/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi +++ b/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi @@ -178,6 +178,25 @@ clocks = <&peri_clk 3>; }; + gpio: gpio@55000000 { + compatible = "socionext,uniphier-gpio"; + reg = <0x55000000 0x200>; + interrupt-parent = <&aidet>; + interrupt-controller; + #interrupt-cells = <2>; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pinctrl 0 0 0>, + <&pinctrl 96 0 0>, + <&pinctrl 160 0 0>; + gpio-ranges-group-names = "gpio_range0", + "gpio_range1", + "gpio_range2"; + ngpios = <286>; + socionext,interrupt-ranges = <0 48 16>, <16 154 5>, + <21 217 3>; + }; + i2c0: i2c@58780000 { compatible = "socionext,uniphier-fi2c"; status = "disabled";