From patchwork Tue Oct 31 11:56:16 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gilad Ben-Yossef X-Patchwork-Id: 117602 Delivered-To: patch@linaro.org Received: by 10.140.22.164 with SMTP id 33csp3808057qgn; Tue, 31 Oct 2017 04:56:57 -0700 (PDT) X-Google-Smtp-Source: ABhQp+QN0gyiGk1zMoJb1VXW5ONewwy8jzo1mzAWfAA9cf+l3c84jz1U0SoKJ4iTgNc/ht0uE0lZ X-Received: by 10.99.123.78 with SMTP id k14mr1592626pgn.351.1509451016980; Tue, 31 Oct 2017 04:56:56 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1509451016; cv=none; d=google.com; s=arc-20160816; b=OlrblVeBzznPO4MEYDxofSM06psP8vr/ko7Inuo0Z5Hn8BnwT99F+5ItjgLoqC7cmA /DumsH21ZjkbrdYUj8W2bpGg1wAWfJC3L3sn5rjxrF6DtX2CfPsqSne3BFHG/HV23YlY Nm7+Mr3GnCNIhasbx7xv989Lxci9Y06kD3lkdhL8rkvRQFTGmR/bYl/t/D5Ih/yo+vnn Y6iWc/Hqmrfh3CJZKV/0CH7AlgUtRndJc3U9i66RrRQ5eSVXcDK7alKiueqBiLmlIqa7 cFErY7Qbw0jprGquktKLBU6x/SvqcgTP5gPUfSS/TtH0RH6gjocmhjdssc5PidjYAmVL oEgw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:arc-authentication-results; bh=srNvpf5ixopc+gDcjAIDre1YqASWVPN/kM6NCPMAzco=; b=YlXBwNFvgi9n2gF4GL+xUxPyt2xKz8Tzt8KEVpoQam49Ju0fxfOdnEf65kPWo1/heW Gqq+rC5trmHgVRldXq5XONtNwQ+7WfnTqQFy0DZD2nUoL+eJ9+d+LVGH4pORenpmV6uQ Q8q7MCXXjb94g4VfZQhM7/FFmhqCP0dyRUqI0gFfAhDEo4kPCY6UA/Pz7Ioqm9wjbeEx kGEUtB0REzBo2DQ3KIm7VqUgUbCh8d5RypDPns5PCoo7hXu98HQGIv2fDnlSfmv2ONIM cpMdNrCIXQ9WhjT0Nml6+APvjpglm1Cx8DJjGPY8gvvb9YvOhQU7k17WJHGE+HLHEOFm TFUw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id g24si1559501pfd.403.2017.10.31.04.56.56; Tue, 31 Oct 2017 04:56:56 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752774AbdJaL4z (ORCPT + 27 others); Tue, 31 Oct 2017 07:56:55 -0400 Received: from foss.arm.com ([217.140.101.70]:34760 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751925AbdJaL4e (ORCPT ); Tue, 31 Oct 2017 07:56:34 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 429101435; Tue, 31 Oct 2017 04:56:34 -0700 (PDT) Received: from sugar.kfn.arm.com (unknown [10.45.48.167]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id A91483F483; Tue, 31 Oct 2017 04:56:31 -0700 (PDT) From: Gilad Ben-Yossef To: Greg Kroah-Hartman Cc: Ofir Drang , linux-crypto@vger.kernel.org, driverdev-devel@linuxdriverproject.org, devel@driverdev.osuosl.org, linux-kernel@vger.kernel.org Subject: [PATCH 2/3] staging: ccree: handle limiting of DMA masks Date: Tue, 31 Oct 2017 11:56:16 +0000 Message-Id: <1509450978-17784-3-git-send-email-gilad@benyossef.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1509450978-17784-1-git-send-email-gilad@benyossef.com> References: <1509450978-17784-1-git-send-email-gilad@benyossef.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Properly handle limiting of DMA masks based on device and bus capabilities. Signed-off-by: Gilad Ben-Yossef --- drivers/staging/ccree/ssi_driver.c | 22 ++++++++++++++++++---- 1 file changed, 18 insertions(+), 4 deletions(-) -- 2.7.4 diff --git a/drivers/staging/ccree/ssi_driver.c b/drivers/staging/ccree/ssi_driver.c index 5f03c25..6d4269f 100644 --- a/drivers/staging/ccree/ssi_driver.c +++ b/drivers/staging/ccree/ssi_driver.c @@ -208,6 +208,7 @@ static int init_cc_resources(struct platform_device *plat_dev) struct device *dev = &plat_dev->dev; struct device_node *np = dev->of_node; u32 signature_val; + dma_addr_t dma_mask; int rc = 0; new_drvdata = devm_kzalloc(dev, sizeof(*new_drvdata), GFP_KERNEL); @@ -260,11 +261,24 @@ static int init_cc_resources(struct platform_device *plat_dev) if (rc) goto post_drvdata_err; - if (!dev->dma_mask) - dev->dma_mask = &dev->coherent_dma_mask; + if (!plat_dev->dev.dma_mask) + plat_dev->dev.dma_mask = &plat_dev->dev.coherent_dma_mask; + + dma_mask = (dma_addr_t)(DMA_BIT_MASK(DMA_BIT_MASK_LEN)); + while (dma_mask > 0x7fffffffUL) { + if (dma_supported(&plat_dev->dev, dma_mask)) { + rc = dma_set_coherent_mask(&plat_dev->dev, dma_mask); + if (!rc) + break; + } + dma_mask >>= 1; + } - if (!dev->coherent_dma_mask) - dev->coherent_dma_mask = DMA_BIT_MASK(DMA_BIT_MASK_LEN); + if (rc) { + dev_err(dev, "Error: failed in dma_set_mask, mask=%par\n", + &dma_mask); + goto post_drvdata_err; + } /* Verify correct mapping */ signature_val = CC_HAL_READ_REGISTER(CC_REG_OFFSET(HOST_RGF, HOST_SIGNATURE));