| Message ID | 20171101141419.3180-1-Liviu.Dudau@arm.com |
|---|---|
| State | New |
| Headers | show |
| Series | drm: gem_cma_helper.c: Allow importing of contiguous scatterlists with nents > 1 | expand |
Hi Liviu, Thank you for the patch. On Wednesday, 1 November 2017 16:14:19 EET Liviu Dudau wrote: > drm_gem_cma_prime_import_sg_table() will fail if the number of entries > in the sg_table > 1. However, you can have a device that uses an IOMMU > engine and can map a discontiguous buffer with multiple entries that > have consecutive sg_dma_addresses, effectively making it contiguous. > Allow for that scenario by testing the entries in the sg_table for > contiguous coverage. > > Reviewed-by: Brian Starkey <brian.starkey@arm.com> > Signed-off-by: Liviu Dudau <liviu.dudau@arm.com> > --- > > Hi, > > This patch is the only change I need in order to be able to use existing > IOMMU domain infrastructure with the Mali DP driver. I have tested the > patch and I know it works correctly for my setup, but I would like to get > some comments on whether I am on the right path or if CMA really wants to > see an sg_table with only one entry. CMA, as the memory allocator, doesn't care as it doesn't even see the sg table. The drm_gem_cma_helper is badly named as it doesn't depend on CMA, it should have been called drm_gem_dma_contig_helper or something similar. The assumption at the base of that helper library is that the memory is DMA contiguous. Your patch guarantees that, so it should be fine. I've quickly checked the drivers using drm_gem_cma_prime_import_sg_table and none of them use cma_obj->sgt, so I think there's no risk of breakage. However, I would prefer if you updated the drm_gem_cma_object structure documentation to explicitly state that the sgt can contain multiple entries but that those entries are guaranteed to have contiguous DMA addresses. With the documentation update, Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> > drivers/gpu/drm/drm_gem_cma_helper.c | 22 ++++++++++++++++++++-- > 1 file changed, 20 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/drm_gem_cma_helper.c > b/drivers/gpu/drm/drm_gem_cma_helper.c index 020e7668dfaba..43b179212052d > 100644 > --- a/drivers/gpu/drm/drm_gem_cma_helper.c > +++ b/drivers/gpu/drm/drm_gem_cma_helper.c > @@ -482,8 +482,26 @@ drm_gem_cma_prime_import_sg_table(struct drm_device > *dev, { > struct drm_gem_cma_object *cma_obj; > > - if (sgt->nents != 1) > - return ERR_PTR(-EINVAL); > + if (sgt->nents != 1) { > + /* check if the entries in the sg_table are contiguous */ > + dma_addr_t next_addr = sg_dma_address(sgt->sgl); > + struct scatterlist *s; > + unsigned int i; > + > + for_each_sg(sgt->sgl, s, sgt->nents, i) { > + /* > + * sg_dma_address(s) is only valid for entries > + * that have sg_dma_len(s) != 0 > + */ > + if (!sg_dma_len(s)) > + continue; > + > + if (sg_dma_address(s) != next_addr) > + return ERR_PTR(-EINVAL); > + > + next_addr = sg_dma_address(s) + sg_dma_len(s); > + } > + } > > /* Create a CMA GEM buffer. */ > cma_obj = __drm_gem_cma_create(dev, attach->dmabuf->size); -- Regards, Laurent Pinchart
Hi Liviu, Thank you for the patch. On Friday, 10 November 2017 15:33:10 EET Liviu Dudau wrote: > drm_gem_cma_prime_import_sg_table() will fail if the number of entries > in the sg_table > 1. However, you can have a device that uses an IOMMU > engine and can map a discontiguous buffer with multiple entries that > have consecutive sg_dma_addresses, effectively making it contiguous. > Allow for that scenario by testing the entries in the sg_table for > contiguous coverage. > > Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> > Signed-off-by: Liviu Dudau <liviu.dudau@arm.com> > --- > > Laurent, > > Thanks for the review! I would like to ask for one more favour: if you > are OK with this version, can you pull this patch through the drm-misc tree? I could, but I'd first need to set dim up, and I'm currently abroad with a bad internet connection and a big deadline for the middle of next week (I know, lots of excuses), so it's not very convenient for me at this time. > drivers/gpu/drm/drm_gem_cma_helper.c | 22 ++++++++++++++++++++-- > include/drm/drm_gem_cma_helper.h | 4 +++- > 2 files changed, 23 insertions(+), 3 deletions(-) > > diff --git a/drivers/gpu/drm/drm_gem_cma_helper.c > b/drivers/gpu/drm/drm_gem_cma_helper.c index 020e7668dfaba..43b179212052d > 100644 > --- a/drivers/gpu/drm/drm_gem_cma_helper.c > +++ b/drivers/gpu/drm/drm_gem_cma_helper.c > @@ -482,8 +482,26 @@ drm_gem_cma_prime_import_sg_table(struct drm_device > *dev, { > struct drm_gem_cma_object *cma_obj; > > - if (sgt->nents != 1) > - return ERR_PTR(-EINVAL); > + if (sgt->nents != 1) { > + /* check if the entries in the sg_table are contiguous */ > + dma_addr_t next_addr = sg_dma_address(sgt->sgl); > + struct scatterlist *s; > + unsigned int i; > + > + for_each_sg(sgt->sgl, s, sgt->nents, i) { > + /* > + * sg_dma_address(s) is only valid for entries > + * that have sg_dma_len(s) != 0 > + */ > + if (!sg_dma_len(s)) > + continue; > + > + if (sg_dma_address(s) != next_addr) > + return ERR_PTR(-EINVAL); > + > + next_addr = sg_dma_address(s) + sg_dma_len(s); > + } > + } > > /* Create a CMA GEM buffer. */ > cma_obj = __drm_gem_cma_create(dev, attach->dmabuf->size); > diff --git a/include/drm/drm_gem_cma_helper.h > b/include/drm/drm_gem_cma_helper.h index 58a739bf15f1f..214aa85adc8d5 > 100644 > --- a/include/drm/drm_gem_cma_helper.h > +++ b/include/drm/drm_gem_cma_helper.h > @@ -8,7 +8,9 @@ > * struct drm_gem_cma_object - GEM object backed by CMA memory allocations > * @base: base GEM object > * @paddr: physical address of the backing memory > - * @sgt: scatter/gather table for imported PRIME buffers > + * @sgt: scatter/gather table for imported PRIME buffers. The table can > have + * more than one entry but they are guaranteed to have > contiguous + * DMA addresses. > * @vaddr: kernel virtual address of the backing memory > */ > struct drm_gem_cma_object { -- Regards, Laurent Pinchart
Den 15.11.2017 14.04, skrev Liviu Dudau: > Hi, > > On Sat, Nov 11, 2017 at 02:47:35PM +0200, Laurent Pinchart wrote: >> Hi Liviu, >> >> Thank you for the patch. >> >> On Friday, 10 November 2017 15:33:10 EET Liviu Dudau wrote: >>> drm_gem_cma_prime_import_sg_table() will fail if the number of entries >>> in the sg_table > 1. However, you can have a device that uses an IOMMU >>> engine and can map a discontiguous buffer with multiple entries that >>> have consecutive sg_dma_addresses, effectively making it contiguous. >>> Allow for that scenario by testing the entries in the sg_table for >>> contiguous coverage. >>> >>> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> >>> Signed-off-by: Liviu Dudau <liviu.dudau@arm.com> >>> --- >>> >>> Laurent, >>> >>> Thanks for the review! I would like to ask for one more favour: if you >>> are OK with this version, can you pull this patch through the drm-misc tree? >> I could, but I'd first need to set dim up, and I'm currently abroad with a bad >> internet connection and a big deadline for the middle of next week (I know, >> lots of excuses), so it's not very convenient for me at this time. > Any other drm-misc maintainers feeling helpful and willing to take this > patch in? Sure, I can do it this evening. Noralf. > Otherwise I can send it through the mali-dp tree if no one > objects. > > Best regards, > Liviu > >>> drivers/gpu/drm/drm_gem_cma_helper.c | 22 ++++++++++++++++++++-- >>> include/drm/drm_gem_cma_helper.h | 4 +++- >>> 2 files changed, 23 insertions(+), 3 deletions(-) >>> >>> diff --git a/drivers/gpu/drm/drm_gem_cma_helper.c >>> b/drivers/gpu/drm/drm_gem_cma_helper.c index 020e7668dfaba..43b179212052d >>> 100644 >>> --- a/drivers/gpu/drm/drm_gem_cma_helper.c >>> +++ b/drivers/gpu/drm/drm_gem_cma_helper.c >>> @@ -482,8 +482,26 @@ drm_gem_cma_prime_import_sg_table(struct drm_device >>> *dev, { >>> struct drm_gem_cma_object *cma_obj; >>> >>> - if (sgt->nents != 1) >>> - return ERR_PTR(-EINVAL); >>> + if (sgt->nents != 1) { >>> + /* check if the entries in the sg_table are contiguous */ >>> + dma_addr_t next_addr = sg_dma_address(sgt->sgl); >>> + struct scatterlist *s; >>> + unsigned int i; >>> + >>> + for_each_sg(sgt->sgl, s, sgt->nents, i) { >>> + /* >>> + * sg_dma_address(s) is only valid for entries >>> + * that have sg_dma_len(s) != 0 >>> + */ >>> + if (!sg_dma_len(s)) >>> + continue; >>> + >>> + if (sg_dma_address(s) != next_addr) >>> + return ERR_PTR(-EINVAL); >>> + >>> + next_addr = sg_dma_address(s) + sg_dma_len(s); >>> + } >>> + } >>> >>> /* Create a CMA GEM buffer. */ >>> cma_obj = __drm_gem_cma_create(dev, attach->dmabuf->size); >>> diff --git a/include/drm/drm_gem_cma_helper.h >>> b/include/drm/drm_gem_cma_helper.h index 58a739bf15f1f..214aa85adc8d5 >>> 100644 >>> --- a/include/drm/drm_gem_cma_helper.h >>> +++ b/include/drm/drm_gem_cma_helper.h >>> @@ -8,7 +8,9 @@ >>> * struct drm_gem_cma_object - GEM object backed by CMA memory allocations >>> * @base: base GEM object >>> * @paddr: physical address of the backing memory >>> - * @sgt: scatter/gather table for imported PRIME buffers >>> + * @sgt: scatter/gather table for imported PRIME buffers. The table can >>> have + * more than one entry but they are guaranteed to have >>> contiguous + * DMA addresses. >>> * @vaddr: kernel virtual address of the backing memory >>> */ >>> struct drm_gem_cma_object { >> -- >> Regards, >> >> Laurent Pinchart >>
On Wed, Nov 15, 2017 at 03:24:41PM +0100, Noralf Trønnes wrote: > > Den 15.11.2017 14.04, skrev Liviu Dudau: > > Hi, > > > > On Sat, Nov 11, 2017 at 02:47:35PM +0200, Laurent Pinchart wrote: > > > Hi Liviu, > > > > > > Thank you for the patch. > > > > > > On Friday, 10 November 2017 15:33:10 EET Liviu Dudau wrote: > > > > drm_gem_cma_prime_import_sg_table() will fail if the number of entries > > > > in the sg_table > 1. However, you can have a device that uses an IOMMU > > > > engine and can map a discontiguous buffer with multiple entries that > > > > have consecutive sg_dma_addresses, effectively making it contiguous. > > > > Allow for that scenario by testing the entries in the sg_table for > > > > contiguous coverage. > > > > > > > > Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> > > > > Signed-off-by: Liviu Dudau <liviu.dudau@arm.com> > > > > --- > > > > > > > > Laurent, > > > > > > > > Thanks for the review! I would like to ask for one more favour: if you > > > > are OK with this version, can you pull this patch through the drm-misc tree? > > > I could, but I'd first need to set dim up, and I'm currently abroad with a bad > > > internet connection and a big deadline for the middle of next week (I know, > > > lots of excuses), so it's not very convenient for me at this time. > > Any other drm-misc maintainers feeling helpful and willing to take this > > patch in? > > Sure, I can do it this evening. Cheers, much appreciated! Best regards, Liviu > > Noralf. > > > Otherwise I can send it through the mali-dp tree if no one > > objects. > > > > Best regards, > > Liviu > > > > > > drivers/gpu/drm/drm_gem_cma_helper.c | 22 ++++++++++++++++++++-- > > > > include/drm/drm_gem_cma_helper.h | 4 +++- > > > > 2 files changed, 23 insertions(+), 3 deletions(-) > > > > > > > > diff --git a/drivers/gpu/drm/drm_gem_cma_helper.c > > > > b/drivers/gpu/drm/drm_gem_cma_helper.c index 020e7668dfaba..43b179212052d > > > > 100644 > > > > --- a/drivers/gpu/drm/drm_gem_cma_helper.c > > > > +++ b/drivers/gpu/drm/drm_gem_cma_helper.c > > > > @@ -482,8 +482,26 @@ drm_gem_cma_prime_import_sg_table(struct drm_device > > > > *dev, { > > > > struct drm_gem_cma_object *cma_obj; > > > > > > > > - if (sgt->nents != 1) > > > > - return ERR_PTR(-EINVAL); > > > > + if (sgt->nents != 1) { > > > > + /* check if the entries in the sg_table are contiguous */ > > > > + dma_addr_t next_addr = sg_dma_address(sgt->sgl); > > > > + struct scatterlist *s; > > > > + unsigned int i; > > > > + > > > > + for_each_sg(sgt->sgl, s, sgt->nents, i) { > > > > + /* > > > > + * sg_dma_address(s) is only valid for entries > > > > + * that have sg_dma_len(s) != 0 > > > > + */ > > > > + if (!sg_dma_len(s)) > > > > + continue; > > > > + > > > > + if (sg_dma_address(s) != next_addr) > > > > + return ERR_PTR(-EINVAL); > > > > + > > > > + next_addr = sg_dma_address(s) + sg_dma_len(s); > > > > + } > > > > + } > > > > > > > > /* Create a CMA GEM buffer. */ > > > > cma_obj = __drm_gem_cma_create(dev, attach->dmabuf->size); > > > > diff --git a/include/drm/drm_gem_cma_helper.h > > > > b/include/drm/drm_gem_cma_helper.h index 58a739bf15f1f..214aa85adc8d5 > > > > 100644 > > > > --- a/include/drm/drm_gem_cma_helper.h > > > > +++ b/include/drm/drm_gem_cma_helper.h > > > > @@ -8,7 +8,9 @@ > > > > * struct drm_gem_cma_object - GEM object backed by CMA memory allocations > > > > * @base: base GEM object > > > > * @paddr: physical address of the backing memory > > > > - * @sgt: scatter/gather table for imported PRIME buffers > > > > + * @sgt: scatter/gather table for imported PRIME buffers. The table can > > > > have + * more than one entry but they are guaranteed to have > > > > contiguous + * DMA addresses. > > > > * @vaddr: kernel virtual address of the backing memory > > > > */ > > > > struct drm_gem_cma_object { > > > -- > > > Regards, > > > > > > Laurent Pinchart > > > > -- ==================== | I would like to | | fix the world, | | but they're not | | giving me the | \ source code! / --------------- ¯\_(ツ)_/¯
diff --git a/drivers/gpu/drm/drm_gem_cma_helper.c b/drivers/gpu/drm/drm_gem_cma_helper.c index 020e7668dfaba..43b179212052d 100644 --- a/drivers/gpu/drm/drm_gem_cma_helper.c +++ b/drivers/gpu/drm/drm_gem_cma_helper.c @@ -482,8 +482,26 @@ drm_gem_cma_prime_import_sg_table(struct drm_device *dev, { struct drm_gem_cma_object *cma_obj; - if (sgt->nents != 1) - return ERR_PTR(-EINVAL); + if (sgt->nents != 1) { + /* check if the entries in the sg_table are contiguous */ + dma_addr_t next_addr = sg_dma_address(sgt->sgl); + struct scatterlist *s; + unsigned int i; + + for_each_sg(sgt->sgl, s, sgt->nents, i) { + /* + * sg_dma_address(s) is only valid for entries + * that have sg_dma_len(s) != 0 + */ + if (!sg_dma_len(s)) + continue; + + if (sg_dma_address(s) != next_addr) + return ERR_PTR(-EINVAL); + + next_addr = sg_dma_address(s) + sg_dma_len(s); + } + } /* Create a CMA GEM buffer. */ cma_obj = __drm_gem_cma_create(dev, attach->dmabuf->size);