| Message ID | 626bb482626f79dd7b781cb3bff30f95f8967a70.1509970359.git.michal.simek@xilinx.com |
|---|---|
| State | Accepted |
| Commit | ec2b2d4c535f62833b5354c64ca181fac6cf6577 |
| Headers | show
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[178.255.168.35]) by smtp.gmail.com with ESMTPSA id u8sm15308037wmd.33.2017.11.06.04.13.28 (version=TLS1_2 cipher=AES128-SHA bits=128/128); Mon, 06 Nov 2017 04:13:28 -0800 (PST) From: Michal Simek <michal.simek@xilinx.com> To: u-boot@lists.denx.de Date: Mon, 6 Nov 2017 13:12:43 +0100 Message-Id: <626bb482626f79dd7b781cb3bff30f95f8967a70.1509970359.git.michal.simek@xilinx.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <cover.1509970359.git.michal.simek@xilinx.com> References: <cover.1509970359.git.michal.simek@xilinx.com> In-Reply-To: <cover.1509970359.git.michal.simek@xilinx.com> References: <cover.1509970359.git.michal.simek@xilinx.com> MIME-Version: 1.0 Cc: Anurag Kumar Vulisha <anurag.kumar.vulisha@xilinx.com>, Nava kishore Manne <nava.manne@xilinx.com>, Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com>, Filip Drazic <filip.drazic@aggios.com>, Naga Sureshkumar Relli <naga.sureshkumar.relli@xilinx.com>, =?utf-8?q?S=C3=B6ren_Brinkmann?= <soren.brinkmann@xilinx.com> Subject: [U-Boot] [PATCH 11/40] arm64: dts: xilinx: fix PCI bus dtc warnings X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion <u-boot.lists.denx.de> List-Unsubscribe: <https://lists.denx.de/options/u-boot>, <mailto:u-boot-request@lists.denx.de?subject=unsubscribe> List-Archive: <http://lists.denx.de/pipermail/u-boot/> List-Post: <mailto:u-boot@lists.denx.de> List-Help: <mailto:u-boot-request@lists.denx.de?subject=help> List-Subscribe: <https://lists.denx.de/listinfo/u-boot>, <mailto:u-boot-request@lists.denx.de?subject=subscribe> Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" <u-boot-bounces@lists.denx.de> |
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diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi index 9ec5ef2ad824..c1900e9c95c2 100644 --- a/arch/arm/dts/zynqmp.dtsi +++ b/arch/arm/dts/zynqmp.dtsi @@ -727,6 +727,7 @@ reg-names = "breg", "pcireg", "cfg"; ranges = <0x02000000 0x00000000 0xe0000000 0x00000000 0xe0000000 0x00000000 0x10000000 /* non-prefetchable memory */ 0x43000000 0x00000006 0x00000000 0x00000006 0x00000000 0x00000002 0x00000000>;/* prefetchable memory */ + bus-range = <0x00 0xff>; interrupt-map-mask = <0x0 0x0 0x0 0x7>; interrupt-map = <0x0 0x0 0x0 0x1 &pcie_intc 0x1>, <0x0 0x0 0x0 0x2 &pcie_intc 0x2>,