From patchwork Tue Nov 7 08:14:12 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Masahiro Yamada X-Patchwork-Id: 118124 Delivered-To: patch@linaro.org Received: by 10.140.22.164 with SMTP id 33csp3690291qgn; Tue, 7 Nov 2017 00:17:15 -0800 (PST) X-Google-Smtp-Source: ABhQp+S/Q4wMDBpfag1y2tPk0YdmocQISsfolstGmY72nSg/BX4/LVwTXtA3iC4anvVi9jlGAkGW X-Received: by 10.84.235.134 with SMTP id p6mr17900903plk.326.1510042634933; Tue, 07 Nov 2017 00:17:14 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1510042634; cv=none; d=google.com; s=arc-20160816; b=dxowrwnXOXFAVZ3aj7I6CNMqmMn4Cpu/65Dh/t5CdKLw7JMj+uMNvIn7JwBGBHbIeD uxmCj7uibGPAK1yWLaItlktpA3ryFwMU2Nzt+/KwmJtNqHR1lvl+/QPI4tt/+nuS0VRb JYfnG0T/PgfpKl7V9TitnDxsgtTEL4RMjDWrxwJ0beZ06QGoddPRo/mHybBWcRQJjTr2 +MW8KTmS3W1LKKteUe2weONtkOPT7I+SPpCCOeDyeUlakXen5Aa9cw2S8vk300vb21G+ tTtCkafnsiySl+Qn/2ZYobkBJ9JMdvI+lo+dh1QTverNRJDAN1jb4PENGKVOCkWhzjEm k5oQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:message-id:date:subject:cc:to:from :dkim-signature:dkim-filter:arc-authentication-results; bh=vexuhyggXkR7ivUEZ2Mb8ViKW4Td5uQKhEeRGi7u2e4=; b=Ij4A6OQP2gREYyaHqkeUA0ArqANGA5EqTgdrXmfkuT9xUhpdd/eBm21WBpkIE+AN3Q R1s8y1oUA4DnN768Th+DyFSo+64Nb2vrE/4t3xbNHo9RyKIyhRiKAnG+gj9wgm+NyxRN 1LmVoPI30/lAObHfLe0DknvRg2sRTvewWFvsRP3bNbyc2U4ZWJgF+VNQAxytQ45r28LE 53xhT3ufMFpM1P6ASxqazGVP9USLgq74mc1Kh6j+56/ZMKUE+ljoxfomEeEqh0eIQhye vJ08ZwAPrp49I+FWiyyeOzl1c6P2kjuS4ktYt95NbgKTkBTYlLP74eJBfAk1vGUcVDk1 FNzg== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@nifty.com header.s=dec2015msa header.b=BF5CDvDx; spf=pass (google.com: best guess record for domain of linux-mmc-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-mmc-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id w1si579360pgp.781.2017.11.07.00.17.14; Tue, 07 Nov 2017 00:17:14 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-mmc-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@nifty.com header.s=dec2015msa header.b=BF5CDvDx; spf=pass (google.com: best guess record for domain of linux-mmc-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-mmc-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932650AbdKGIRN (ORCPT + 6 others); Tue, 7 Nov 2017 03:17:13 -0500 Received: from conuserg-10.nifty.com ([210.131.2.77]:35897 "EHLO conuserg-10.nifty.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932229AbdKGIRM (ORCPT ); Tue, 7 Nov 2017 03:17:12 -0500 Received: from pug.e01.socionext.com (p14092-ipngnfx01kyoto.kyoto.ocn.ne.jp [153.142.97.92]) (authenticated) by conuserg-10.nifty.com with ESMTP id vA78GKcH002379; Tue, 7 Nov 2017 17:16:21 +0900 DKIM-Filter: OpenDKIM Filter v2.10.3 conuserg-10.nifty.com vA78GKcH002379 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nifty.com; s=dec2015msa; t=1510042581; bh=2JG7nZ/IUY/3VNu0ea/cMVPFjlOs/+hx60HKXU2bbYQ=; h=From:To:Cc:Subject:Date:From; b=BF5CDvDxKxH2rpxQqzLjcOqtyFsweHoPY+3mT/uoj8IdULsTu+JPdm2bbgS1TWw3e dvfqhB3hMy/fLTbBISQPH5UBVp8PB6UP9H+iZ+5htdYF1blTnamvg41Tlv3os33dri 9WKXfEVNswbHWRgbDG1ksS5ZNG7LY2gDaHYczaJcIyrGN1Qrc5ZzO1/o9tOu12fKBH mrvIqadL4O1bMU+IcXpnRNLEng0WUTG1RkdTfROQEje/fIkDnUkH2QVdyzQ6qzEyML BqBnRBvhCFgSFk05BsC5WYcOfD0/IFfoKuURr5lM2kNOdhCYzm5y+KLV6YCAuwkp4Z C3505LJ6NNPag== X-Nifty-SrcIP: [153.142.97.92] From: Masahiro Yamada To: Lee Jones Cc: Simon Horman , Wolfram Sang , Yoshihiro Shimoda , Masahiro Yamada , linux-mmc@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH] mfd: tmio: move register macros to tmio_core.c Date: Tue, 7 Nov 2017 17:14:12 +0900 Message-Id: <1510042453-27619-1-git-send-email-yamada.masahiro@socionext.com> X-Mailer: git-send-email 2.7.4 Sender: linux-mmc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org These registers are only used in drivers/mfd/tmio_core.c Signed-off-by: Masahiro Yamada --- drivers/mfd/tmio_core.c | 20 ++++++++++++++++++++ include/linux/mfd/tmio.h | 20 -------------------- 2 files changed, 20 insertions(+), 20 deletions(-) -- 2.7.4 -- To unsubscribe from this list: send the line "unsubscribe linux-mmc" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Acked-by: Wolfram Sang diff --git a/drivers/mfd/tmio_core.c b/drivers/mfd/tmio_core.c index 83af78c..ebf54cc 100644 --- a/drivers/mfd/tmio_core.c +++ b/drivers/mfd/tmio_core.c @@ -9,6 +9,26 @@ #include #include +#define CNF_CMD 0x04 +#define CNF_CTL_BASE 0x10 +#define CNF_INT_PIN 0x3d +#define CNF_STOP_CLK_CTL 0x40 +#define CNF_GCLK_CTL 0x41 +#define CNF_SD_CLK_MODE 0x42 +#define CNF_PIN_STATUS 0x44 +#define CNF_PWR_CTL_1 0x48 +#define CNF_PWR_CTL_2 0x49 +#define CNF_PWR_CTL_3 0x4a +#define CNF_CARD_DETECT_MODE 0x4c +#define CNF_SD_SLOT 0x50 +#define CNF_EXT_GCLK_CTL_1 0xf0 +#define CNF_EXT_GCLK_CTL_2 0xf1 +#define CNF_EXT_GCLK_CTL_3 0xf9 +#define CNF_SD_LED_EN_1 0xfa +#define CNF_SD_LED_EN_2 0xfe + +#define SDCREN 0x2 /* Enable access to MMC CTL regs. (flag in COMMAND_REG)*/ + int tmio_core_mmc_enable(void __iomem *cnf, int shift, unsigned long base) { /* Enable the MMC/SD Control registers */ diff --git a/include/linux/mfd/tmio.h b/include/linux/mfd/tmio.h index e1cfe91..396a103c 100644 --- a/include/linux/mfd/tmio.h +++ b/include/linux/mfd/tmio.h @@ -25,26 +25,6 @@ writew((val) >> 16, (addr) + 2); \ } while (0) -#define CNF_CMD 0x04 -#define CNF_CTL_BASE 0x10 -#define CNF_INT_PIN 0x3d -#define CNF_STOP_CLK_CTL 0x40 -#define CNF_GCLK_CTL 0x41 -#define CNF_SD_CLK_MODE 0x42 -#define CNF_PIN_STATUS 0x44 -#define CNF_PWR_CTL_1 0x48 -#define CNF_PWR_CTL_2 0x49 -#define CNF_PWR_CTL_3 0x4a -#define CNF_CARD_DETECT_MODE 0x4c -#define CNF_SD_SLOT 0x50 -#define CNF_EXT_GCLK_CTL_1 0xf0 -#define CNF_EXT_GCLK_CTL_2 0xf1 -#define CNF_EXT_GCLK_CTL_3 0xf9 -#define CNF_SD_LED_EN_1 0xfa -#define CNF_SD_LED_EN_2 0xfe - -#define SDCREN 0x2 /* Enable access to MMC CTL regs. (flag in COMMAND_REG)*/ - #define sd_config_write8(base, shift, reg, val) \ tmio_iowrite8((val), (base) + ((reg) << (shift))) #define sd_config_write16(base, shift, reg, val) \