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Wed, 29 Nov 2017 11:26:51 +0000 (GMT) Received: from eusmgms2.samsung.com (unknown [182.198.249.180]) by eucas1p1.samsung.com (KnoxPortal) with ESMTP id 20171129112651eucas1p18703aa0c427252abed987e1553ff4efe~7iuPS8voV0224302243eucas1p1f; Wed, 29 Nov 2017 11:26:51 +0000 (GMT) X-AuditID: cbfec7f2-f793b6d000003243-45-5a1e997bca61 Received: from eusync4.samsung.com ( [203.254.199.214]) by eusmgms2.samsung.com (EUCPMTA) with SMTP id 53.A1.20118.A799E1A5; Wed, 29 Nov 2017 11:26:50 +0000 (GMT) Received: from AMDC2765.digital.local ([106.116.147.25]) by eusync4.samsung.com (Oracle Communications Messaging Server 7.0.5.31.0 64bit (built May 5 2014)) with ESMTPA id <0P06008RTFSLHZ20@eusync4.samsung.com>; Wed, 29 Nov 2017 11:26:50 +0000 (GMT) From: Marek Szyprowski To: linux-samsung-soc@vger.kernel.org Cc: Marek Szyprowski , Sylwester Nawrocki , Krzysztof Kozlowski , Bartlomiej Zolnierkiewicz , Chanwoo Choi , Inki Dae Subject: [PATCH v2 5/6] arm64: dts: exynos: Add AUD power domain to Exynos5433 SoC Date: Wed, 29 Nov 2017 12:26:37 +0100 Message-id: <20171129112638.15813-6-m.szyprowski@samsung.com> X-Mailer: git-send-email 2.15.0 In-reply-to: <20171129112638.15813-1-m.szyprowski@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFtrMIsWRmVeSWpSXmKPExsWy7djP87rVM+WiDDbPVbLYOGM9q8X1L89Z LSbdn8Bicf78BnaLGef3MVmsPXKX3eLwm3ZWB3aPTas62Tz6tqxi9Pi8SS6AOYrLJiU1J7Ms tUjfLoEr4+ip6ewFDwQrHrdeYmlgfMDbxcjJISFgInHowxM2CFtM4sK99UA2F4eQwFJGiaUv OplBEkICnxklXrbEwzTs/HqDFaJoGaPE6edroJwGJolbzefARrEJGEp0ve0Cs0UEVCU+ty1g ByliFmhjkth1q40VJCEsECLxacM3sCIWoKJpf58BrePg4BWwldhxiQNim7zE4u87wUo4Bewk bh1sAFsmIdDIJtH67jw7RJGLxIGbuxghbGGJV8e3QMVlJC5P7maBsPsZJZpatSHsGYwS595C /W8tcfj4RbB7mAX4JCZtmw52g4QAr0RHmxBEiYfEr4dfoEHkKNG5exbUwxMZJfY9f840gVF6 ASPDKkaR1NLi3PTUYmO94sTc4tK8dL3k/NxNjMCoPP3v+KcdjF9PWB1iFOBgVOLhvbBCNkqI NbGsuDL3EKMEB7OSCO8GL7koId6UxMqq1KL8+KLSnNTiQ4zSHCxK4ry2UW2RQgLpiSWp2amp BalFMFkmDk6pBkbrbwK8DuaXPGNMVqzX8p95KPuzmcIOFantSw2XcPHH7/oZtedO1rF581av dk4R13jdtrPylcmEm/nh2YwcGmlzzraWqqnwlDenJm/c3PBCVz/+bVpG4+Npgn5qCg8109cs n5vkfeq1ZPWZ+T2TbQtTBf1kA0S9W3ce5D5xI86T78RljSfHepRYijMSDbWYi4oTASCpI1vG AgAA X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFupkluLIzCtJLcpLzFFi42I5/e/4Nd2qmXJRBn/v21hsnLGe1eL6l+es FpPuT2CxOH9+A7vFjPP7mCzWHrnLbnH4TTurA7vHplWdbB59W1YxenzeJBfAHMVlk5Kak1mW WqRvl8CVcfTUdPaCB4IVj1svsTQwPuDtYuTkkBAwkdj59QYrhC0mceHeerYuRi4OIYEljBJf f15khXCamCTWbPzMBFLFJmAo0fW2iw3EFhFQlfjctoAdpIhZoINJ4t+dFrCEsECIxOpPLxhB bBagoml/nzF3MXJw8ArYSuy4xAGxTV5i8fedYOWcAnYStw42gF0hBFRy7dFJ5gmMvAsYGVYx iqSWFuem5xYb6RUn5haX5qXrJefnbmIEBtC2Yz+37GDsehd8iFGAg1GJh/fCCtkoIdbEsuLK 3EOMEhzMSiK8G7zkooR4UxIrq1KL8uOLSnNSiw8xSnOwKInz9u5ZHSkkkJ5YkpqdmlqQWgST ZeLglGpgdCiVWheRVu4izy5b/HFW19vNUx+obdw8W3FpYFlGwg5utZ9PxTPn3J6276vi1TVS Gx/+0dGT/Xmiz92qbjHjt4Wt5w2vMBZsktGSDWoKUJvWJ9wgG74+zeDt0n32L459zjdh6tc/ s9qdR8OF+fYcxs3pPZN8PV8XFOZf1LINEQ+3Vt80v3WZEktxRqKhFnNRcSIA7ZJgPxwCAAA= X-CMS-MailID: 20171129112651eucas1p18703aa0c427252abed987e1553ff4efe X-Msg-Generator: CA CMS-TYPE: 201P X-CMS-RootMailID: 20171129112651eucas1p18703aa0c427252abed987e1553ff4efe X-RootMTR: 20171129112651eucas1p18703aa0c427252abed987e1553ff4efe References: <20171129112638.15813-1-m.szyprowski@samsung.com> Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org This patch adds support for AUD power domain to Exynos5433 SoCs, which contains following devices: a clock controller, a pin controller, LPASS module, I2S controller, ADMA PL330 engine and UART #3 device. Signed-off-by: Marek Szyprowski --- arch/arm64/boot/dts/exynos/exynos5433.dtsi | 13 +++++++++++++ 1 file changed, 13 insertions(+) -- 2.15.0 -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Reviewed-by: Chanwoo Choi diff --git a/arch/arm64/boot/dts/exynos/exynos5433.dtsi b/arch/arm64/boot/dts/exynos/exynos5433.dtsi index cfa2a0d4dc2f..2c019a0fd8e3 100644 --- a/arch/arm64/boot/dts/exynos/exynos5433.dtsi +++ b/arch/arm64/boot/dts/exynos/exynos5433.dtsi @@ -395,6 +395,7 @@ #clock-cells = <1>; clock-names = "oscclk", "fout_aud_pll"; clocks = <&xxti>, <&cmu_top CLK_FOUT_AUD_PLL>; + power-domains = <&pd_aud>; }; cmu_bus0: clock-controller@13600000 { @@ -568,6 +569,13 @@ label = "DISP"; }; + pd_aud: power-domain@105c40c0 { + compatible = "samsung,exynos5433-pd"; + reg = <0x105c40c0 0x20>; + #power-domain-cells = <0>; + label = "AUD"; + }; + pd_mfc: power-domain@105c4180 { compatible = "samsung,exynos5433-pd"; reg = <0x105c4180 0x20>; @@ -687,6 +695,7 @@ compatible = "samsung,exynos5433-pinctrl"; reg = <0x114b0000 0x1000>; interrupts = ; + power-domains = <&pd_aud>; }; pinctrl_cpif: pinctrl@10fe0000 { @@ -1566,6 +1575,7 @@ clocks = <&cmu_aud CLK_PCLK_SFR0_CTRL>; clock-names = "sfr0_ctrl"; samsung,pmu-syscon = <&pmu_system_controller>; + power-domains = <&pd_aud>; #address-cells = <1>; #size-cells = <1>; ranges; @@ -1579,6 +1589,7 @@ #dma-cells = <1>; #dma-channels = <8>; #dma-requests = <32>; + power-domains = <&pd_aud>; }; i2s0: i2s0@11440000 { @@ -1595,6 +1606,7 @@ clock-names = "iis", "i2s_opclk0", "i2s_opclk1"; pinctrl-names = "default"; pinctrl-0 = <&i2s0_bus>; + power-domains = <&pd_aud>; status = "disabled"; }; @@ -1607,6 +1619,7 @@ clock-names = "uart", "clk_uart_baud0"; pinctrl-names = "default"; pinctrl-0 = <&uart_aud_bus>; + power-domains = <&pd_aud>; status = "disabled"; }; };