[v2,4/6] arm64: dts: exynos: Add MFC power domain to Exynos 5433 SoC

Message ID 20171129112638.15813-5-m.szyprowski@samsung.com
State New
Headers show
Series
  • Power domains support for Exynos5433 SoCs
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Commit Message

Marek Szyprowski Nov. 29, 2017, 11:26 a.m.
This patch adds support for MFC power domain to Exynos 5433 SoCs, which
contains following devices: a clock controller, MFC codec device and its
SYSMMUs.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>

---
 arch/arm64/boot/dts/exynos/exynos5433.dtsi | 11 +++++++++++
 1 file changed, 11 insertions(+)

-- 
2.15.0

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Comments

Chanwoo Choi Nov. 30, 2017, 2:21 a.m. | #1
Dear Marek,

On 2017년 11월 29일 20:26, Marek Szyprowski wrote:
> This patch adds support for MFC power domain to Exynos 5433 SoCs, which

> contains following devices: a clock controller, MFC codec device and its

> SYSMMUs.

> 

> Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>

> ---

>  arch/arm64/boot/dts/exynos/exynos5433.dtsi | 11 +++++++++++

>  1 file changed, 11 insertions(+)

> 

> diff --git a/arch/arm64/boot/dts/exynos/exynos5433.dtsi b/arch/arm64/boot/dts/exynos/exynos5433.dtsi

> index 0a06be283a31..cfa2a0d4dc2f 100644

> --- a/arch/arm64/boot/dts/exynos/exynos5433.dtsi

> +++ b/arch/arm64/boot/dts/exynos/exynos5433.dtsi

> @@ -486,6 +486,7 @@


Looks good to me.
Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com>


[snip]

-- 
Best Regards,
Chanwoo Choi
Samsung Electronics
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Chanwoo Choi Nov. 30, 2017, 2:54 a.m. | #2
Dear Marek,

On 2017년 11월 30일 11:21, Chanwoo Choi wrote:
> Dear Marek,

> 

> On 2017년 11월 29일 20:26, Marek Szyprowski wrote:

>> This patch adds support for MFC power domain to Exynos 5433 SoCs, which

>> contains following devices: a clock controller, MFC codec device and its

>> SYSMMUs.

>>

>> Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>

>> ---

>>  arch/arm64/boot/dts/exynos/exynos5433.dtsi | 11 +++++++++++

>>  1 file changed, 11 insertions(+)

>>

>> diff --git a/arch/arm64/boot/dts/exynos/exynos5433.dtsi b/arch/arm64/boot/dts/exynos/exynos5433.dtsi

>> index 0a06be283a31..cfa2a0d4dc2f 100644

>> --- a/arch/arm64/boot/dts/exynos/exynos5433.dtsi

>> +++ b/arch/arm64/boot/dts/exynos/exynos5433.dtsi

>> @@ -486,6 +486,7 @@

> 

> Looks good to me.

> Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com>

> 

> [snip]

> 


As I commented on patch3, when adding the MFC power domain,
you need to add the 'power-domain' property for  'bus_mfc' device-tree node
as following:

[Adding power-domain to bus device-tree node]
diff --git a/arch/arm64/boot/dts/exynos/exynos5433-bus.dtsi b/arch/arm64/boot/dts/exynos/exynos5433-bus.dtsi
index ec11343dc528..0e1a7e01b8ed 100644
--- a/arch/arm64/boot/dts/exynos/exynos5433-bus.dtsi
+++ b/arch/arm64/boot/dts/exynos/exynos5433-bus.dtsi
 
@@ -55,6 +56,7 @@
                clocks = <&cmu_top CLK_ACLK_MFC_400>;
                clock-names = "bus";
                operating-points-v2 = <&bus_g2d_400_opp_table>;
+               power-domains = <&pd_mfc>;
                status = "disabled";
        };


-- 
Best Regards,
Chanwoo Choi
Samsung Electronics
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Krzysztof Kozlowski Dec. 1, 2017, 4:49 p.m. | #3
On Wed, Nov 29, 2017 at 12:26:36PM +0100, Marek Szyprowski wrote:
> This patch adds support for MFC power domain to Exynos 5433 SoCs, which

> contains following devices: a clock controller, MFC codec device and its

> SYSMMUs.

> 

> Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>

> ---

>  arch/arm64/boot/dts/exynos/exynos5433.dtsi | 11 +++++++++++

>  1 file changed, 11 insertions(+)

> 


Thanks, applied.

Best regards,
Krzysztof

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Patch

diff --git a/arch/arm64/boot/dts/exynos/exynos5433.dtsi b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
index 0a06be283a31..cfa2a0d4dc2f 100644
--- a/arch/arm64/boot/dts/exynos/exynos5433.dtsi
+++ b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
@@ -486,6 +486,7 @@ 
 
 			clock-names = "oscclk", "aclk_mfc_400";
 			clocks = <&xxti>, <&cmu_top CLK_ACLK_MFC_400>;
+			power-domains = <&pd_mfc>;
 		};
 
 		cmu_hevc: clock-controller@14f80000 {
@@ -567,6 +568,13 @@ 
 			label = "DISP";
 		};
 
+		pd_mfc: power-domain@105c4180 {
+			compatible = "samsung,exynos5433-pd";
+			reg = <0x105c4180 0x20>;
+			#power-domain-cells = <0>;
+			label = "MFC";
+		};
+
 		tmu_atlas0: tmu@10060000 {
 			compatible = "samsung,exynos5433-tmu";
 			reg = <0x10060000 0x200>;
@@ -992,6 +1000,7 @@ 
 				 <&cmu_mfc CLK_ACLK_XIU_MFCX>;
 			iommus = <&sysmmu_mfc_0>, <&sysmmu_mfc_1>;
 			iommu-names = "left", "right";
+			power-domains = <&pd_mfc>;
 		};
 
 		sysmmu_decon0x: sysmmu@13a00000 {
@@ -1090,6 +1099,7 @@ 
 			clocks = <&cmu_mfc CLK_PCLK_SMMU_MFC_0>,
 				 <&cmu_mfc CLK_ACLK_SMMU_MFC_0>;
 			#iommu-cells = <0>;
+			power-domains = <&pd_mfc>;
 		};
 
 		sysmmu_mfc_1: sysmmu@15210000 {
@@ -1100,6 +1110,7 @@ 
 			clocks = <&cmu_mfc CLK_PCLK_SMMU_MFC_1>,
 				 <&cmu_mfc CLK_ACLK_SMMU_MFC_1>;
 			#iommu-cells = <0>;
+			power-domains = <&pd_mfc>;
 		};
 
 		serial_0: serial@14c10000 {