From patchwork Fri Dec 1 17:02:19 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Georgi Djakov X-Patchwork-Id: 120362 Delivered-To: patch@linaro.org Received: by 10.140.22.227 with SMTP id 90csp1389757qgn; Fri, 1 Dec 2017 09:02:36 -0800 (PST) X-Google-Smtp-Source: AGs4zMYrfbI7Nge6XqBh+8WG+wWSVoMr4YtUnpgOG70Ev9wQD2T7yfhlrky6brBuBBl+w2da8UOT X-Received: by 10.99.3.88 with SMTP id 85mr6603446pgd.111.1512147756047; Fri, 01 Dec 2017 09:02:36 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1512147756; cv=none; d=google.com; s=arc-20160816; b=c3kIyL3Z0xWR6NPzadEDsCNMcGEHp1s8VqCYz6OjqfygOi+cKEXDNf5EoKuYSxshA9 wpuMGQkBBex+iB0YMDUDETtGkuvKdzwTJjLNLWbsV7cL16EP/tzrWiTbN9crCfEZskD8 wlmZ4OWic33wlDgD1OzR1cC7bymOEpjg4BNEaAq2KefT7aYoMnp8cvPGsGIrT7wR2le/ G/v9WpvOexvhxljRewXtBue05RCf8Lr6Dbw00DXieU8EDxpjgS3X5Kq9suwsh2ht04JM L4i7KKaRzjVJRbzuo/P5zTzpmlFLeTNgj6Iy5/aqVb0Amvc66nyn+RMRfEhpbzU6VS4e TpKA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature:arc-authentication-results; bh=zE82+lMa7W1gP3c+4riT4gc5BAemK6rhdR0Rq7j3jPA=; b=BkjGSh4jeqZTGf0XhNAi7QWowu/cZPae5n4nFGKJ0BpgYuhI2gckMzzCpKxR4jl80I l/pQRu24Ugl28r8fr3/+/chXt0LtY8PHkZPo68+WLzzIjUHApnXyJL2V7meMGc6OZWgw rUUKnv7nM0HG0mfrNpu+CMSea8JOhe4JFFryTjWQ3einQ99sXFxKEROP8NveBtMn61B0 TVDhwtT/K+MVh8F7tkGwUk2URgXDgU+0sBTFOpOCDuGjUdxeKFTlwhL2mY3J1SSaYhn0 NbMM+Dkhmm2PrbfPaIVmxxWHWdrwqEStHbwkmkL3pBfS9IWAqTLFnxho7EMy3XSVi3su PlQw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=FFUDSAI4; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id q11si5207466pll.373.2017.12.01.09.02.35; Fri, 01 Dec 2017 09:02:36 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=FFUDSAI4; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751791AbdLARCd (ORCPT + 28 others); Fri, 1 Dec 2017 12:02:33 -0500 Received: from mail-wr0-f193.google.com ([209.85.128.193]:37795 "EHLO mail-wr0-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751104AbdLARC2 (ORCPT ); Fri, 1 Dec 2017 12:02:28 -0500 Received: by mail-wr0-f193.google.com with SMTP id k61so10803229wrc.4 for ; Fri, 01 Dec 2017 09:02:28 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=zE82+lMa7W1gP3c+4riT4gc5BAemK6rhdR0Rq7j3jPA=; b=FFUDSAI4MVyOLzceA3px0sWPgzeRsp0yyi/9wekx3+QvPLiPOKl6XyJQOS2Lz0TYfi pQV5J7YJLkofBQCX/n0efT6BOhYXiN635w69SyU+dY4wNXXS3v0YKncIls1bgWG6PD64 cVn+p7qjBnzLIFT7HLv6y4uxbkFTZ4FJVzyfg= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=zE82+lMa7W1gP3c+4riT4gc5BAemK6rhdR0Rq7j3jPA=; b=uelzTNX9hmu/Odwk5OlygDdXxttUlf5BdqXtFDmocmlkzl0xWr4yHIxrTMKxGsVbLL AE74aRPmAiAQ1MFbcMcdNrKtEYeNgdKuzCvT51albAquRqXkWu1LmfQdgvjgcqMdnbDx jOy/59baEDIVcUlXQgm+nZYt30EzSMDqiHZ3XSRlZx0sbSx1OwK74TN+rflel4Tknwf6 yzYGbCk19101RwabpK5uU1VzAKkTZw+YDLejfA8A0L7pk2JVAbbnK0DXdqD2ICPqXp2/ p9Zcw3limYwsuo2rIZsgD8nJX67BALuQz/W7k/+50fKK/bFTyl4m5Rdmyz9Dg91WDCnx q4oQ== X-Gm-Message-State: AJaThX5TQ2iDLAa5OTwjeqq75QG5t4dfNj9Djp98A0adScPJkITdJa1O +HUlB2Uzeqef2qv0XV5iIGExvg== X-Received: by 10.223.195.198 with SMTP id d6mr5819639wrg.100.1512147747459; Fri, 01 Dec 2017 09:02:27 -0800 (PST) Received: from localhost.localdomain ([212.45.67.2]) by smtp.googlemail.com with ESMTPSA id 2sm1535253wmk.28.2017.12.01.09.02.26 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 01 Dec 2017 09:02:26 -0800 (PST) From: Georgi Djakov To: sboyd@codeaurora.org, jassisinghbrar@gmail.com, bjorn.andersson@linaro.org, robh@kernel.org Cc: mturquette@baylibre.com, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, georgi.djakov@linaro.org Subject: [PATCH v10 1/6] mailbox: qcom: Convert APCS IPC driver to use regmap Date: Fri, 1 Dec 2017 19:02:19 +0200 Message-Id: <20171201170224.25053-2-georgi.djakov@linaro.org> X-Mailer: git-send-email 2.14.2 In-Reply-To: <20171201170224.25053-1-georgi.djakov@linaro.org> References: <20171201170224.25053-1-georgi.djakov@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This hardware block provides more functionalities that just IPC. Convert it to regmap to allow other child platform devices to use the same regmap. Signed-off-by: Georgi Djakov Acked-by: Bjorn Andersson --- drivers/mailbox/qcom-apcs-ipc-mailbox.c | 24 +++++++++++++++++++----- 1 file changed, 19 insertions(+), 5 deletions(-) diff --git a/drivers/mailbox/qcom-apcs-ipc-mailbox.c b/drivers/mailbox/qcom-apcs-ipc-mailbox.c index 9924c6d7f05d..ab344bc6fa63 100644 --- a/drivers/mailbox/qcom-apcs-ipc-mailbox.c +++ b/drivers/mailbox/qcom-apcs-ipc-mailbox.c @@ -18,6 +18,7 @@ #include #include #include +#include #include #define QCOM_APCS_IPC_BITS 32 @@ -26,19 +27,25 @@ struct qcom_apcs_ipc { struct mbox_controller mbox; struct mbox_chan mbox_chans[QCOM_APCS_IPC_BITS]; - void __iomem *reg; + struct regmap *regmap; unsigned long offset; }; +static const struct regmap_config apcs_regmap_config = { + .reg_bits = 32, + .reg_stride = 4, + .val_bits = 32, + .max_register = 0x1000, + .fast_io = true, +}; + static int qcom_apcs_ipc_send_data(struct mbox_chan *chan, void *data) { struct qcom_apcs_ipc *apcs = container_of(chan->mbox, struct qcom_apcs_ipc, mbox); unsigned long idx = (unsigned long)chan->con_priv; - writel(BIT(idx), apcs->reg); - - return 0; + return regmap_write(apcs->regmap, apcs->offset, BIT(idx)); } static const struct mbox_chan_ops qcom_apcs_ipc_ops = { @@ -47,7 +54,9 @@ static const struct mbox_chan_ops qcom_apcs_ipc_ops = { static int qcom_apcs_ipc_probe(struct platform_device *pdev) { + struct device_node *np = pdev->dev.of_node; struct qcom_apcs_ipc *apcs; + struct regmap *regmap; struct resource *res; unsigned long offset; void __iomem *base; @@ -63,9 +72,14 @@ static int qcom_apcs_ipc_probe(struct platform_device *pdev) if (IS_ERR(base)) return PTR_ERR(base); + regmap = devm_regmap_init_mmio(&pdev->dev, base, &apcs_regmap_config); + if (IS_ERR(regmap)) + return PTR_ERR(regmap); + offset = (unsigned long)of_device_get_match_data(&pdev->dev); - apcs->reg = base + offset; + apcs->regmap = regmap; + apcs->offset = offset; /* Initialize channel identifiers */ for (i = 0; i < ARRAY_SIZE(apcs->mbox_chans); i++)