From patchwork Sun Dec 10 22:45:57 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 121310 Delivered-To: patch@linaro.org Received: by 10.140.22.227 with SMTP id 90csp2120341qgn; Sun, 10 Dec 2017 14:48:09 -0800 (PST) X-Google-Smtp-Source: AGs4zMYyvxyPgEvNxoGpibWAj7yefAmdJwO+v9tMKhZ4qA+y6IhMI9qOgrPx6VWKyBQcE6Z7/CZg X-Received: by 10.159.249.9 with SMTP id bf9mr12540048plb.86.1512946089689; Sun, 10 Dec 2017 14:48:09 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1512946089; cv=none; d=google.com; s=arc-20160816; b=JP/3Q7iI/n7AAEKhCVZnWLf4V6SJUTf7KJLGLgIACsr1BMRWy7KfpP9bIAnwnobiat GVLFvYJrNesKkbY3jwff1skRFpFhZ46gCG/quYgLVOjwGXnwaeC8fYExikfR1rz/C5ZR yDXBOi/zk4oE/l811wVXubPFh5FlTF46SnI4AH1oUhCF4BLzUyfid3O/llHxK9lNWKve /hKMFexwb+Yjpen55SKy8qM42Wxcdl6L39ZbfUocEYKQcDKlChv5mv1+n77sqpsai/nS 11H3xADflgC4l4Nai2y95k5L9QdvP+0dxVxZ7SqK1cR3N+q12loEt7Tch+HySMSz3lkc ldEw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :message-id:date:subject:cc:to:from:dkim-signature :arc-authentication-results; bh=wBwsMqapRfmzd/5ap/qx+AUKJCLYoG5hybdQEao0x+4=; b=UStpSerIsOk+5vrgZDbsTA+HJxPUXtpJSd1cyNhi9pFJqP9nQDGV1tRggfzSLlhHjr 2YsvLgm0qHzjhVIGG79gTfgHuKdu1/8AcN1fTjjA+05B+aWJ8q/vVmpKsa3cQPdBqSaV WsMnENTt3kz/n8d1hca/BxN9UxiLfUIsCPrd2c/ncbNGlzBfUjxog8b8Wu5emIG/hUQo 2g2oY2tUXprGIyERI91aNQzYk+d5llB+qiDXXuzDWhXQh0w16t4DKmJwNmKoEKvYPbLU NeYW8ctJo6r/3yr6NCSWZGbFhwidcqWCNQVGXn9/1hr3jlv3dEosyLmyZpOAk+AOPNM+ aqXA== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=BsHYuPBl; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id 33si9013546plo.44.2017.12.10.14.48.08; Sun, 10 Dec 2017 14:48:09 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=BsHYuPBl; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751593AbdLJWsG (ORCPT + 6 others); Sun, 10 Dec 2017 17:48:06 -0500 Received: from mail-lf0-f65.google.com ([209.85.215.65]:44230 "EHLO mail-lf0-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751268AbdLJWsF (ORCPT ); Sun, 10 Dec 2017 17:48:05 -0500 Received: by mail-lf0-f65.google.com with SMTP id x204so17139699lfa.11 for ; Sun, 10 Dec 2017 14:48:04 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=8EcxOSAUPfD8BkNEa6e1JTq3W92ZJ/8DtLLZ05VOzTo=; b=BsHYuPBlz9878QXuevEkfuaZb1/zPxudNMJjlQWbm0G52CsQg/CJT/A0/s/c4IVtdT JYyKOv7cNqHHUiyD4/M13XtVrioW3uLTyRQBwO4/6p1sIzgDC1LAkUoy0HoLFLu2jyJv fOB9cdFi9Ju/XsS+0WoSjQ1rGl2esBp8nhMGM= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=8EcxOSAUPfD8BkNEa6e1JTq3W92ZJ/8DtLLZ05VOzTo=; b=QfA7kvA0CDTtggp7PCfRUMuE18IOWeDAB3y6/emlc6YTXWmwr+K1Z0+ebZRPSL8N9V FmFRN4vt4MIC8pVWFW6jfH+MYnJFarAT1RLqnBqfuqZMzdJgbX4GW4JrfHFJG6Tw6cZ9 oe48EYqfQcZuHpBX74Pc/p6TBeMQRMj/NFdoiHp8Xc8sPGjAo8+OpYBHP9eB1tQ/mtPI gxQzmZF81BZmG2mEKoMELcFa5pgyGw0QDuiXikil0qHTOrOhaSt1w54m4oMn17e+hdyM upvqKwONyloesyc1e63RqEkF+hoMGDLNhMj8h6Um/96KGK6q87kOzksUvxuQWld/ckKR B4gg== X-Gm-Message-State: AJaThX4Z23I3AZEEx+/lQCSYqbO/5z9PPC8k/gfVTrqMtshNmzZ8xC0N gd4pL9+obUziQehHfPIkSunLdg== X-Received: by 10.25.178.139 with SMTP id t11mr15618435lfk.13.1512946083839; Sun, 10 Dec 2017 14:48:03 -0800 (PST) Received: from localhost.localdomain (c-cb7471d5.014-348-6c756e10.cust.bredbandsbolaget.se. [213.113.116.203]) by smtp.gmail.com with ESMTPSA id q11sm2549844lje.87.2017.12.10.14.48.02 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Sun, 10 Dec 2017 14:48:02 -0800 (PST) From: Linus Walleij To: netdev@vger.kernel.org, "David S . Miller" , =?utf-8?b?TWljaGHFgiBNaXJvc8WCYXc=?= Cc: Janos Laube , Paulius Zaleckas , linux-arm-kernel@lists.infradead.org, Hans Ulli Kroll , Florian Fainelli , Linus Walleij , devicetree@vger.kernel.org, Tobias Waldvogel Subject: [PATCH net-next 1/2 v8] net: ethernet: Add DT bindings for the Gemini ethernet Date: Sun, 10 Dec 2017 23:45:57 +0100 Message-Id: <20171210224558.27122-1-linus.walleij@linaro.org> X-Mailer: git-send-email 2.14.3 MIME-Version: 1.0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org This adds the device tree bindings for the Gemini ethernet controller. It is pretty straight-forward, using standard bindings and modelling the two child ports as child devices under the parent ethernet controller device. Cc: devicetree@vger.kernel.org Cc: Tobias Waldvogel Cc: Michał Mirosław Signed-off-by: Linus Walleij --- ChangeLog v7->v8: - Use ethernet-port@0 and ethernet-port@1 with unit names and following OF graph requirements. --- .../bindings/net/cortina,gemini-ethernet.txt | 92 ++++++++++++++++++++++ 1 file changed, 92 insertions(+) create mode 100644 Documentation/devicetree/bindings/net/cortina,gemini-ethernet.txt -- 2.14.3 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Reviewed-by: Rob Herring diff --git a/Documentation/devicetree/bindings/net/cortina,gemini-ethernet.txt b/Documentation/devicetree/bindings/net/cortina,gemini-ethernet.txt new file mode 100644 index 000000000000..6c559981d110 --- /dev/null +++ b/Documentation/devicetree/bindings/net/cortina,gemini-ethernet.txt @@ -0,0 +1,92 @@ +Cortina Systems Gemini Ethernet Controller +========================================== + +This ethernet controller is found in the Gemini SoC family: +StorLink SL3512 and SL3516, also known as Cortina Systems +CS3512 and CS3516. + +Required properties: +- compatible: must be "cortina,gemini-ethernet" +- reg: must contain the global registers and the V-bit and A-bit + memory areas, in total three register sets. +- syscon: a phandle to the system controller +- #address-cells: must be specified, must be <1> +- #size-cells: must be specified, must be <1> +- ranges: should be state like this giving a 1:1 address translation + for the subnodes + +The subnodes represents the two ethernet ports in this device. +They are not independent of each other since they share resources +in the parent node, and are thus children. + +Required subnodes: +- port0: contains the resources for ethernet port 0 +- port1: contains the resources for ethernet port 1 + +Required subnode properties: +- compatible: must be "cortina,gemini-ethernet-port" +- reg: must contain two register areas: the DMA/TOE memory and + the GMAC memory area of the port +- interrupts: should contain the interrupt line of the port. + this is nominally a level interrupt active high. +- resets: this must provide an SoC-integrated reset line for + the port. +- clocks: this should contain a handle to the PCLK clock for + clocking the silicon in this port +- clock-names: must be "PCLK" + +Optional subnode properties: +- phy-mode: see ethernet.txt +- phy-handle: see ethernet.txt + +Example: + +mdio-bus { + (...) + phy0: ethernet-phy@1 { + reg = <1>; + device_type = "ethernet-phy"; + }; + phy1: ethernet-phy@3 { + reg = <3>; + device_type = "ethernet-phy"; + }; +}; + + +ethernet@60000000 { + compatible = "cortina,gemini-ethernet"; + reg = <0x60000000 0x4000>, /* Global registers, queue */ + <0x60004000 0x2000>, /* V-bit */ + <0x60006000 0x2000>; /* A-bit */ + syscon = <&syscon>; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + gmac0: ethernet-port@0 { + compatible = "cortina,gemini-ethernet-port"; + reg = <0x60008000 0x2000>, /* Port 0 DMA/TOE */ + <0x6000a000 0x2000>; /* Port 0 GMAC */ + interrupt-parent = <&intcon>; + interrupts = <1 IRQ_TYPE_LEVEL_HIGH>; + resets = <&syscon GEMINI_RESET_GMAC0>; + clocks = <&syscon GEMINI_CLK_GATE_GMAC0>; + clock-names = "PCLK"; + phy-mode = "rgmii"; + phy-handle = <&phy0>; + }; + + gmac1: ethernet-port@1 { + compatible = "cortina,gemini-ethernet-port"; + reg = <0x6000c000 0x2000>, /* Port 1 DMA/TOE */ + <0x6000e000 0x2000>; /* Port 1 GMAC */ + interrupt-parent = <&intcon>; + interrupts = <2 IRQ_TYPE_LEVEL_HIGH>; + resets = <&syscon GEMINI_RESET_GMAC1>; + clocks = <&syscon GEMINI_CLK_GATE_GMAC1>; + clock-names = "PCLK"; + phy-mode = "rgmii"; + phy-handle = <&phy1>; + }; +};