From patchwork Tue Dec 12 18:02:24 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexandre TORGUE X-Patchwork-Id: 121615 Delivered-To: patch@linaro.org Received: by 10.140.22.227 with SMTP id 90csp4442878qgn; Tue, 12 Dec 2017 10:03:23 -0800 (PST) X-Google-Smtp-Source: ACJfBotFk1ovyVIK4UzfXUeZQfse4+1yQd/PJwOuL2zCuM+M7GN3xnFWSSq9LX/vCH7mHth0OCjP X-Received: by 10.159.234.138 with SMTP id d10mr3066333plr.280.1513101803747; Tue, 12 Dec 2017 10:03:23 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1513101803; cv=none; d=google.com; s=arc-20160816; b=1KQNE9lPN1fXGUk/899gxw4y62Btvqbx9PA04XLKR/bI85yPcHnIJrIE3SIJeqmMx6 C6jTj69Uzzf0Ft0jy6R12BAKLJ0eMICqsormRK0koC9FImwiZpGHyBqrwAbLpns0qsfN Xow4wgscmxoAFn3pXuFkUQ0xuZZKHWtbBgKUuRniF0adOIG3cAy48Ch7N2nGZqlgoPvT g1ZGA0RUJyjknr0eV+areOLL1rIE542hk8ho5tB4NSbnjqi6Q3Uxq7rT4MgW/N9bRhvf wYvCgwoF9ayoN8kIaCldAnaGEfOjPxyD4ZFhr8yzxcOEubGPOK/m6NlVnBjZ/39YX/HZ qh6g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:arc-authentication-results; bh=I41ECMlSwnN0HwNbcp55isjHrEuAeqR/+XZPgoP1bjA=; b=BbWMitv2rQgaNeLaxFy3zccHEZRhBwiOJ2nSPTrXeimIM1nCkYAEPg4gncCjYqh4p8 OMx9iG2qtAp3AcwmJiFR5ck23uQ9+KrXZVgFr1mj4ItrM4eQ97wYFPxIfzfTnWoo7bUI GEEIsLcB97PwPQYfbO0qkgRYbtBT3YUqW4VBZj6PacfO3ZTXMnArYJRLD0QqJnUJhgGf USvjJSwVMuVPwsc6aRYe8lYkVV7Sgl42mNeryif9TfGK17kTROyxftA6Ee/lAIkg5Q6U dALf0+EG3xPutrDOm9qohCA0fOx7edjHJps0R3v78glRZ/7cD71QD1F9kMTpxn346gJZ rGyw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id w5si9400569plz.214.2017.12.12.10.03.23; Tue, 12 Dec 2017 10:03:23 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752598AbdLLSDV (ORCPT + 6 others); Tue, 12 Dec 2017 13:03:21 -0500 Received: from mx07-00178001.pphosted.com ([62.209.51.94]:41438 "EHLO mx07-00178001.pphosted.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752600AbdLLSDT (ORCPT ); Tue, 12 Dec 2017 13:03:19 -0500 Received: from pps.filterd (m0046037.ppops.net [127.0.0.1]) by mx07-.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id vBCHxbeF000412; Tue, 12 Dec 2017 19:02:29 +0100 Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com with ESMTP id 2etarru26e-1 (version=TLSv1 cipher=ECDHE-RSA-AES256-SHA bits=256 verify=NOT); Tue, 12 Dec 2017 19:02:29 +0100 Received: from zeta.dmz-eu.st.com (zeta.dmz-eu.st.com [164.129.230.9]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 791C231; Tue, 12 Dec 2017 18:02:28 +0000 (GMT) Received: from Webmail-eu.st.com (sfhdag3node2.st.com [10.75.127.8]) by zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 532005255; Tue, 12 Dec 2017 18:02:28 +0000 (GMT) Received: from localhost (10.75.127.46) by SFHDAG3NODE2.st.com (10.75.127.8) with Microsoft SMTP Server (TLS) id 15.0.1347.2; Tue, 12 Dec 2017 19:02:27 +0100 From: Alexandre Torgue To: Maxime Coquelin , , , , , , CC: , Subject: [PATCH 1/3] ARM: dts: stm32: add DMA memory pool on MCU which embed a cortex-M7 Date: Tue, 12 Dec 2017 19:02:24 +0100 Message-ID: <1513101746-18030-2-git-send-email-alexandre.torgue@st.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1513101746-18030-1-git-send-email-alexandre.torgue@st.com> References: <1513101746-18030-1-git-send-email-alexandre.torgue@st.com> MIME-Version: 1.0 X-Originating-IP: [10.75.127.46] X-ClientProxiedBy: SFHDAG6NODE2.st.com (10.75.127.17) To SFHDAG3NODE2.st.com (10.75.127.8) X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:, , definitions=2017-12-12_10:, , signatures=0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On cortex-M7 MCU, DMA have to use a non cache-able memory area. For this reason a dedicated memory pool is created for DMA. This patch creates a DMA memory pool of 1MB of each STM32 MCU which embeds a cortex-M7 expect stm32f746-disco. Indeed, as stm32f746-disco has only a 8MB SDRAM and it's tricky to reduce memory used by Kernel. Signed-off-by: Alexandre Torgue -- 2.7.4 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Reviewed-by: Vladimir Murzin Reviewed-by: Vladimir Murzin diff --git a/arch/arm/boot/dts/stm32746g-eval.dts b/arch/arm/boot/dts/stm32746g-eval.dts index 2d4e717..3f52a7b 100644 --- a/arch/arm/boot/dts/stm32746g-eval.dts +++ b/arch/arm/boot/dts/stm32746g-eval.dts @@ -57,6 +57,19 @@ reg = <0xc0000000 0x2000000>; }; + reserved-memory { + #address-cells = <1>; + #size-cells = <1>; + ranges; + + linux,dma { + compatible = "shared-dma-pool"; + linux,dma-default; + no-map; + reg = <0xc1f00000 0x100000>; + }; + }; + aliases { serial0 = &usart1; }; diff --git a/arch/arm/boot/dts/stm32f769-disco.dts b/arch/arm/boot/dts/stm32f769-disco.dts index 4463ca1..08699a2 100644 --- a/arch/arm/boot/dts/stm32f769-disco.dts +++ b/arch/arm/boot/dts/stm32f769-disco.dts @@ -57,6 +57,19 @@ reg = <0xC0000000 0x1000000>; }; + reserved-memory { + #address-cells = <1>; + #size-cells = <1>; + ranges; + + linux,dma { + compatible = "shared-dma-pool"; + linux,dma-default; + no-map; + reg = <0xc0f00000 0x100000>; + }; + }; + aliases { serial0 = &usart1; }; diff --git a/arch/arm/boot/dts/stm32h743i-disco.dts b/arch/arm/boot/dts/stm32h743i-disco.dts index 79e841d..104545a 100644 --- a/arch/arm/boot/dts/stm32h743i-disco.dts +++ b/arch/arm/boot/dts/stm32h743i-disco.dts @@ -57,6 +57,19 @@ reg = <0xd0000000 0x2000000>; }; + reserved-memory { + #address-cells = <1>; + #size-cells = <1>; + ranges; + + linux,dma { + compatible = "shared-dma-pool"; + linux,dma-default; + no-map; + reg = <0xc1f00000 0x100000>; + }; + }; + aliases { serial0 = &usart2; }; diff --git a/arch/arm/boot/dts/stm32h743i-eval.dts b/arch/arm/boot/dts/stm32h743i-eval.dts index 9f0e72c..5bd4b16 100644 --- a/arch/arm/boot/dts/stm32h743i-eval.dts +++ b/arch/arm/boot/dts/stm32h743i-eval.dts @@ -57,6 +57,19 @@ reg = <0xd0000000 0x2000000>; }; + reserved-memory { + #address-cells = <1>; + #size-cells = <1>; + ranges; + + linux,dma { + compatible = "shared-dma-pool"; + linux,dma-default; + no-map; + reg = <0xc1f00000 0x100000>; + }; + }; + aliases { serial0 = &usart1; };