From patchwork Fri Dec 15 13:20:58 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nishanth Menon X-Patchwork-Id: 122088 Delivered-To: patch@linaro.org Received: by 10.140.22.227 with SMTP id 90csp464569qgn; Fri, 15 Dec 2017 05:22:10 -0800 (PST) X-Google-Smtp-Source: ACJfBouccXOYMOCDX95OATO46pNRmDrubkAy3mosI5G6xpCBJEFNWtQe8GOgv458/BYn1ZXBjnNm X-Received: by 10.101.102.20 with SMTP id w20mr11887433pgv.102.1513344130536; Fri, 15 Dec 2017 05:22:10 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1513344130; cv=none; d=google.com; s=arc-20160816; b=sWCSBNQjitZlDEBLpJf+/X7thNo/tiyMBeQm6VZXLG79RzltgZr1g7e/IlX6c6Cvai NjrVj6o9GZWNGcMOcwYbWbMZtp639h+YlctWKhH0RMpZDxVACZcCI327hUPfyOX57Vol ndy4zXv/UawMrLjZQAsl9zHf3w5QdckiN86N11YL0hO8WWxbMfe/QV5ptTklkNAk+54L 5qqJpmyRRv8AAnpnDphM+NX/hSUgxO4qpJANhAoqJ5RtX4WVMW7Z0lM+CTPSW4ethoKR X61V/AoRQmagdQtA+HqJpY/GArhJL5tZXnGBsIFDHw5u0rddhHXKGVwaCWgOOOqnXPYQ S8UA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature :arc-authentication-results; bh=qYeHfKun0iJW1YOmjUvH4W+wPFLlJWcrVu0iehp/lf8=; b=fYv/qfb5eWjnN+zAsHaVLbLuz7Pk5WsZioEFvLSxZ9t7p+/n3c4jNQ5FsAbJtoDuYB Kl911myQMNb+8RDAZ3NHV6ms44/R7309mIl5FNigy4aa4jfQjJs/z/Azdgh0mRgE1jSX Wod2rh1fcgivg+4OgFLjzwMaLqGZh1M5+R1Syi9WFPZuEUzBrXxYLrKXpPZ4ewJwrSMT 1wbcshRuFUCaa3GMHFQm2+c1UwcgVjVNrXRKMdja8MVWXfzS7mIMd4W62fj6EqeVP88O DGXxi4Dn1bxBL7Ma5erhE2A3EM43y5nBWCL/oA4HJPkSrKV4lH6a6j25vaPmBirhYplL JrGQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@ti.com header.s=ti-com-17Q1 header.b=k1qMXvZ9; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=fail (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id n17si4643752pgc.162.2017.12.15.05.22.10; Fri, 15 Dec 2017 05:22:10 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@ti.com header.s=ti-com-17Q1 header.b=k1qMXvZ9; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=fail (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755913AbdLONWI (ORCPT + 6 others); Fri, 15 Dec 2017 08:22:08 -0500 Received: from lelnx194.ext.ti.com ([198.47.27.80]:34499 "EHLO lelnx194.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1756191AbdLONWH (ORCPT ); Fri, 15 Dec 2017 08:22:07 -0500 Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by lelnx194.ext.ti.com (8.15.1/8.15.1) with ESMTP id vBFDL8Cm009523; Fri, 15 Dec 2017 07:21:08 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ti.com; s=ti-com-17Q1; t=1513344068; bh=ZRN9/IJPCYJWJMBZUjGZOyDI/J2NxEBbSfPM/UAOENw=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=k1qMXvZ9cuMiYVaVnn19fVnXEKGELvhavc9vGfE0PCB8v5s/GikirgoM3CaiOlqwQ u0bBgT74dM4G4UieQfcTPtFwh3tfTTlGrMPPQan0xrGFvl/iKvkpEbkAROsqYXdRof unnrSXnsRFDgGad0sFef5dXPN5H/cFTTvfXkGM4Q= Received: from DFLE105.ent.ti.com (dfle105.ent.ti.com [10.64.6.26]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id vBFDL85v009522; Fri, 15 Dec 2017 07:21:08 -0600 Received: from DFLE112.ent.ti.com (10.64.6.33) by DFLE105.ent.ti.com (10.64.6.26) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1261.35; Fri, 15 Dec 2017 07:21:08 -0600 Received: from dflp33.itg.ti.com (10.64.6.16) by DFLE112.ent.ti.com (10.64.6.33) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1261.35 via Frontend Transport; Fri, 15 Dec 2017 07:21:08 -0600 Received: from localhost (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp33.itg.ti.com (8.14.3/8.13.8) with ESMTP id vBFDL8QL008345; Fri, 15 Dec 2017 07:21:08 -0600 From: Nishanth Menon To: Russell King , Mark Rutland , Rob Herring , Santosh Shilimkar CC: , , , Nishanth Menon Subject: [PATCH 4/8] ARM: dts: keystone: Add missing unit name to interrupt controller Date: Fri, 15 Dec 2017 07:20:58 -0600 Message-ID: <20171215132102.435-5-nm@ti.com> X-Mailer: git-send-email 2.14.1 In-Reply-To: <20171215132102.435-1-nm@ti.com> References: <20171215132102.435-1-nm@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add base address for GIC as unit address. This also squashes the following warnings when built with W=1: arch/arm/boot/dts/keystone-k2hk-evm.dtb: Warning (unit_address_vs_reg): Node /interrupt-controller has a reg or ranges property, but no unit name arch/arm/boot/dts/keystone-k2l-evm.dtb: Warning (unit_address_vs_reg): Node /interrupt-controller has a reg or ranges property, but no unit name arch/arm/boot/dts/keystone-k2e-evm.dtb: Warning (unit_address_vs_reg): Node /interrupt-controller has a reg or ranges property, but no unit name Reported-by: Rob Herring Signed-off-by: Nishanth Menon --- arch/arm/boot/dts/keystone.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- 2.14.1 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/arch/arm/boot/dts/keystone.dtsi b/arch/arm/boot/dts/keystone.dtsi index 01496910587a..93ea5c69ea77 100644 --- a/arch/arm/boot/dts/keystone.dtsi +++ b/arch/arm/boot/dts/keystone.dtsi @@ -27,7 +27,7 @@ reg = <0x00000000 0x80000000 0x00000000 0x40000000>; }; - gic: interrupt-controller { + gic: interrupt-controller@2561000 { compatible = "arm,gic-400", "arm,cortex-a15-gic"; #interrupt-cells = <3>; interrupt-controller;