ARM64: meson-axg: enable hardware rng

Message ID 20171218113546.13116-1-jbrunet@baylibre.com
State New
Headers show
Series
  • ARM64: meson-axg: enable hardware rng
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Commit Message

Jerome Brunet Dec. 18, 2017, 11:35 a.m.
Enable the hardware random generator

Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>

---
Hi Kevin,

This patch depends on the changes adding the ethernet controller [0],
for including the axg clock binding header.

Cheers
Jerome

[0]: https://lkml.kernel.org/r/20171216035527.96952-2-yixun.lan@amlogic.com


 arch/arm64/boot/dts/amlogic/meson-axg.dtsi | 7 +++++++
 1 file changed, 7 insertions(+)

-- 
2.14.3

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Comments

Kevin Hilman Jan. 16, 2018, 11:42 p.m. | #1
Jerome Brunet <jbrunet@baylibre.com> writes:

> Enable the hardware random generator

>

> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>

> ---

> Hi Kevin,

>

> This patch depends on the changes adding the ethernet controller [0],

> for including the axg clock binding header.


Thanks for describing the dependencies.

Queueing for v4.17 (branch: v4.17/dt64)

Kevin
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Patch

diff --git a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
index dea1bc31b4de..c741fc16486f 100644
--- a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
@@ -212,6 +212,13 @@ 
 			#size-cells = <2>;
 			ranges = <0x0 0x0 0x0 0xff634000 0x0 0x2000>;
 
+			hwrng: rng {
+				compatible = "amlogic,meson-rng";
+				reg = <0x0 0x18 0x0 0x4>;
+				clocks = <&clkc CLKID_RNG0>;
+				clock-names = "core";
+			};
+
 			pinctrl_periphs: pinctrl@480 {
 				compatible = "amlogic,meson-axg-periphs-pinctrl";
 				#address-cells = <2>;