diff mbox series

[PULL,2/6] target/sh4: fix TCG leak during gusa sequence

Message ID 20171218224030.26726-3-aurelien@aurel32.net
State Accepted
Commit 6d56fc6cc372284a4571f09b361a9ccd99318103
Headers show
Series None | expand

Commit Message

Aurelien Jarno Dec. 18, 2017, 10:40 p.m. UTC 
From: Alex Bennée <alex.bennee@linaro.org>


This fixes bug #1735384 while running java under qemu-sh4. When debug
was enabled it showed a problem with TCG temps. Once fixed I was able
to run java -version normally.

Cc: qemu-stable@nongnu.org
Reported-by: John Paul Adrian Glaubitz <glaubitz@physik.fu-berlin.de>
Suggested-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>

Message-Id: <20171206093050.25308-1-alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

---
 target/sh4/translate.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

-- 
2.15.1
diff mbox series

Patch

diff --git a/target/sh4/translate.c b/target/sh4/translate.c
index f56808b45d..4a4a5c877e 100644
--- a/target/sh4/translate.c
+++ b/target/sh4/translate.c
@@ -2191,7 +2191,7 @@  static int decode_gusa(DisasContext *ctx, CPUSH4State *env, int *pmax_insns)
     }
 
     /* If op_src is not a valid register, then op_arg was a constant.  */
-    if (op_src < 0) {
+    if (op_src < 0 && !TCGV_IS_UNUSED(op_arg)) {
         tcg_temp_free_i32(op_arg);
     }