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[209.132.180.67]) by mx.google.com with ESMTP id u123si5906703pgb.688.2017.12.19.19.24.22; Tue, 19 Dec 2017 19:24:22 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@gmail.com header.s=20161025 header.b=oRanezNK; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754221AbdLTDYV (ORCPT + 6 others); Tue, 19 Dec 2017 22:24:21 -0500 Received: from mail-pl0-f67.google.com ([209.85.160.67]:38996 "EHLO mail-pl0-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754219AbdLTDYS (ORCPT ); Tue, 19 Dec 2017 22:24:18 -0500 Received: by mail-pl0-f67.google.com with SMTP id bi12so8248407plb.6; Tue, 19 Dec 2017 19:24:18 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=Uc41YSmCbf9e/JHG4oPWkJ4qmL2lsMQJg7WfyPdtuTk=; b=oRanezNK5m4DuLDENcc7rND1xgy23jf+c4OBRJG/Ha8GkCUTgpvAsog8Cj0f5ECACN rdTK50X2+UeT/99hBkb2EmstGUXRRaMKQNV/1UIdE89qb5/05rHlN71ILSq2fv0396Mv +Nj1fFxugDwVZ9EclXv9NyFMD1Yc+bN4SpKfLU7m1UB8U8mdl+l8QJS3AOgT6knX+gcv PDfrP3NOg2Yxw3PyTtUQCvhGcUq+qnqgpoOITM6qTgSfu5rfRx5WUrVNjmK6WDVlaBuF gQ5rF7GFuCH0cb0wOb1VOY0+oa0kcLam8Q1IWzbbdXZCoRbkYAJ3kukLgoHU5xYQ8TIh Llhg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=Uc41YSmCbf9e/JHG4oPWkJ4qmL2lsMQJg7WfyPdtuTk=; b=V+oYex6GthCbQHyoWqqoR+QFrDbTdOVrLxXDuuXALzZyrLgshzH+K9SGBguaCV3ZRb ZGpdAty8p3qCAvxHg4pxtrlG3IDkzK4YBx5OTg8NPrchngMQjOxGXBmnt6ycX1tPxu99 XsyFHWzqQHe+PcevuLraLHa+Sg1UBFkzzKu/MDsPPpvNXjRTZbZFNMjVG2WCaPkYt7p3 kH2BRllX0zN8JuqPWjbLRmuAVCjTpBWHp5ko97U8FOJLEfFX9zFEi6WifdbpHPwVap7a ylTdoWhZGOqFh01urq2AxiXqtK7J8Z81sPUMbPk/OlhZv2+6U1p2EdcmsdJhkd9ne+co uQxw== X-Gm-Message-State: AKGB3mIN3FfDbCYzX6E1wRMCwWa+412J3GKvAJIlpUlUfuAvn0emOmUm y0yiVJA2Rset0IobKzVarYQ= X-Received: by 10.84.128.45 with SMTP id 42mr5482357pla.44.1513740257858; Tue, 19 Dec 2017 19:24:17 -0800 (PST) Received: from aurora.jms.id.au ([45.124.203.15]) by smtp.gmail.com with ESMTPSA id k2sm28577205pff.150.2017.12.19.19.24.10 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 19 Dec 2017 19:24:16 -0800 (PST) Received: by aurora.jms.id.au (sSMTP sendmail emulation); Wed, 20 Dec 2017 13:54:07 +1030 From: Joel Stanley To: Rob Herring , Mark Rutland , Arnd Bergmann , Andrew Jeffery , Patrick Venture , Xo Wang , Lei YU Cc: =?utf-8?q?C=C3=A9dric_Le_Goater?= , Benjamin Herrenschmidt , Jeremy Kerr , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-aspeed@lists.ozlabs.org Subject: [PATCH v3 03/20] ARM: dts: aspeed: Add LPC and child devices Date: Wed, 20 Dec 2017 13:53:11 +1030 Message-Id: <20171220032328.30584-4-joel@jms.id.au> X-Mailer: git-send-email 2.15.1 In-Reply-To: <20171220032328.30584-1-joel@jms.id.au> References: <20171220032328.30584-1-joel@jms.id.au> MIME-Version: 1.0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Andrew Jeffery Ensure the ordering is correct and add all of the children in the SoC device trees for the ast2400 and ast2500. Signed-off-by: Andrew Jeffery Reviewed-by: Cédric Le Goater Signed-off-by: Joel Stanley --- v3: - Fix ast2400 compatible string --- arch/arm/boot/dts/aspeed-g4.dtsi | 35 +++++++++++++++++++++++++++++++++++ arch/arm/boot/dts/aspeed-g5.dtsi | 27 +++++++++++++++++---------- 2 files changed, 52 insertions(+), 10 deletions(-) -- 2.15.1 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/arch/arm/boot/dts/aspeed-g4.dtsi b/arch/arm/boot/dts/aspeed-g4.dtsi index 45d815a86d42..9422f9cb1e11 100644 --- a/arch/arm/boot/dts/aspeed-g4.dtsi +++ b/arch/arm/boot/dts/aspeed-g4.dtsi @@ -225,6 +225,41 @@ status = "disabled"; }; + lpc: lpc@1e789000 { + compatible = "aspeed,ast2400-lpc", "simple-mfd"; + reg = <0x1e789000 0x1000>; + + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x1e789000 0x1000>; + + lpc_bmc: lpc-bmc@0 { + compatible = "aspeed,ast2400-lpc-bmc"; + reg = <0x0 0x80>; + }; + + lpc_host: lpc-host@80 { + compatible = "aspeed,ast2400-lpc-host", "simple-mfd", "syscon"; + reg = <0x80 0x1e0>; + reg-io-width = <4>; + + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x80 0x1e0>; + + lpc_ctrl: lpc-ctrl@0 { + compatible = "aspeed,ast2400-lpc-ctrl"; + reg = <0x0 0x80>; + status = "disabled"; + }; + + lhc: lhc@20 { + compatible = "aspeed,ast2400-lhc"; + reg = <0x20 0x24 0x48 0x8>; + }; + }; + }; + uart2: serial@1e78d000 { compatible = "ns16550a"; reg = <0x1e78d000 0x20>; diff --git a/arch/arm/boot/dts/aspeed-g5.dtsi b/arch/arm/boot/dts/aspeed-g5.dtsi index 5c4ecdba3a6b..069f13df19d1 100644 --- a/arch/arm/boot/dts/aspeed-g5.dtsi +++ b/arch/arm/boot/dts/aspeed-g5.dtsi @@ -265,6 +265,16 @@ status = "disabled"; }; + vuart: serial@1e787000 { + compatible = "aspeed,ast2500-vuart"; + reg = <0x1e787000 0x40>; + reg-shift = <2>; + interrupts = <10>; + clocks = <&clk_uart>; + no-loopback-test; + status = "disabled"; + }; + lpc: lpc@1e789000 { compatible = "aspeed,ast2500-lpc", "simple-mfd"; reg = <0x1e789000 0x1000>; @@ -288,6 +298,13 @@ reg-io-width = <4>; + lpc_ctrl: lpc-ctrl@0 { + compatible = "aspeed,ast2500-lpc-ctrl"; + reg = <0x0 0x80>; + status = "disabled"; + }; + + lhc: lhc@20 { compatible = "aspeed,ast2500-lhc"; reg = <0x20 0x24 0x48 0x8>; @@ -295,16 +312,6 @@ }; }; - vuart: serial@1e787000 { - compatible = "aspeed,ast2500-vuart"; - reg = <0x1e787000 0x40>; - reg-shift = <2>; - interrupts = <10>; - clocks = <&clk_uart>; - no-loopback-test; - status = "disabled"; - }; - uart2: serial@1e78d000 { compatible = "ns16550a"; reg = <0x1e78d000 0x20>;