[06/23] arm: imx: hab: Fix authenticate image lockup on MX7

Message ID 1514377566-28512-7-git-send-email-bryan.odonoghue@linaro.org
State Superseded
Headers show
Series
  • Fix and extend i.MX HAB layer
Related show

Commit Message

Bryan O'Donoghue Dec. 27, 2017, 12:25 p.m.
The i.MX6 has some pretty explicit code associated with informing the IROM
about flushing caches during authenticate_image().

Looking at various pieces of documentation its pretty clear the i.MX6 IROM
registers are not documented and absent similar documentation on the i.MX7
the next-best fix is to disabled the dcache while making an
authenticate_image() callback.

This patch therefore disables dcache temporarily while doing an IROM
authenticate_image() callback, thus resolving a lockup encountered in a
complex set of authenticate-image calls observed.

Note there is no appreciable performance impact with dcache switched off so
this fix is relatively pain-free.

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Sven Ebenfeld <sven.ebenfeld@gmail.com>
Cc: George McCollister <george.mccollister@gmail.com>
---
 arch/arm/mach-imx/hab.c | 15 +++++++++++++++
 1 file changed, 15 insertions(+)

Patch

diff --git a/arch/arm/mach-imx/hab.c b/arch/arm/mach-imx/hab.c
index de1779c..52dff01 100644
--- a/arch/arm/mach-imx/hab.c
+++ b/arch/arm/mach-imx/hab.c
@@ -466,10 +466,25 @@  int authenticate_image(uint32_t ddr_start, uint32_t image_size,
 		}
 	}
 
+	/*
+	 * FIXME: Need to disable dcache on MX7 is there an IROM
+	 * register like on MX6 above ? Certain images called in certain
+	 * orders with the dcache switched on will cause
+	 * authenticate_image() to lockup. Switching off the dcache
+	 * resolves the issue.
+	 * https://community.nxp.com/message/953261
+	 */
+	if (is_soc_type(MXC_SOC_MX7))
+		dcache_disable();
+
 	load_addr = (uint32_t)hab_rvt_authenticate_image(
 			HAB_CID_UBOOT,
 			ivt_offset, (void **)&start,
 			(size_t *)&bytes, NULL);
+
+	if (is_soc_type(MXC_SOC_MX7))
+		dcache_enable();
+
 	if (hab_rvt_exit() != HAB_SUCCESS) {
 		puts("hab exit function fail\n");
 		load_addr = 0;