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[81.169.180.215]) by mx.google.com with ESMTP id p32si1489575edp.271.2017.12.27.04.44.49; Wed, 27 Dec 2017 04:44:49 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 81.169.180.215 as permitted sender) client-ip=81.169.180.215; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=J2fGwc7B; spf=pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 81.169.180.215 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: by lists.denx.de (Postfix, from userid 105) id 576E8C21DF1; Wed, 27 Dec 2017 12:35:12 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=-0.0 required=5.0 tests=RCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL, T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 5860AC21E37; Wed, 27 Dec 2017 12:33:05 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 9540DC21C4A; Wed, 27 Dec 2017 12:26:26 +0000 (UTC) Received: from mail-wm0-f68.google.com (mail-wm0-f68.google.com [74.125.82.68]) by lists.denx.de (Postfix) with ESMTPS id 33F75C21C34 for ; Wed, 27 Dec 2017 12:26:26 +0000 (UTC) Received: by mail-wm0-f68.google.com with SMTP id g75so39385447wme.0 for ; Wed, 27 Dec 2017 04:26:26 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=Oi7DS37pWRJsCdGVeTtVpYwPLyLyoPHxdf3qVi375TY=; b=J2fGwc7BFS0zPcdl18zGHWDav6mK96pzVlGiv6MRTYpGzjRwrapG1woz3tUkmN9WBB GTGR0J9CbHsGigLCfE81rGZn6Dv105i1grGc2xZ0P/t7NAQtX/nMfSFs4LTV+Ey7+DrW 8lc4pLmD1Zgk0BOUbF/G3ZfThhKVt2zGLACMo= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=Oi7DS37pWRJsCdGVeTtVpYwPLyLyoPHxdf3qVi375TY=; b=I4Y72KdUZZLQePYNch+DAtj4RK1QQ9nMOvSMwIln/bOLpFYhtrkTya/Cb7472fuIo4 whrmfuZZrAVGxKCaAxy+m7D9PA+zJ6CPP3mLALsRbREH7hedFj9ZsbXTd4aqi+iZ9Qyz gTbJVJtlnCfgapdPn9y3+aoF4z6hmEUV9l9J8Qtlj0D3Z91yN+bkvyeRIHoNOFOvt7xy SFf5wcXjhS8IEysyMrQQrY1tjVlLBVWrp3Wj9msqxWMNjg9omTHPEF59ugPOlAWgywJp sCxrpeQebq0uDV94zmeuK+QFx5xfur3UPyaKm3b2lQS/xvthPOOZoZBFzl4d3+HQcsFI LsOQ== X-Gm-Message-State: AKGB3mIG+2LPNKPraqTucADiuimiZpqWZx1JZB5jnJxBhzjQ3QV5B/yh xKx/go9odA1cQIubHMr03OHc1T6DDKw= X-Received: by 10.80.134.197 with SMTP id 5mr35688984edu.129.1514377585589; Wed, 27 Dec 2017 04:26:25 -0800 (PST) Received: from localhost.localdomain ([109.255.42.2]) by smtp.gmail.com with ESMTPSA id a5sm28388838edm.47.2017.12.27.04.26.24 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 27 Dec 2017 04:26:24 -0800 (PST) From: Bryan O'Donoghue To: u-boot@lists.denx.de Date: Wed, 27 Dec 2017 12:25:49 +0000 Message-Id: <1514377566-28512-7-git-send-email-bryan.odonoghue@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1514377566-28512-1-git-send-email-bryan.odonoghue@linaro.org> References: <1514377566-28512-1-git-send-email-bryan.odonoghue@linaro.org> X-Mailman-Approved-At: Wed, 27 Dec 2017 12:32:58 +0000 Cc: Fabio Estevam Subject: [U-Boot] [PATCH 06/23] arm: imx: hab: Fix authenticate image lockup on MX7 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" The i.MX6 has some pretty explicit code associated with informing the IROM about flushing caches during authenticate_image(). Looking at various pieces of documentation its pretty clear the i.MX6 IROM registers are not documented and absent similar documentation on the i.MX7 the next-best fix is to disabled the dcache while making an authenticate_image() callback. This patch therefore disables dcache temporarily while doing an IROM authenticate_image() callback, thus resolving a lockup encountered in a complex set of authenticate-image calls observed. Note there is no appreciable performance impact with dcache switched off so this fix is relatively pain-free. Signed-off-by: Bryan O'Donoghue Cc: Stefano Babic Cc: Fabio Estevam Cc: Peng Fan Cc: Albert Aribaud Cc: Sven Ebenfeld Cc: George McCollister --- arch/arm/mach-imx/hab.c | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/arch/arm/mach-imx/hab.c b/arch/arm/mach-imx/hab.c index de1779c..52dff01 100644 --- a/arch/arm/mach-imx/hab.c +++ b/arch/arm/mach-imx/hab.c @@ -466,10 +466,25 @@ int authenticate_image(uint32_t ddr_start, uint32_t image_size, } } + /* + * FIXME: Need to disable dcache on MX7 is there an IROM + * register like on MX6 above ? Certain images called in certain + * orders with the dcache switched on will cause + * authenticate_image() to lockup. Switching off the dcache + * resolves the issue. + * https://community.nxp.com/message/953261 + */ + if (is_soc_type(MXC_SOC_MX7)) + dcache_disable(); + load_addr = (uint32_t)hab_rvt_authenticate_image( HAB_CID_UBOOT, ivt_offset, (void **)&start, (size_t *)&bytes, NULL); + + if (is_soc_type(MXC_SOC_MX7)) + dcache_enable(); + if (hab_rvt_exit() != HAB_SUCCESS) { puts("hab exit function fail\n"); load_addr = 0;