From patchwork Mon Oct 22 12:32:05 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ulf Hansson X-Patchwork-Id: 12401 Return-Path: X-Original-To: patchwork@peony.canonical.com Delivered-To: patchwork@peony.canonical.com Received: from fiordland.canonical.com (fiordland.canonical.com [91.189.94.145]) by peony.canonical.com (Postfix) with ESMTP id 3457F23FB7 for ; Mon, 22 Oct 2012 12:32:36 +0000 (UTC) Received: from mail-ie0-f180.google.com (mail-ie0-f180.google.com [209.85.223.180]) by fiordland.canonical.com (Postfix) with ESMTP id 8DD54A185A0 for ; Mon, 22 Oct 2012 12:32:35 +0000 (UTC) Received: by mail-ie0-f180.google.com with SMTP id e10so3320800iej.11 for ; Mon, 22 Oct 2012 05:32:35 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-forwarded-to:x-forwarded-for:delivered-to:received-spf:from:to:cc :subject:date:message-id:x-mailer:in-reply-to:references :mime-version:content-type:x-gm-message-state; bh=BxXd7qWSwkNTcz4A5hKhogZvWNpV4WV0G7Db+9VHyPE=; b=UM+la8NtynVJSpa6yGA9VJPvMYOVuY4j04zTr0izk1f1aycX7W7Lu6Y2Fqy4hnY58u zVrSnA9vmZUoVlzVLIyNH++LGBDqmg+0K/nN5JN8JV/ljR/T3N6qoK+iuYClsjH7ecYG /ZH0B/09SZ8LuzVwQJpc1qLPsdTlOsunw6SuR6dbwZDheosEC5lDMApP1/bulKlQlPcD py9QUYJWTDtcK0PWcA+oNZLm13jpqClrUbuQRr4TmAKdszrw3H59vGNblCmtegR3t2qW F4zeaCwyXatNfK27ZtEmh1mquMSzVP04RzTboAABrl8gBjupjg+8qMm+SNOCqo/1Wcaj tlTA== Received: by 10.50.91.195 with SMTP id cg3mr15941482igb.57.1350909154956; Mon, 22 Oct 2012 05:32:34 -0700 (PDT) X-Forwarded-To: linaro-patchwork@canonical.com X-Forwarded-For: patch@linaro.org linaro-patchwork@canonical.com Delivered-To: patches@linaro.org Received: by 10.50.67.148 with SMTP id n20csp223887igt; Mon, 22 Oct 2012 05:32:33 -0700 (PDT) Received: by 10.14.219.2 with SMTP id l2mr6308769eep.3.1350909153199; Mon, 22 Oct 2012 05:32:33 -0700 (PDT) Received: from eu1sys200aog120.obsmtp.com (eu1sys200aog120.obsmtp.com [207.126.144.149]) by mx.google.com with SMTP id j5si5957266eeo.50.2012.10.22.05.32.21 (version=TLSv1/SSLv3 cipher=OTHER); Mon, 22 Oct 2012 05:32:33 -0700 (PDT) Received-SPF: neutral (google.com: 207.126.144.149 is neither permitted nor denied by best guess record for domain of ulf.hansson@stericsson.com) client-ip=207.126.144.149; Authentication-Results: mx.google.com; spf=neutral (google.com: 207.126.144.149 is neither permitted nor denied by best guess record for domain of ulf.hansson@stericsson.com) smtp.mail=ulf.hansson@stericsson.com Received: from beta.dmz-ap.st.com ([138.198.100.35]) (using TLSv1) by eu1sys200aob120.postini.com ([207.126.147.11]) with SMTP ID DSNKUIU81D92f6HEJUx3OmjLKVaIwYRyXiEv@postini.com; Mon, 22 Oct 2012 12:32:32 UTC Received: from zeta.dmz-ap.st.com (ns6.st.com [138.198.234.13]) by beta.dmz-ap.st.com (STMicroelectronics) with ESMTP id 841A1B7; Mon, 22 Oct 2012 12:24:01 +0000 (GMT) Received: from relay1.stm.gmessaging.net (unknown [10.230.100.17]) by zeta.dmz-ap.st.com (STMicroelectronics) with ESMTP id 0EFF5BEF; Mon, 22 Oct 2012 12:32:13 +0000 (GMT) Received: from exdcvycastm003.EQ1STM.local (alteon-source-exch [10.230.100.61]) (using TLSv1 with cipher RC4-MD5 (128/128 bits)) (Client CN "exdcvycastm003", Issuer "exdcvycastm003" (not verified)) by relay1.stm.gmessaging.net (Postfix) with ESMTPS id 8C89624C07D; Mon, 22 Oct 2012 14:32:05 +0200 (CEST) Received: from steludxu1397.lud.stericsson.com (10.230.100.153) by smtp.stericsson.com (10.230.100.1) with Microsoft SMTP Server (TLS) id 8.3.83.0; Mon, 22 Oct 2012 14:32:12 +0200 From: Ulf Hansson To: Liam Girdwood , Mark Brown , , Cc: , Linus Walleij , Lee Jones , Ola Lilja , Ulf Hansson Subject: [PATCH 2/2] ASoC: Ux500: Control apb clock Date: Mon, 22 Oct 2012 14:32:05 +0200 Message-ID: <1350909125-20189-2-git-send-email-ulf.hansson@stericsson.com> X-Mailer: git-send-email 1.7.10 In-Reply-To: <1350909125-20189-1-git-send-email-ulf.hansson@stericsson.com> References: <1350909125-20189-1-git-send-email-ulf.hansson@stericsson.com> MIME-Version: 1.0 X-Gm-Message-State: ALoCoQnlic7dAmz640NC3a6NAfO0VVXe0v3Hj7uUyUiWOkXm5Ekv670LoFRXt+QfyAhKrmkgAjpg From: Ulf Hansson When switching to common clock driver for ux500 this clock needs to be handled as well. Before this clock was internally managed by the clock driver itself. Signed-off-by: Ulf Hansson --- sound/soc/ux500/ux500_msp_dai.c | 38 ++++++++++++++++++++++++++++++++------ sound/soc/ux500/ux500_msp_dai.h | 1 + 2 files changed, 33 insertions(+), 6 deletions(-) diff --git a/sound/soc/ux500/ux500_msp_dai.c b/sound/soc/ux500/ux500_msp_dai.c index e11187f..74bb3c0 100644 --- a/sound/soc/ux500/ux500_msp_dai.c +++ b/sound/soc/ux500/ux500_msp_dai.c @@ -398,13 +398,28 @@ static int ux500_msp_dai_startup(struct snd_pcm_substream *substream, return ret; } - /* Prepare and enable clock */ - dev_dbg(dai->dev, "%s: Enabling MSP-clock.\n", __func__); + /* Prepare and enable clocks */ + dev_dbg(dai->dev, "%s: Enabling MSP-clocks.\n", __func__); + ret = clk_prepare_enable(drvdata->pclk); + if (ret) { + dev_err(drvdata->msp->dev, + "%s: Failed to prepare/enable pclk!\n", __func__); + goto err_pclk; + } + ret = clk_prepare_enable(drvdata->clk); - if (ret) - regulator_disable(drvdata->reg_vape); + if (ret) { + dev_err(drvdata->msp->dev, + "%s: Failed to prepare/enable clk!\n", __func__); + goto err_clk; + } return ret; +err_clk: + clk_disable_unprepare(drvdata->pclk); +err_pclk: + regulator_disable(drvdata->reg_vape); + return ret; } static void ux500_msp_dai_shutdown(struct snd_pcm_substream *substream, @@ -430,8 +445,9 @@ static void ux500_msp_dai_shutdown(struct snd_pcm_substream *substream, __func__, dai->id, snd_pcm_stream_str(substream)); } - /* Disable and unprepare clock */ + /* Disable and unprepare clocks */ clk_disable_unprepare(drvdata->clk); + clk_disable_unprepare(drvdata->pclk); /* Disable regulator */ ret = regulator_disable(drvdata->reg_vape); @@ -782,6 +798,14 @@ static int __devinit ux500_msp_drv_probe(struct platform_device *pdev) } prcmu_qos_add_requirement(PRCMU_QOS_APE_OPP, (char *)pdev->name, 50); + drvdata->pclk = clk_get(&pdev->dev, "apb_pclk"); + if (IS_ERR(drvdata->pclk)) { + ret = (int)PTR_ERR(drvdata->pclk); + dev_err(&pdev->dev, "%s: ERROR: clk_get of pclk failed (%d)!\n", + __func__, ret); + goto err_pclk; + } + drvdata->clk = clk_get(&pdev->dev, NULL); if (IS_ERR(drvdata->clk)) { ret = (int)PTR_ERR(drvdata->clk); @@ -812,8 +836,9 @@ static int __devinit ux500_msp_drv_probe(struct platform_device *pdev) err_init_msp: clk_put(drvdata->clk); - err_clk: + clk_put(drvdata->pclk); +err_pclk: devm_regulator_put(drvdata->reg_vape); return ret; @@ -829,6 +854,7 @@ static int __devexit ux500_msp_drv_remove(struct platform_device *pdev) prcmu_qos_remove_requirement(PRCMU_QOS_APE_OPP, "ux500_msp_i2s"); clk_put(drvdata->clk); + clk_put(drvdata->pclk); ux500_msp_i2s_cleanup_msp(pdev, drvdata->msp); diff --git a/sound/soc/ux500/ux500_msp_dai.h b/sound/soc/ux500/ux500_msp_dai.h index 98202a3..9c778d9 100644 --- a/sound/soc/ux500/ux500_msp_dai.h +++ b/sound/soc/ux500/ux500_msp_dai.h @@ -69,6 +69,7 @@ struct ux500_msp_i2s_drvdata { /* Clocks */ unsigned int master_clk; struct clk *clk; + struct clk *pclk; /* Regulators */ int vape_opp_constraint;