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[131.252.210.177]) by mx.google.com with ESMTPS id h9-v6si3736307plt.274.2018.01.26.05.20.50 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 26 Jan 2018 05:20:51 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) client-ip=131.252.210.177; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=Oluizxxs; spf=pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id E79166E22D; Fri, 26 Jan 2018 13:20:49 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail-lf0-x241.google.com (mail-lf0-x241.google.com [IPv6:2a00:1450:4010:c07::241]) by gabe.freedesktop.org (Postfix) with ESMTPS id E88756E22D for ; Fri, 26 Jan 2018 13:20:47 +0000 (UTC) Received: by mail-lf0-x241.google.com with SMTP id t139so678565lff.0 for ; Fri, 26 Jan 2018 05:20:47 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=LUficvmegzKDbUcrg7I8TqzLHSxG4Y8MvxG3dxl22Cg=; b=OluizxxsH8XROfT+MlUFv2CD8QYIyL11Mmf73X/hIs7jU6sgCiDCdI34DYooc7wyRL zWRGYMWFzd/jTcb8Et+SQbmO7SlcKuO+HF//3o1qHCKIU0ujhvLXNv/3BGyfJPaSpCbU 3zm+3kk8vXgG1C4Y6yGNDsa01AtEigTn7tdgU= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=LUficvmegzKDbUcrg7I8TqzLHSxG4Y8MvxG3dxl22Cg=; b=WFaAyB/Aff+UnQJYg7NbE+KfH/qbtAQGsIAFb5LMIBT2GJSF54rBINhKv54ITZfMMy pfBe4y48HH6RiloUkmrenYuvgQEON8IahaIvTb+bV+emyzdN22zJ6qvJPMbt60HfGKTz 9BGRnFxXO2kKejRQHc6569MgVDSr6I59SZn/lzchI2/wjmJhzgEZTcLf/RcVRcLO/zJv EOB95eEX7BeQ+pts0W6IOKrgNbQgUF+B0iJ5ndWIOAiYkseY/77cQ/kcIpi243aAHsZs vlZatJdwwsnv5eqqfNqxvnqsr7O6sYdjoW3y58Ol74T7Zla89RvqGpHwirPv3mdvEBw2 87jg== X-Gm-Message-State: AKwxytcXdmWks2ocxivhJasz+9CMvRV7S0Iaup6rDMYduvYoI9I+XRir vFPiztP0VXb6M6N0pcFAJk3Rgg== X-Received: by 10.46.99.75 with SMTP id x72mr8702382ljb.136.1516972846404; Fri, 26 Jan 2018 05:20:46 -0800 (PST) Received: from genomnajs.ideon.se ([85.235.10.227]) by smtp.gmail.com with ESMTPSA id h15sm937704ljh.77.2018.01.26.05.20.45 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 26 Jan 2018 05:20:45 -0800 (PST) From: Linus Walleij To: Daniel Vetter , Jani Nikula , Sean Paul , Eric Anholt Subject: [PATCH 3/4] drm/pl111: Handle the Versatile RGB/BGR565 mode Date: Fri, 26 Jan 2018 14:20:32 +0100 Message-Id: <20180126132033.19744-3-linus.walleij@linaro.org> X-Mailer: git-send-email 2.14.3 In-Reply-To: <20180126132033.19744-1-linus.walleij@linaro.org> References: <20180126132033.19744-1-linus.walleij@linaro.org> X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-arm-kernel@lists.infradead.org, dri-devel@lists.freedesktop.org MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" The ARM Versatile series can do RGB/BGR565 with an external "PLD" (Programmable Logical Device). However the CLCD does not have control bits for this, so it needs to be set into the ordinary 16BPP mode, then the RGB/BGR565 handling of the pixel data is handled by configuring the PLD through the external register. Signed-off-by: Linus Walleij --- drivers/gpu/drm/pl111/pl111_display.c | 15 +++++++++++++-- drivers/gpu/drm/pl111/pl111_drv.c | 2 ++ 2 files changed, 15 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/pl111/pl111_display.c b/drivers/gpu/drm/pl111/pl111_display.c index 7fe4040aea46..90946fcd65ef 100644 --- a/drivers/gpu/drm/pl111/pl111_display.c +++ b/drivers/gpu/drm/pl111/pl111_display.c @@ -199,10 +199,17 @@ static void pl111_display_enable(struct drm_simple_display_pipe *pipe, cntl |= CNTL_LCDBPP24 | CNTL_BGR; break; case DRM_FORMAT_BGR565: - cntl |= CNTL_LCDBPP16_565; + if (priv->variant->is_pl110) + cntl |= CNTL_LCDBPP16; + else + cntl |= CNTL_LCDBPP16_565; break; case DRM_FORMAT_RGB565: - cntl |= CNTL_LCDBPP16_565 | CNTL_BGR; + if (priv->variant->is_pl110) + cntl |= CNTL_LCDBPP16; + else + cntl |= CNTL_LCDBPP16_565; + cntl |= CNTL_BGR; break; case DRM_FORMAT_ABGR1555: case DRM_FORMAT_XBGR1555: @@ -226,6 +233,10 @@ static void pl111_display_enable(struct drm_simple_display_pipe *pipe, break; } + /* The PL110+ does the BGR routing externally */ + if (priv->variant->is_pl110_plus) + cntl &= ~CNTL_BGR; + /* Power sequence: first enable and chill */ writel(cntl, priv->regs + priv->ctrl); diff --git a/drivers/gpu/drm/pl111/pl111_drv.c b/drivers/gpu/drm/pl111/pl111_drv.c index 8da75089dc59..f1f1b87b0e44 100644 --- a/drivers/gpu/drm/pl111/pl111_drv.c +++ b/drivers/gpu/drm/pl111/pl111_drv.c @@ -209,6 +209,8 @@ static const u32 pl110_pixel_formats[] = { DRM_FORMAT_XBGR8888, DRM_FORMAT_ARGB8888, DRM_FORMAT_XRGB8888, + DRM_FORMAT_BGR565, + DRM_FORMAT_RGB565, DRM_FORMAT_ABGR1555, DRM_FORMAT_XBGR1555, DRM_FORMAT_ARGB1555,