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[209.132.180.67]) by mx.google.com with ESMTP id i17si434451pfk.151.2018.01.30.18.01.18; Tue, 30 Jan 2018 18:01:18 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-crypto-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@nexus-software-ie.20150623.gappssmtp.com header.s=20150623 header.b=uJZSNvOc; spf=pass (google.com: best guess record for domain of linux-crypto-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-crypto-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753080AbeAaCBR (ORCPT + 1 other); Tue, 30 Jan 2018 21:01:17 -0500 Received: from mail-wm0-f66.google.com ([74.125.82.66]:34139 "EHLO mail-wm0-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752940AbeAaCAr (ORCPT ); Tue, 30 Jan 2018 21:00:47 -0500 Received: by mail-wm0-f66.google.com with SMTP id j21so6196766wmh.1 for ; Tue, 30 Jan 2018 18:00:47 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nexus-software-ie.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=k/mtmFcZjhbujFvF90cmhZRC2Eyj/wHY3siJgMSaLUk=; b=uJZSNvOcxawQk0MZ1+a1V55xeH+ORmOdxI38FnCO3GzQVeXpLoIkfOpbaBgyK4fe7T qwDfTWQ74m98ap6Xnax8jIZINhfRltcFpdIMgESZpfQ8gSCU5E211HNkfxdtzOE3TYYE mZGHZBpQ/euMTQQwTF8yq+X4EPvH3C7pCxfLBC7uNB1tON/3fYp97bCWXHNB1vchqnpD vbCAlJwNc8qFBxL95KUQ/HFA9/hXjtDjnoqQrZqKcUi/XOCGWREIr77JbOHdf39C6qHl kjfJjKDKiwT5oCZ0ZFdQxqke7sDlhrSzlTybz2EYFxy5PVqim7uk2jMGnUt8MAynSRo3 zciQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=k/mtmFcZjhbujFvF90cmhZRC2Eyj/wHY3siJgMSaLUk=; b=jzAQ5DGrKeXlHU2n8jYH86bbwsv+yd7T4Ub66UakQF6qTBRhJ6L6zXjaxpqR0bBzN/ ujd9MbUF+g5TXnoxTFVlSNMq57oqrtwO/VOkFWGJZjq4s1TRIuYikuihLvqavx7yeWIn fmq3OYt6AUL1vT5mYwrMgV8dxriH/RKYaQtc9B5ZCZi680X0g6fjnhS+SrHN39d/D18D Ijna3C9qTfpjppsQS84PMfoWMX7/keAcGmBrhHqHBfqWOgIZv5LY5Q6FW7UogUfX2AY3 wjx0rpgyLFlxPo7RXL4bCpZv95G4GkwjC5rPyLCAa4odRIUAYax0ZVl+/t353l6eLhAW Tl1g== X-Gm-Message-State: AKwxytc/X8EvjagfEvF5rAzTCaYFWfxNnQ3wfiKdoLLvsclSpJeEhndw 6OW2xRMvm7aRNhJky6yKBi3DEw== X-Received: by 10.80.139.2 with SMTP id l2mr55007640edl.14.1517364046619; Tue, 30 Jan 2018 18:00:46 -0800 (PST) Received: from localhost.localdomain ([109.255.42.2]) by smtp.gmail.com with ESMTPSA id w26sm9030867edw.7.2018.01.30.18.00.45 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 30 Jan 2018 18:00:46 -0800 (PST) From: Bryan O'Donoghue To: horia.geanta@nxp.com, aymen.sghaier@nxp.com, linux-crypto@vger.kernel.org, linux-kernel@vger.kernel.org Cc: fabio.estevam@nxp.com, peng.fan@nxp.com, davem@davemloft.net, lukas.auer@aisec.fraunhofer.de, rui.silva@linaro.org, ryan.harkin@linaro.org, Michael Turquette , Stephen Boyd , linux-clk@vger.kernel.org, Bryan O'Donoghue Subject: [PATCH v3 4/5] clk: imx7d: add CAAM clock Date: Wed, 31 Jan 2018 02:00:39 +0000 Message-Id: <1517364040-27607-5-git-send-email-pure.logic@nexus-software.ie> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1517364040-27607-1-git-send-email-pure.logic@nexus-software.ie> References: <1517364040-27607-1-git-send-email-pure.logic@nexus-software.ie> MIME-Version: 1.0 Sender: linux-crypto-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-crypto@vger.kernel.org From: Rui Miguel Silva Add CAAM clock so that we could use the Cryptographic Acceleration and Assurance Module (CAAM) hardware block. Signed-off-by: Rui Miguel Silva Cc: Michael Turquette Cc: Stephen Boyd Cc: linux-clk@vger.kernel.org Cc: "Horia Geantă" Cc: Aymen Sghaier Cc: Fabio Estevam Cc: Peng Fan Cc: "David S. Miller" Cc: Lukas Auer Signed-off-by: Bryan O'Donoghue --- drivers/clk/imx/clk-imx7d.c | 1 + include/dt-bindings/clock/imx7d-clock.h | 3 ++- 2 files changed, 3 insertions(+), 1 deletion(-) -- 2.7.4 Reviewed-by: Fabio Estevam diff --git a/drivers/clk/imx/clk-imx7d.c b/drivers/clk/imx/clk-imx7d.c index 80dc211..52ab096 100644 --- a/drivers/clk/imx/clk-imx7d.c +++ b/drivers/clk/imx/clk-imx7d.c @@ -795,6 +795,7 @@ static void __init imx7d_clocks_init(struct device_node *ccm_node) clks[IMX7D_DRAM_PHYM_ALT_ROOT_CLK] = imx_clk_gate4("dram_phym_alt_root_clk", "dram_phym_alt_post_div", base + 0x4130, 0); clks[IMX7D_DRAM_ALT_ROOT_CLK] = imx_clk_gate4("dram_alt_root_clk", "dram_alt_post_div", base + 0x4130, 0); clks[IMX7D_OCOTP_CLK] = imx_clk_gate4("ocotp_clk", "ipg_root_clk", base + 0x4230, 0); + clks[IMX7D_CAAM_CLK] = imx_clk_gate4("caam_clk", "ipg_root_clk", base + 0x4240, 0); clks[IMX7D_USB_HSIC_ROOT_CLK] = imx_clk_gate4("usb_hsic_root_clk", "usb_hsic_post_div", base + 0x4420, 0); clks[IMX7D_SDMA_CORE_CLK] = imx_clk_gate4("sdma_root_clk", "ahb_root_clk", base + 0x4480, 0); clks[IMX7D_PCIE_CTRL_ROOT_CLK] = imx_clk_gate4("pcie_ctrl_root_clk", "pcie_ctrl_post_div", base + 0x4600, 0); diff --git a/include/dt-bindings/clock/imx7d-clock.h b/include/dt-bindings/clock/imx7d-clock.h index e2f99ae..2bc5618 100644 --- a/include/dt-bindings/clock/imx7d-clock.h +++ b/include/dt-bindings/clock/imx7d-clock.h @@ -452,5 +452,6 @@ #define IMX7D_OCOTP_CLK 439 #define IMX7D_NAND_RAWNAND_CLK 440 #define IMX7D_NAND_USDHC_BUS_RAWNAND_CLK 441 -#define IMX7D_CLK_END 442 +#define IMX7D_CAAM_CLK 442 +#define IMX7D_CLK_END 443 #endif /* __DT_BINDINGS_CLOCK_IMX7D_H */