[11/24] fpu/soft-fp: Adjust soft-fp types

Message ID	20180204041136.17525-12-richard.henderson@linaro.org
State	New
Headers	show Delivered-To: patch@linaro.org Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) client-ip=2001:4830:134:3::11; From: Richard Henderson <richard.henderson@linaro.org> To: qemu-devel@nongnu.org Date: Sat, 3 Feb 2018 20:11:23 -0800 Message-Id: <20180204041136.17525-12-richard.henderson@linaro.org> In-Reply-To: <20180204041136.17525-1-richard.henderson@linaro.org> References: <20180204041136.17525-1-richard.henderson@linaro.org> Subject: [Qemu-devel] [PATCH 11/24] fpu/soft-fp: Adjust soft-fp types Precedence: list Cc: peter.maydell@linaro.org, cota@braap.org, alex.bennee@linaro.org, hsp.cat7@gmail.com Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" <qemu-devel-bounces+patch=linaro.org@nongnu.org>
Series	re-factor and add fp16 using glibc soft-fp \| expand [00/24] re-factor and add fp16 using glibc soft-fp [01/24] fpu/softfloat: implement float16_squash_input_denormal [02/24] include/fpu/softfloat: remove USE_SOFTFLOAT_STRUCT_TYPES [03/24] fpu/softfloat-types: new header to prevent excessive re-builds [04/24] target/*/cpu.h: remove softfloat.h [05/24] include/fpu/softfloat: implement float16_abs helper [06/24] include/fpu/softfloat: implement float16_chs helper [07/24] include/fpu/softfloat: implement float16_set_sign helper [08/24] include/fpu/softfloat: add some float16 constants [09/24] fpu/softfloat: improve comments on ARM NaN propagation [10/24] fpu/soft-fp: Import soft-fp from glibc [11/24] fpu/soft-fp: Adjust soft-fp types [12/24] fpu/soft-fp: Add ties_away and to_odd rounding modes [13/24] fpu/soft-fp: Add arithmetic macros to half.h [14/24] fpu/soft-fp: Adjust _FP_CMP_CHECK_NAN [15/24] fpu: Implement add/sub/mul/div with soft-fp.h [16/24] fpu: Implement float_to_int/uint with soft-fp.h [17/24] fpu: Implement int/uint_to_float with soft-fp.h [18/24] fpu: Implement compares with soft-fp.h [19/24] fpu: Implement min/max with soft-fp.h [20/24] fpu: Implement sqrt with soft-fp.h [21/24] fpu: Implement scalbn with soft-fp.h [22/24] fpu: Implement float_to_float with soft-fp.h [23/24] fpu: Implement muladd with soft-fp.h [24/24] fpu: Implement round_to_int with soft-fp.h

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20180204041136.17525-12-richard.henderson@linaro.org

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From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Date: Sat,  3 Feb 2018 20:11:23 -0800
Message-Id: <20180204041136.17525-12-richard.henderson@linaro.org>
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Subject: [Qemu-devel] [PATCH 11/24] fpu/soft-fp: Adjust soft-fp types
Precedence: list
Cc: peter.maydell@linaro.org, cota@braap.org, alex.bennee@linaro.org,
	hsp.cat7@gmail.com
Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org
Sender: "Qemu-devel" <qemu-devel-bounces+patch=linaro.org@nongnu.org>

Series

re-factor and add fp16 using glibc soft-fp | expand

Commit Message

Richard Henderson Feb. 4, 2018, 4:11 a.m. UTC

Glibc uses host compiler floating-point types for packing.
We need to use softfloat.h types.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

---
 fpu/double.h | 6 ++----
 fpu/half.h   | 4 +---
 fpu/quad.h   | 6 ++----
 fpu/single.h | 4 +---
 4 files changed, 6 insertions(+), 14 deletions(-)

-- 
2.14.3

diff --git a/fpu/double.h b/fpu/double.h
index f6c83d7253..6f8fe49a7d 100644
--- a/fpu/double.h
+++ b/fpu/double.h
@@ -69,13 +69,11 @@ 
 #define _FP_HIGHBIT_DW_D	\
   ((_FP_W_TYPE) 1 << (_FP_WFRACBITS_DW_D - 1) % _FP_W_TYPE_SIZE)
 
-typedef float DFtype __attribute__ ((mode (DF)));
-
 #if _FP_W_TYPE_SIZE < 64
 
 union _FP_UNION_D
 {
-  DFtype flt;
+  float64 flt;
   struct _FP_STRUCT_LAYOUT
   {
 # if __BYTE_ORDER == __BIG_ENDIAN
@@ -198,7 +196,7 @@  union _FP_UNION_D
 
 union _FP_UNION_D
 {
-  DFtype flt;
+  float64 flt;
   struct _FP_STRUCT_LAYOUT
   {
 # if __BYTE_ORDER == __BIG_ENDIAN
diff --git a/fpu/half.h b/fpu/half.h
index ea28db6c18..75a3168a75 100644
--- a/fpu/half.h
+++ b/fpu/half.h
@@ -59,11 +59,9 @@ 
 /* The implementation of _FP_MUL_MEAT_H and _FP_DIV_MEAT_H should be
    chosen by the target machine.  */
 
-typedef float HFtype __attribute__ ((mode (HF)));
-
 union _FP_UNION_H
 {
-  HFtype flt;
+  float16 flt;
   struct _FP_STRUCT_LAYOUT
   {
 #if __BYTE_ORDER == __BIG_ENDIAN
diff --git a/fpu/quad.h b/fpu/quad.h
index 71621f01bf..24a3245fb7 100644
--- a/fpu/quad.h
+++ b/fpu/quad.h
@@ -69,13 +69,11 @@ 
 #define _FP_HIGHBIT_DW_Q	\
   ((_FP_W_TYPE) 1 << (_FP_WFRACBITS_DW_Q - 1) % _FP_W_TYPE_SIZE)
 
-typedef float TFtype __attribute__ ((mode (TF)));
-
 #if _FP_W_TYPE_SIZE < 64
 
 union _FP_UNION_Q
 {
-  TFtype flt;
+  float128 flt;
   struct _FP_STRUCT_LAYOUT
   {
 # if __BYTE_ORDER == __BIG_ENDIAN
@@ -202,7 +200,7 @@  union _FP_UNION_Q
 #else   /* not _FP_W_TYPE_SIZE < 64 */
 union _FP_UNION_Q
 {
-  TFtype flt /* __attribute__ ((mode (TF))) */ ;
+  float128 flt;
   struct _FP_STRUCT_LAYOUT
   {
     _FP_W_TYPE a, b;
diff --git a/fpu/single.h b/fpu/single.h
index 2918f78d97..91252f82ff 100644
--- a/fpu/single.h
+++ b/fpu/single.h
@@ -66,11 +66,9 @@ 
 /* The implementation of _FP_MUL_MEAT_S and _FP_DIV_MEAT_S should be
    chosen by the target machine.  */
 
-typedef float SFtype __attribute__ ((mode (SF)));
-
 union _FP_UNION_S
 {
-  SFtype flt;
+  float32 flt;
   struct _FP_STRUCT_LAYOUT
   {
 #if __BYTE_ORDER == __BIG_ENDIAN

[11/24] fpu/soft-fp: Adjust soft-fp types

Commit Message

Patch