From patchwork Wed Nov 7 15:42:42 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ulf Hansson X-Patchwork-Id: 12716 Return-Path: X-Original-To: patchwork@peony.canonical.com Delivered-To: patchwork@peony.canonical.com Received: from fiordland.canonical.com (fiordland.canonical.com [91.189.94.145]) by peony.canonical.com (Postfix) with ESMTP id A920023E37 for ; Wed, 7 Nov 2012 15:43:06 +0000 (UTC) Received: from mail-ia0-f180.google.com (mail-ia0-f180.google.com [209.85.210.180]) by fiordland.canonical.com (Postfix) with ESMTP id E63C5A1896A for ; Wed, 7 Nov 2012 15:43:05 +0000 (UTC) Received: by mail-ia0-f180.google.com with SMTP id f6so1148365iag.11 for ; Wed, 07 Nov 2012 07:43:05 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-forwarded-to:x-forwarded-for:delivered-to:received-spf:from:to:cc :subject:date:message-id:x-mailer:in-reply-to:references :mime-version:content-type:x-gm-message-state; bh=KlR8dRzOZDXX4OZg9W8PAVmoKnt5YhudMY3gyB6+BDU=; b=UHnZnDPmq41RHx/QceD0n0bbRIKNxpVEhiy/4WPcczapE1KRHEbk7mk8TkAlJndY71 Ww5p46zF1QoHTq/vlqmJ6OW/sZea3m6wsgM75mcAqxm1K4uYkJOLdRHT4ORvCwilF3Sj PODkoUSggqshv8x/tDFZLiiF4t3Lf1zKUAMQfB1Djjv9b8seRlhbX945g7SGWnnIRIli v1JG9gE1fX9tMwQtGcea0TtZrxorpMUzjevRUQo4ZjkgeeqLJ9ikN9MIsuDRFizt7n8+ 4VGL7KgzSqgIWAnNCu4vhQtov512K/ja7tx/gjq52Ou5SCsI8ewpev4GEwa0tClIILcE wuhg== Received: by 10.50.213.34 with SMTP id np2mr4967699igc.57.1352302985350; Wed, 07 Nov 2012 07:43:05 -0800 (PST) X-Forwarded-To: linaro-patchwork@canonical.com X-Forwarded-For: patch@linaro.org linaro-patchwork@canonical.com Delivered-To: patches@linaro.org Received: by 10.50.67.148 with SMTP id n20csp233637igt; Wed, 7 Nov 2012 07:43:04 -0800 (PST) Received: by 10.14.221.8 with SMTP id q8mr16745331eep.28.1352302983498; Wed, 07 Nov 2012 07:43:03 -0800 (PST) Received: from eu1sys200aog120.obsmtp.com (eu1sys200aog120.obsmtp.com [207.126.144.149]) by mx.google.com with SMTP id m46si6168461eeo.137.2012.11.07.07.42.51 (version=TLSv1/SSLv3 cipher=OTHER); Wed, 07 Nov 2012 07:43:03 -0800 (PST) Received-SPF: neutral (google.com: 207.126.144.149 is neither permitted nor denied by best guess record for domain of ulf.hansson@stericsson.com) client-ip=207.126.144.149; Authentication-Results: mx.google.com; spf=neutral (google.com: 207.126.144.149 is neither permitted nor denied by best guess record for domain of ulf.hansson@stericsson.com) smtp.mail=ulf.hansson@stericsson.com Received: from beta.dmz-us.st.com ([167.4.1.35]) (using TLSv1) by eu1sys200aob120.postini.com ([207.126.147.11]) with SMTP ID DSNKUJqBex6Yu2JJgD2KyS3cL3tiVdkHtYaK@postini.com; Wed, 07 Nov 2012 15:43:03 UTC Received: from zeta.dmz-us.st.com (ns4.st.com [167.4.16.71]) by beta.dmz-us.st.com (STMicroelectronics) with ESMTP id 1B7C750; Wed, 7 Nov 2012 15:42:15 +0000 (GMT) Received: from relay1.stm.gmessaging.net (unknown [10.230.100.17]) by zeta.dmz-us.st.com (STMicroelectronics) with ESMTP id 92D2A62; Wed, 7 Nov 2012 10:59:49 +0000 (GMT) Received: from exdcvycastm022.EQ1STM.local (alteon-source-exch [10.230.100.61]) (using TLSv1 with cipher RC4-MD5 (128/128 bits)) (Client CN "exdcvycastm022", Issuer "exdcvycastm022" (not verified)) by relay1.stm.gmessaging.net (Postfix) with ESMTPS id A824224C07C; Wed, 7 Nov 2012 16:42:40 +0100 (CET) Received: from steludxu1397.lud.stericsson.com (10.230.100.153) by smtp.stericsson.com (10.230.100.30) with Microsoft SMTP Server (TLS) id 8.3.83.0; Wed, 7 Nov 2012 16:42:47 +0100 From: Ulf Hansson To: Liam Girdwood , Mark Brown , , Cc: , Linus Walleij , Lee Jones , Ola Lilja , Ulf Hansson Subject: [RESEND PATCH 2/2] ASoC: Ux500: Control apb clock Date: Wed, 7 Nov 2012 16:42:42 +0100 Message-ID: <1352302962-25201-2-git-send-email-ulf.hansson@stericsson.com> X-Mailer: git-send-email 1.7.10 In-Reply-To: <1352302962-25201-1-git-send-email-ulf.hansson@stericsson.com> References: <1352302962-25201-1-git-send-email-ulf.hansson@stericsson.com> MIME-Version: 1.0 X-Gm-Message-State: ALoCoQmaw/E3zrQkrv5Hl/i9OZhNdBL3b5GFXUioP1hwvoAd0l1Ynhoq5JPH739+P0PbdS1+/ghx From: Ulf Hansson When switching to common clock driver for ux500 this clock needs to be handled as well. Before this clock was internally managed by the clock driver itself. Acked-by: Linus Walleij Signed-off-by: Ulf Hansson --- sound/soc/ux500/ux500_msp_dai.c | 38 ++++++++++++++++++++++++++++++++------ sound/soc/ux500/ux500_msp_dai.h | 1 + 2 files changed, 33 insertions(+), 6 deletions(-) diff --git a/sound/soc/ux500/ux500_msp_dai.c b/sound/soc/ux500/ux500_msp_dai.c index e11187f..74bb3c0 100644 --- a/sound/soc/ux500/ux500_msp_dai.c +++ b/sound/soc/ux500/ux500_msp_dai.c @@ -398,13 +398,28 @@ static int ux500_msp_dai_startup(struct snd_pcm_substream *substream, return ret; } - /* Prepare and enable clock */ - dev_dbg(dai->dev, "%s: Enabling MSP-clock.\n", __func__); + /* Prepare and enable clocks */ + dev_dbg(dai->dev, "%s: Enabling MSP-clocks.\n", __func__); + ret = clk_prepare_enable(drvdata->pclk); + if (ret) { + dev_err(drvdata->msp->dev, + "%s: Failed to prepare/enable pclk!\n", __func__); + goto err_pclk; + } + ret = clk_prepare_enable(drvdata->clk); - if (ret) - regulator_disable(drvdata->reg_vape); + if (ret) { + dev_err(drvdata->msp->dev, + "%s: Failed to prepare/enable clk!\n", __func__); + goto err_clk; + } return ret; +err_clk: + clk_disable_unprepare(drvdata->pclk); +err_pclk: + regulator_disable(drvdata->reg_vape); + return ret; } static void ux500_msp_dai_shutdown(struct snd_pcm_substream *substream, @@ -430,8 +445,9 @@ static void ux500_msp_dai_shutdown(struct snd_pcm_substream *substream, __func__, dai->id, snd_pcm_stream_str(substream)); } - /* Disable and unprepare clock */ + /* Disable and unprepare clocks */ clk_disable_unprepare(drvdata->clk); + clk_disable_unprepare(drvdata->pclk); /* Disable regulator */ ret = regulator_disable(drvdata->reg_vape); @@ -782,6 +798,14 @@ static int __devinit ux500_msp_drv_probe(struct platform_device *pdev) } prcmu_qos_add_requirement(PRCMU_QOS_APE_OPP, (char *)pdev->name, 50); + drvdata->pclk = clk_get(&pdev->dev, "apb_pclk"); + if (IS_ERR(drvdata->pclk)) { + ret = (int)PTR_ERR(drvdata->pclk); + dev_err(&pdev->dev, "%s: ERROR: clk_get of pclk failed (%d)!\n", + __func__, ret); + goto err_pclk; + } + drvdata->clk = clk_get(&pdev->dev, NULL); if (IS_ERR(drvdata->clk)) { ret = (int)PTR_ERR(drvdata->clk); @@ -812,8 +836,9 @@ static int __devinit ux500_msp_drv_probe(struct platform_device *pdev) err_init_msp: clk_put(drvdata->clk); - err_clk: + clk_put(drvdata->pclk); +err_pclk: devm_regulator_put(drvdata->reg_vape); return ret; @@ -829,6 +854,7 @@ static int __devexit ux500_msp_drv_remove(struct platform_device *pdev) prcmu_qos_remove_requirement(PRCMU_QOS_APE_OPP, "ux500_msp_i2s"); clk_put(drvdata->clk); + clk_put(drvdata->pclk); ux500_msp_i2s_cleanup_msp(pdev, drvdata->msp); diff --git a/sound/soc/ux500/ux500_msp_dai.h b/sound/soc/ux500/ux500_msp_dai.h index 98202a3..9c778d9 100644 --- a/sound/soc/ux500/ux500_msp_dai.h +++ b/sound/soc/ux500/ux500_msp_dai.h @@ -69,6 +69,7 @@ struct ux500_msp_i2s_drvdata { /* Clocks */ unsigned int master_clk; struct clk *clk; + struct clk *pclk; /* Regulators */ int vape_opp_constraint;