From patchwork Thu Feb 8 17:31:40 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Alex_Benn=C3=A9e?= X-Patchwork-Id: 127718 Delivered-To: patch@linaro.org Received: by 10.46.124.24 with SMTP id x24csp1746102ljc; Thu, 8 Feb 2018 10:23:11 -0800 (PST) X-Google-Smtp-Source: AH8x224YRrAMuNhK82pvuINqguyPoFxDcSTWG4Zmmvq4Q1RXaI17kkRGrLtOaRoDvu5+ZCmheBCY X-Received: by 10.129.80.8 with SMTP id e8mr108890ywb.304.1518114191339; Thu, 08 Feb 2018 10:23:11 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1518114191; cv=none; d=google.com; s=arc-20160816; b=YuLHlTKSrB8D3SH9PCr/M4QCiIDsfCaGEcJwZFX/klW9avEmkMXXvT0/f/HLL1C9IN 5tTljaJn1zc1tBGrKtr9oTRTZOSka+v6A5Zq/A9/gXustoDNAZPH701RXCfr7b0kx3SV tOUrojS00WjRbmMzuH9EKtHHt5qQY4P62Y1NuwcpgL1aa5vqniZNoB2Fhs4D9+ntkGyZ fRhv96K/b1dkTzj0T3r31FglOyz/nr27kd6zZr0jIDcH/te/OOSQL0EZPGNlbUh1KKs7 bwmrb83qlqm23K2JhZwsgp9qjEGd3mOotA994FfJpPsCSfyDDzBE5zyjXyHDXU+qFkvD fkNA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject :content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:to:from:dkim-signature:arc-authentication-results; bh=PrFU6mvgIFJ2/2dCBmrKkTDu/E4N5l85cW4LYF+IZQ8=; b=M48u3q1nWTSjhB/fQvB/xXiOyHUwA/4gY4yrpNRnPa49UpMr9e3+fDurRPYpZIOVuB rW3u9T+gWBaBmv4Q9+xOrVLeZOQvY19WIpVTVTwdM9grfAItpjyQeYhlfnChmDzrJjQy g+ujSAb1R5bK3DHCqNwuZRnOlIpGhc+FxhwnhShfSLgo8Azh8MZjNXXtkPRq7kaSNM2T DvaK5l5NjheedCgW2lGdznZUddhNsloKr8z5p5YDGHJWx2TmiO6cLAEnN8SA+CN5nkit cexU58g99eC1fdkFFlEqp59D9MDabcfZ98MMaw7nXvqc23+EvmLJ/9kVJtqac7oGpbPy 3NXQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=h5PBRXyf; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom=qemu-devel-bounces+patch=linaro.org@nongnu.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [2001:4830:134:3::11]) by mx.google.com with ESMTPS id q26si86515ybj.787.2018.02.08.10.23.11 for (version=TLS1 cipher=AES128-SHA bits=128/128); Thu, 08 Feb 2018 10:23:11 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) client-ip=2001:4830:134:3::11; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=h5PBRXyf; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom=qemu-devel-bounces+patch=linaro.org@nongnu.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:59880 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ejqqk-0006ZM-Ia for patch@linaro.org; Thu, 08 Feb 2018 13:23:10 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:57411) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ejqBW-00030k-Bq for qemu-devel@nongnu.org; Thu, 08 Feb 2018 12:40:35 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ejqBU-0000U6-PR for qemu-devel@nongnu.org; Thu, 08 Feb 2018 12:40:34 -0500 Received: from mail-wr0-x243.google.com ([2a00:1450:400c:c0c::243]:45033) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1ejqBU-0000TA-DO for qemu-devel@nongnu.org; Thu, 08 Feb 2018 12:40:32 -0500 Received: by mail-wr0-x243.google.com with SMTP id v31so5567452wrc.11 for ; Thu, 08 Feb 2018 09:40:32 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=PrFU6mvgIFJ2/2dCBmrKkTDu/E4N5l85cW4LYF+IZQ8=; b=h5PBRXyfpDSs0V6ETC8FOIO0P5cgdnr0Cabqne1CUqi6dzfUh837zQAutmCFVDRxKU mXxUUZ+hyEhXR3d7n/IEK7CBuQfnkXes1PGz7/1cC1PiV+nC6g7T4OcweGD0WSP3gZbb 8rGC5KRzDclvzNW42wVDOqtdZU+dm+cO5eEzA= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=PrFU6mvgIFJ2/2dCBmrKkTDu/E4N5l85cW4LYF+IZQ8=; b=unyn/zxTvPI88ZNBiGFiJX1bUejBaE8WtvPoRZqAnY29jgtiqPNz/y9mCYg25B43oD 43TwFEmjoHpHGH5BtW74U0rUUG/K4VfHhESgtrvNETDGKvlB52qwhkmzf//NF62Tktka VrFo4iR9VyGnsf2OXU7lwmouWq72/eSk5QJxSwPdLdNuRCrMrtONJ0kDPuH0igXVfhVS FIEAwQwjPJoUOnoggQ8T8mOmMbKanuqrMeKFytlchY7qxmevlRdZUgz+f/KrHiwYlEIi 9Tz+byTupP7Lo695yXwb/REirZgsGPtIfde8jEHhb8U9StXKEqhea4NUIu0AMtJBiZH/ 32+w== X-Gm-Message-State: APf1xPDh/+LFkbTXjo+fJheeCND/2VkPbXvAKp6uQaHUlBXW4HQ/BrrN pPkvvo5WAS6e4MIrDf2/kGdO+A== X-Received: by 10.223.169.182 with SMTP id b51mr1467254wrd.244.1518111631277; Thu, 08 Feb 2018 09:40:31 -0800 (PST) Received: from zen.linaro.local ([81.128.185.34]) by smtp.gmail.com with ESMTPSA id l92sm558494wrc.31.2018.02.08.09.40.26 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 08 Feb 2018 09:40:29 -0800 (PST) Received: from zen.linaroharston (localhost [127.0.0.1]) by zen.linaro.local (Postfix) with ESMTP id D3E893E0CFC; Thu, 8 Feb 2018 17:31:58 +0000 (GMT) From: =?utf-8?q?Alex_Benn=C3=A9e?= To: qemu-arm@nongnu.org Date: Thu, 8 Feb 2018 17:31:40 +0000 Message-Id: <20180208173157.24705-16-alex.bennee@linaro.org> X-Mailer: git-send-email 2.15.1 In-Reply-To: <20180208173157.24705-1-alex.bennee@linaro.org> References: <20180208173157.24705-1-alex.bennee@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:400c:c0c::243 Subject: [Qemu-devel] [PATCH v2 15/32] arm/translate-a64: add FP16 FMULX/MLS/FMLA to simd_indexed X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , =?utf-8?q?Alex_Benn=C3=A9e?= , qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" The helpers use the new re-factored muladd support in SoftFloat for the float16 work. Signed-off-by: Alex Bennée --- target/arm/translate-a64.c | 69 ++++++++++++++++++++++++++++++++++++---------- 1 file changed, 54 insertions(+), 15 deletions(-) -- 2.15.1 diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c index 3a2be1e016..83a1fa3116 100644 --- a/target/arm/translate-a64.c +++ b/target/arm/translate-a64.c @@ -10804,7 +10804,7 @@ static void disas_simd_indexed(DisasContext *s, uint32_t insn) } /* fall through */ case 0x9: /* FMUL, FMULX */ - if (!extract32(size, 1, 1)) { + if (size == 1 || (size < 2 && !arm_dc_feature(s, ARM_FEATURE_V8_FP16))) { unallocated_encoding(s); return; } @@ -10816,18 +10816,30 @@ static void disas_simd_indexed(DisasContext *s, uint32_t insn) } if (is_fp) { - /* low bit of size indicates single/double */ - size = extract32(size, 0, 1) ? 3 : 2; - if (size == 2) { + /* convert insn encoded size to TCGMemOp size */ + switch (size) { + case 0: /* half-precision */ + size = MO_16; + index = h << 2 | l << 1 | m; + break; + case 2: /* single precision */ + size = MO_32; index = h << 1 | l; - } else { + rm |= (m << 4); + break; + case 3: /* double precision */ + size = MO_64; if (l || !is_q) { unallocated_encoding(s); return; } index = h; + rm |= (m << 4); + break; + default: + g_assert_not_reached(); + break; } - rm |= (m << 4); } else { switch (size) { case 1: @@ -10953,18 +10965,45 @@ static void disas_simd_indexed(DisasContext *s, uint32_t insn) break; } case 0x5: /* FMLS */ - /* As usual for ARM, separate negation for fused multiply-add */ - gen_helper_vfp_negs(tcg_op, tcg_op); - /* fall through */ case 0x1: /* FMLA */ - read_vec_element_i32(s, tcg_res, rd, pass, MO_32); - gen_helper_vfp_muladds(tcg_res, tcg_op, tcg_idx, tcg_res, fpst); + read_vec_element_i32(s, tcg_res, rd, pass, is_scalar ? size : MO_32); + switch (size) { + case 1: + if (opcode == 0x5) { + /* As usual for ARM, separate negation for fused multiply-add */ + tcg_gen_xori_i32(tcg_op, tcg_op, 0x80008000); + } + gen_helper_advsimd_muladdh(tcg_res, tcg_op, tcg_idx, tcg_res, fpst); + break; + case 2: + if (opcode == 0x5) { + /* As usual for ARM, separate negation for fused multiply-add */ + tcg_gen_xori_i32(tcg_op, tcg_op, 0x80000000); + } + gen_helper_vfp_muladds(tcg_res, tcg_op, tcg_idx, tcg_res, fpst); + break; + default: + g_assert_not_reached(); + } break; case 0x9: /* FMUL, FMULX */ - if (u) { - gen_helper_vfp_mulxs(tcg_res, tcg_op, tcg_idx, fpst); - } else { - gen_helper_vfp_muls(tcg_res, tcg_op, tcg_idx, fpst); + switch (size) { + case 1: + if (u) { + gen_helper_advsimd_mulxh(tcg_res, tcg_op, tcg_idx, fpst); + } else { + g_assert_not_reached(); + } + break; + case 2: + if (u) { + gen_helper_vfp_mulxs(tcg_res, tcg_op, tcg_idx, fpst); + } else { + gen_helper_vfp_muls(tcg_res, tcg_op, tcg_idx, fpst); + } + break; + default: + g_assert_not_reached(); } break; case 0xc: /* SQDMULH */