From patchwork Fri Feb 9 14:39:27 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andre Przywara X-Patchwork-Id: 127844 Delivered-To: patch@linaro.org Received: by 10.46.124.24 with SMTP id x24csp679894ljc; Fri, 9 Feb 2018 06:42:16 -0800 (PST) X-Google-Smtp-Source: AH8x2246cpOibzmC9VwBd7zRgNntT6qy/PZSQ4u2RYL5HQwtHUZaQ5qT1N2TloD4qgxIWk931PQT X-Received: by 10.36.225.9 with SMTP id n9mr3709414ith.87.1518187335938; Fri, 09 Feb 2018 06:42:15 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1518187335; cv=none; d=google.com; s=arc-20160816; b=HMFdpW9K13fet1wj5QlsJGBTgAbNaJhAs94+LEhIL19s/O13Az6NUBdIhBWhqDBTqR 1qnfkxoE1yvG2zm/oeBTPC/7Q5gH+w0n+aKO36Q6BKkcAktm1CBOsEBs8+7pkfTOsGk3 B2kF1VkGukO52mFDjH1lOcdlwlOXUq8oFumjnhkG5qsk8M58wB+vH9l6n+zUKR9xnh1T 7BY6W5bHRGtMuQrLG3f+fYE+erZ1tzaAM0i0mjGrxr5hlF2c6P3ZvblXRNynaBmaPP25 x+2NReoKv+EjAIbxHGTAZOnmyGII92UPzKzif+KOkNtifNE23an9S9lv2Wg5G+1fU73k 14dA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version :list-subscribe:list-help:list-post:list-unsubscribe:list-id :precedence:subject:references:in-reply-to:message-id:date:to:from :dkim-signature:arc-authentication-results; bh=M4dfhSahno+TDmfqLAXdNgf28m0BfrusA1gGHn285+0=; b=BkAdPTW19FEXBz9UjBt1f74aCGNbCr4fSFJfmtEeGTl9rlhw5b1RvHieNiTZ7xZW8r HIAR35tG0WmkrnezGLmTRWHo85fYXn98WUENQFZEgUHR/wcTNirqp0SOdHBDSSJ5lJAh rDaOa8cUiibRH7oKbkdgB1hllyUo9QZ9lm4dEZRZjVBeOwwqAcbnnW+zywGuYciFhdQQ nbdoVdtD7DbihPhv3FrCmkrS/hlBiXCt8JBup+jiJLaa60/0fHwWgCSP9y1fLjpTjR02 iSsks4dPfXujkjETJhr/OJr+2YWS7WsMfxE97WRmA3uJagDmU5q6lDZlMzAw8IE2aXfU KuQw== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=JBJXBLxS; spf=pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.xenproject.org (lists.xenproject.org. [192.237.175.120]) by mx.google.com with ESMTPS id b123si1648617itb.88.2018.02.09.06.42.15 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 09 Feb 2018 06:42:15 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=JBJXBLxS; spf=pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1ek9qn-0001cK-G9; Fri, 09 Feb 2018 14:40:29 +0000 Received: from us1-rack-dfw2.inumbo.com ([104.130.134.6]) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1ek9qm-0001Yj-O1 for xen-devel@lists.xenproject.org; Fri, 09 Feb 2018 14:40:28 +0000 X-Inumbo-ID: 1a16ff0d-0da7-11e8-ba59-bc764e045a96 Received: from mail-wr0-x243.google.com (unknown [2a00:1450:400c:c0c::243]) by us1-rack-dfw2.inumbo.com (Halon) with ESMTPS id 1a16ff0d-0da7-11e8-ba59-bc764e045a96; Fri, 09 Feb 2018 15:39:59 +0100 (CET) Received: by mail-wr0-x243.google.com with SMTP id k32so1972326wrk.4 for ; Fri, 09 Feb 2018 06:40:27 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references; bh=I3WUrVuvdZysdWAAVXftem6XTQ1+xPLkI/GYa9BFsfo=; b=JBJXBLxSY11fHLT7N3EDzigHxr2W8ykRiIN0U91guI8U1ntVl3jeKP0r12NMY8ZjmW a7C11GH+2IwX83VP+wzsAkT5MSUTFN/SBSfW6Cg1xIuDnIlEWxBdJ5/ktgxSBJjktqiZ B9MeN0aqMnSku2vkg3cKURS/SI4TVJ8bTnHGs= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references; bh=I3WUrVuvdZysdWAAVXftem6XTQ1+xPLkI/GYa9BFsfo=; b=WdZqa/yNsh0b1KdU9SqZhaHkbie6CZaAugzc7OAbkUWwK4Zm5qpoWOBYjCX3uCtBKy Lvpvm25tn/HDF+52C0XrEtbUnAKAa/HMkpBvnF/B01CHeJFUJkJ8OWwicB1g9c4n5kb4 9jU91ZFvajgIwDF7Gj4J3CI6gx1CReR0sdBoO/UzR2MjALu/WW5nA6XABHUKkVonMkDR lIr1YMed9AQJlCsIwrbEEI9bJZedVRPHAtZFB494IYpTT16pHusyeC5cCi/ysqMiLOan trsAowPRO7p7sSXu6KuvkBwkeTtdtl9mqaoz2PVz8llGhgpSLmWmAj2UoLSmtjr8VwYI usMQ== X-Gm-Message-State: APf1xPB6DHUDUGtmnHn0GpdDaR3b91azFWIRajCg6Q+R7Sd3I0Cckv6w 34BmmuyU/xANFMtnPaIuHjKQCbx+0E0= X-Received: by 10.223.172.116 with SMTP id v107mr2619535wrc.269.1518187226140; Fri, 09 Feb 2018 06:40:26 -0800 (PST) Received: from e104803-lin.lan (mail.andrep.de. [217.160.17.100]) by smtp.gmail.com with ESMTPSA id b35sm2552229wra.13.2018.02.09.06.40.25 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 09 Feb 2018 06:40:25 -0800 (PST) From: Andre Przywara To: Stefano Stabellini , Julien Grall , xen-devel@lists.xenproject.org Date: Fri, 9 Feb 2018 14:39:27 +0000 Message-Id: <20180209143937.28866-40-andre.przywara@linaro.org> X-Mailer: git-send-email 2.14.1 In-Reply-To: <20180209143937.28866-1-andre.przywara@linaro.org> References: <20180209143937.28866-1-andre.przywara@linaro.org> Subject: [Xen-devel] [RFC PATCH 39/49] ARM: new VGIC: Add event channel IRQ handling X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" The Xen core/arch code relies on two abstracted functions to inject an event channel IRQ and to query its pending state. Implement those to query the state of the new VGIC implementation. Signed-off-by: Andre Przywara --- xen/arch/arm/vgic/vgic.c | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/xen/arch/arm/vgic/vgic.c b/xen/arch/arm/vgic/vgic.c index 8d5260a7db..b62cda7d2f 100644 --- a/xen/arch/arm/vgic/vgic.c +++ b/xen/arch/arm/vgic/vgic.c @@ -693,6 +693,26 @@ void vgic_kick_vcpus(struct domain *d) } } +void arch_evtchn_inject(struct vcpu *v) +{ + vgic_inject_irq(v->domain, v, v->domain->arch.evtchn_irq, true); +} + +bool vgic_evtchn_irq_pending(struct vcpu *v) +{ + struct vgic_irq *irq; + bool pending; + + /* Does not work for LPIs. */ + ASSERT(!is_lpi(v->domain->arch.evtchn_irq)); + + irq = vgic_get_irq(v->domain, v, v->domain->arch.evtchn_irq); + pending = irq_is_pending(irq); + vgic_put_irq(v->domain, irq); + + return pending; +} + struct irq_desc *vgic_get_hw_irq_desc(struct domain *d, struct vcpu *v, unsigned int virq) {