From patchwork Fri Feb 9 16:58:06 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 127871 Delivered-To: patches@linaro.org Received: by 10.46.124.24 with SMTP id x24csp802194ljc; Fri, 9 Feb 2018 08:58:18 -0800 (PST) X-Google-Smtp-Source: AH8x227893ILDQgrQToEysjcWW3xLkguEMW7dPuRlwEKBMM1FD6i5XqGYL1ZKA9/FVX8G8o+bQ7b X-Received: by 10.28.71.198 with SMTP id m67mr2850071wmi.40.1518195498553; Fri, 09 Feb 2018 08:58:18 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1518195498; cv=none; d=google.com; s=arc-20160816; b=NePHzFMJSTcqASeGijXGSKYXAJvIfL0zpoPpKt+cnMzo9lFLjV23KRWnr3qKudKFD/ 2pIpPnA48N4rAnj2Rcbt1/pDeK8KgDPZeOry+l+OKFWYiKd2VrYvkqGMv3AF4dS0+adw NMJIxbLzFUQ92DALSrpQ+aHBCnPx4QpZAApgLVeN4r6FSua5KBkyvV8Iift9yn9b/Kvj zWZS04oXioOl3d/UXEegHrnlzcGafr1n/LjRPhTPSOxPym7GkcGzX5pAtuJXMSqN9pQF 0xAHwORN8wWLHMYiflHKXpNxZU1CJvIQErvnIn0+OJ70bDLQMzWJgletxIsonpjeDjNd YHwQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=references:in-reply-to:message-id:date:subject:cc:to:from :arc-authentication-results; bh=gPZBOWG62Ml3ABPlHSWpZm/7Y3tm7VBFmIMMS/caH1M=; b=tFgQFou1a565stGxs2l6ZY4Xb2u5Db9uIIsoxh1Fys5Rn16H8LLaBN/kfhbCrNQcqW A2sPY4YYRvHmw7FIo2DMQmMFiDodWP3MmsWjKdwpoZCqF1QV3XdFy5RJNZZFd0qKRx1Z ptFWUzC0/iZQTSaZB/HzsyWAIwgpqk5aAhq2apOxn7C/oTpAIDtXUemaWWmnA8Vn4dkt 5cnjDFbQVMikLWzdUxMw57xcNUo7IOClkN7hdbUdw4eH3I0mNQY5WSOtsIokvra7XSqZ BE41UJo6pyPJPm9ck3l549gtUdkcpzrSU9ZNfd15LAH1dSu34ZBHVSXH/ctZGYndpDyC guzg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 2001:8b0:1d0::2 as permitted sender) smtp.mailfrom=pm215@archaic.org.uk; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by mx.google.com with ESMTPS id f17si2007735wrh.40.2018.02.09.08.58.18 for (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 09 Feb 2018 08:58:18 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 2001:8b0:1d0::2 as permitted sender) client-ip=2001:8b0:1d0::2; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 2001:8b0:1d0::2 as permitted sender) smtp.mailfrom=pm215@archaic.org.uk; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from pm215 by orth.archaic.org.uk with local (Exim 4.89) (envelope-from ) id 1ekC0A-00030x-4G; Fri, 09 Feb 2018 16:58:18 +0000 From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Cc: patches@linaro.org Subject: [PATCH v2 07/11] target/arm: Implement writing to CONTROL_NS for v8M Date: Fri, 9 Feb 2018 16:58:06 +0000 Message-Id: <20180209165810.6668-8-peter.maydell@linaro.org> X-Mailer: git-send-email 2.16.1 In-Reply-To: <20180209165810.6668-1-peter.maydell@linaro.org> References: <20180209165810.6668-1-peter.maydell@linaro.org> In commit 50f11062d4c896 we added support for MSR/MRS access to the NS banked special registers, but we forgot to implement the support for writing to CONTROL_NS. Correct the omission. Signed-off-by: Peter Maydell --- target/arm/helper.c | 10 ++++++++++ 1 file changed, 10 insertions(+) -- 2.16.1 Reviewed-by: Richard Henderson diff --git a/target/arm/helper.c b/target/arm/helper.c index 180ab75458..7c1dcb0330 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -10519,6 +10519,16 @@ void HELPER(v7m_msr)(CPUARMState *env, uint32_t maskreg, uint32_t val) } env->v7m.faultmask[M_REG_NS] = val & 1; return; + case 0x94: /* CONTROL_NS */ + if (!env->v7m.secure) { + return; + } + write_v7m_control_spsel_for_secstate(env, + val & R_V7M_CONTROL_SPSEL_MASK, + M_REG_NS); + env->v7m.control[M_REG_NS] &= ~R_V7M_CONTROL_NPRIV_MASK; + env->v7m.control[M_REG_NS] |= val & R_V7M_CONTROL_NPRIV_MASK; + return; case 0x98: /* SP_NS */ { /* This gives the non-secure SP selected based on whether we're