From patchwork Fri Feb 9 16:58:09 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 127873 Delivered-To: patches@linaro.org Received: by 10.46.124.24 with SMTP id x24csp802229ljc; Fri, 9 Feb 2018 08:58:20 -0800 (PST) X-Google-Smtp-Source: AH8x224cQmFswkpn6rUW3GFt7ivmJHBZ8FAI9Vq5xgzTgrJaC+RZICz5hB3ItQjdlwFqeLjEZl7H X-Received: by 10.223.208.141 with SMTP id y13mr3238150wrh.31.1518195500720; Fri, 09 Feb 2018 08:58:20 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1518195500; cv=none; d=google.com; s=arc-20160816; b=lMtjIHmky602q8eV6GoeUVHpwoqM1FE/f8s1rpx9Zozer2oN6iNqvSUXsvD/XVWbYp 70HWEMaM+vANO2sibBBV4jKkTD1JNQ/BzaG6wJYFz32tOBez7M/Zw8iEBegl0bFPVWQi q7kW2Gi6A2FeIpHGF5CGr+g2sfjRUrI+RkR2YseWrSjx9h8//8x8pmUGy6SsDPdywWrr d05XaPUIeenuScDQ1pTJG6Ejl3KTKNq/+bKsP2CQwnedjcLsJzBvMxHJcw1jz8Fk4VyC GEKcZOuPNVfAiePo9ynYa68vS8bpiMK0Y0+0otbg1M14vBkt/rjgfha8QeZ+YeGwiLtu FKCQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=references:in-reply-to:message-id:date:subject:cc:to:from :arc-authentication-results; bh=JnNwmIwtiCiIK6QGhT96KwxMNxVw+pKDg+tKYJ7M/UU=; b=TQdokwzPDjW51BbvQ4e67DehCoXMq2r26qKsiBrwyGK1PbKRpvQaHkC7W1S0GCcURB OBxMbzksiJlzFMzIpW10iXZlTpw8PRsoNSCofc8T6VrV8UEfr0XMgtfXa+vf+oN4x9GS rjgJ+rOANGccwXcjQqDldmlaUL9I4o6s3s+efcCiPCtPfnpJS6IWIywJIrzvAuPutD7q BnF5jxMSUdfT2nhXCAPgcQ/v2MB3a8u0//EvFPpWvJ7hB0OdJAhZNsQDORM0RD1DIQqP Q45pFJgzpSisRRLqDoo9wGkTpIo9B+PKa5ROgdfvYY5NK6w+wPLNsVgsDdLY70hKqoht TJ6g== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 2001:8b0:1d0::2 as permitted sender) smtp.mailfrom=pm215@archaic.org.uk; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by mx.google.com with ESMTPS id o29si1966763wro.142.2018.02.09.08.58.20 for (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 09 Feb 2018 08:58:20 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 2001:8b0:1d0::2 as permitted sender) client-ip=2001:8b0:1d0::2; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 2001:8b0:1d0::2 as permitted sender) smtp.mailfrom=pm215@archaic.org.uk; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from pm215 by orth.archaic.org.uk with local (Exim 4.89) (envelope-from ) id 1ekC0C-00031o-8l; Fri, 09 Feb 2018 16:58:20 +0000 From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Cc: patches@linaro.org Subject: [PATCH v2 10/11] target/arm: Migrate v7m.other_sp Date: Fri, 9 Feb 2018 16:58:09 +0000 Message-Id: <20180209165810.6668-11-peter.maydell@linaro.org> X-Mailer: git-send-email 2.16.1 In-Reply-To: <20180209165810.6668-1-peter.maydell@linaro.org> References: <20180209165810.6668-1-peter.maydell@linaro.org> In commit abc24d86cc0364f we accidentally broke migration of the stack pointer value for the mode (process, handler) the CPU is not currently running as. (The commit correctly removed the no-longer-used v7m.current_sp flag from the VMState but also deleted the still very much in use v7m.other_sp SP value field.) Add a subsection to migrate it again. (We don't need to care about trying to retain compatibility with pre-abc24d86cc0364f versions of QEMU, because that commit bumped the version_id and we've since bumped it again a couple of times.) Signed-off-by: Peter Maydell --- target/arm/machine.c | 11 +++++++++++ 1 file changed, 11 insertions(+) -- 2.16.1 Reviewed-by: Richard Henderson diff --git a/target/arm/machine.c b/target/arm/machine.c index 25cdf4d581..1a20d6c36c 100644 --- a/target/arm/machine.c +++ b/target/arm/machine.c @@ -236,6 +236,16 @@ static const VMStateDescription vmstate_m_scr = { } }; +static const VMStateDescription vmstate_m_other_sp = { + .name = "cpu/m/other-sp", + .version_id = 1, + .minimum_version_id = 1, + .fields = (VMStateField[]) { + VMSTATE_UINT32(env.v7m.other_sp, ARMCPU), + VMSTATE_END_OF_LIST() + } +}; + static const VMStateDescription vmstate_m = { .name = "cpu/m", .version_id = 4, @@ -259,6 +269,7 @@ static const VMStateDescription vmstate_m = { &vmstate_m_faultmask_primask, &vmstate_m_csselr, &vmstate_m_scr, + &vmstate_m_other_sp, NULL } };