From patchwork Mon Feb 12 08:19:19 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tomi Valkeinen X-Patchwork-Id: 127947 Delivered-To: patch@linaro.org Received: by 10.46.124.24 with SMTP id x24csp2985119ljc; Mon, 12 Feb 2018 00:19:43 -0800 (PST) X-Google-Smtp-Source: AH8x225ZmUAlbKfPkPQF06gYpa8Sy+uCAWuIjBRIl86zNiLiDn6UWepcURyeOsN/kUwFmerwPD3j X-Received: by 10.98.10.25 with SMTP id s25mr10860585pfi.137.1518423583213; Mon, 12 Feb 2018 00:19:43 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1518423583; cv=none; d=google.com; s=arc-20160816; b=LT6+GOf9SeW4/ZDbDnUjItTui2Ovjl7SEYRrH/jmy5uB0zgcRik4woOlOLi/n3D2iG Q25NH04y+yhsjySNRnJ++nhd8AYLWDlHIFJ8CZGwT4RfqFw317TJYy6ItrVxvWkxCwl+ wrhIXm6tn0A66tUCK5cLsDJJurT2y7xKkF050URYUOWgk6Q9ahziYpA71J1QRNTFTKD7 ClueTu1J4owr7Z6h8oIUSN+zPcnbARWQu5Dj1WhyfmBnmYxAlVqNlAsF4wv28ZuhWzjq ZpLfecBfwPLtVE6ksIVCVNeWHbn34jxbuZ2Xn6PLmjPFdbJ7hQj01GeZzkfUvnPVzK+l 9Lyg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:cc:list-subscribe :list-help:list-post:list-archive:list-unsubscribe:list-id :precedence:mime-version:message-id:date:subject:to:from :dkim-signature:delivered-to:arc-authentication-results; bh=7ansqYZoQocAjWKUwNthkY+36Uf5xuSGekdbP/EKfUY=; b=r8PBfUFr9VDkcxGhMh/iVpi6jaFrIrhI24dtDCwOYPCfqG5BwhLvz/u56EKQjf0QTh TbhYNN4R35s6mrpUNgIa6BU9+yfo1lhtfjzWbpov6ya0id7T7lKU57TacVLnTBoASyFu zo7OQe2nQ4SYBcu8gI9qs8At+XmYMKX3QcdhQ/NV6bLcXUKlDdc+A89JOn0irtnXuD7b E3586X+6hGyWWM4I3mZEyjHUMtSUeZ5umCXppL08QIpeD7b1vPAQ1l53OPQBenriJab2 2IIJ0sFYM9iRCnr+Ryy3roAbhJiWSFQaKgpjD50tpgfvy93oFWOhdv2BF87C+yVhQMi7 CywQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@ti.com header.s=ti-com-17Q1 header.b=MBInRdvs; spf=pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org; dmarc=fail (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from gabe.freedesktop.org (gabe.freedesktop.org. [131.252.210.177]) by mx.google.com with ESMTPS id bi10-v6si3683508plb.113.2018.02.12.00.19.42 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Mon, 12 Feb 2018 00:19:43 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) client-ip=131.252.210.177; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@ti.com header.s=ti-com-17Q1 header.b=MBInRdvs; spf=pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org; dmarc=fail (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 1EE5689830; Mon, 12 Feb 2018 08:19:41 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from fllnx210.ext.ti.com (fllnx210.ext.ti.com [198.47.19.17]) by gabe.freedesktop.org (Postfix) with ESMTPS id 1A29589830 for ; Mon, 12 Feb 2018 08:19:39 +0000 (UTC) Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by fllnx210.ext.ti.com (8.15.1/8.15.1) with ESMTP id w1C8Ja6I027546; Mon, 12 Feb 2018 02:19:36 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ti.com; s=ti-com-17Q1; t=1518423576; bh=GlLFzbmrS9fJIqeHNdIEVT76Lsg2yGXicxEmYClxdEE=; h=From:To:CC:Subject:Date; b=MBInRdvsyrluRkM4YbzmobQwdf4aaTuRRvYmI+00S4OyWecxuA7LTmR/yutHtj3x6 bzowvcHvkaB9x6uvBOmj4BfNCTkv6KBdplbzlV/whKQhIBrn6fvWRMkPq5J0J8CJBR 74cXt270KcHZQfUE+XdjpInuQXrI2Uecvh1LwCa4= Received: from DLEE103.ent.ti.com (dlee103.ent.ti.com [157.170.170.33]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id w1C8JaUD001340; Mon, 12 Feb 2018 02:19:36 -0600 Received: from DLEE107.ent.ti.com (157.170.170.37) by DLEE103.ent.ti.com (157.170.170.33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1261.35; Mon, 12 Feb 2018 02:19:36 -0600 Received: from dflp33.itg.ti.com (10.64.6.16) by DLEE107.ent.ti.com (157.170.170.37) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1261.35 via Frontend Transport; Mon, 12 Feb 2018 02:19:36 -0600 Received: from deskari.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp33.itg.ti.com (8.14.3/8.13.8) with ESMTP id w1C8JYkX029541; Mon, 12 Feb 2018 02:19:35 -0600 From: Tomi Valkeinen To: , Laurent Pinchart Subject: [PATCH 1/4] drm/omap: reorganize locking in mgr_fld_write Date: Mon, 12 Feb 2018 10:19:19 +0200 Message-ID: <1518423562-1191-1-git-send-email-tomi.valkeinen@ti.com> X-Mailer: git-send-email 2.7.4 MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Tomi Valkeinen Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Fix sparse warning: drivers/gpu/drm/omapdrm/dss/dispc.c:387:9: warning: context imbalance in 'mgr_fld_write' - different lock contexts for basic block Signed-off-by: Tomi Valkeinen --- drivers/gpu/drm/omapdrm/dss/dispc.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/omapdrm/dss/dispc.c b/drivers/gpu/drm/omapdrm/dss/dispc.c index 86d18f2d48ba..679931e108f9 100644 --- a/drivers/gpu/drm/omapdrm/dss/dispc.c +++ b/drivers/gpu/drm/omapdrm/dss/dispc.c @@ -384,13 +384,13 @@ static void mgr_fld_write(enum omap_channel channel, const bool need_lock = rfld.reg == DISPC_CONTROL || rfld.reg == DISPC_CONFIG; unsigned long flags; - if (need_lock) + if (need_lock) { spin_lock_irqsave(&dispc.control_lock, flags); - - REG_FLD_MOD(rfld.reg, val, rfld.high, rfld.low); - - if (need_lock) + REG_FLD_MOD(rfld.reg, val, rfld.high, rfld.low); spin_unlock_irqrestore(&dispc.control_lock, flags); + } else { + REG_FLD_MOD(rfld.reg, val, rfld.high, rfld.low); + } } static int dispc_get_num_ovls(void)