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[209.132.180.67]) by mx.google.com with ESMTP id q11si3151140pgs.753.2018.02.12.07.05.58; Mon, 12 Feb 2018 07:05:58 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@baylibre-com.20150623.gappssmtp.com header.s=20150623 header.b=Gs+uh9sT; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753775AbeBLPF4 (ORCPT + 15 others); Mon, 12 Feb 2018 10:05:56 -0500 Received: from mail-wm0-f65.google.com ([74.125.82.65]:40633 "EHLO mail-wm0-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932324AbeBLO66 (ORCPT ); Mon, 12 Feb 2018 09:58:58 -0500 Received: by mail-wm0-f65.google.com with SMTP id v123so10451318wmd.5 for ; Mon, 12 Feb 2018 06:58:57 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=5tFPnR2JI6hRww5brRTauIPjJ5l3Ls1DxeriWzUgg6A=; b=Gs+uh9sT4ZnEqs/3mgcGhI4qm5X4Tvnk79zlhHddSwfYQctIllTYqj9m/9JvUHaqTO GTCL0QipDSi5BKO44Sn6U0/CX7JqAuCNkwtHbpvUryIn8tsbehdMJHtMyQG7S3ps4ELs AAbw2Th8Q2QybGRuzY8Hts9rHca3sIrME62nC3UY7reszZmCEdewXrPrH3woj5NGx0QJ ieQfChSiNJHOOcLqOw0aGWrz3AYAV0wOsKxWHEsxUGjNVMAL4UXPVDhljKNg0z5GVy/C B2qpF3ZhPDlSx4rW+d6uUdkOb7K5pLI6UYcvkxyvTf0rVRU+uMcZ4zH8fqBFZnhfrzXc yAEA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=5tFPnR2JI6hRww5brRTauIPjJ5l3Ls1DxeriWzUgg6A=; b=s3VbqDq1qrsjqFaVbpOKIGU3lYMbQjlPKGSGEYoifT+IHHWOWHMW1tEv3QI9nauZtn 11VTzQNsrSV+DksH9Sl+K5lZDes4uQt5ztKZECj1pEvYoa3GgjSzT9+FHVbrqUuA44ta dBDESpnIRt/JcfKpQOmoc1o/N/BiB6FyegBrLqq2CD53pJLIsNzHu7TQbbbOZSLFQvov 5CUwRxME4F0+P3Xnx/lyS0mftK04pOP0QaY2JHi6o7K3hsgYhi/rNY8RFQH7NHyJ5ddM pPQsY3tRMEjy0/DTraR9S431hMVvGuouSlVzj1p5b7IuM/N/T+aUqdd6K7PXAlZk3k9U lylA== X-Gm-Message-State: APf1xPA/FP8hVlNSf6QaenD2adA12BbjrSzrTDo1Jt7T06Oh/JcJQqVd tUHqIfP+ZlrBqYSXZgtr6PSZDQ== X-Received: by 10.28.153.20 with SMTP id b20mr4145194wme.6.1518447536547; Mon, 12 Feb 2018 06:58:56 -0800 (PST) Received: from boomer.baylibre.local ([90.63.244.31]) by smtp.googlemail.com with ESMTPSA id p21sm4633218wmc.28.2018.02.12.06.58.55 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Mon, 12 Feb 2018 06:58:56 -0800 (PST) From: Jerome Brunet To: Neil Armstrong , Kevin Hilman Cc: Jerome Brunet , Stephen Boyd , Michael Turquette , Carlo Caione , linux-amlogic@lists.infradead.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 06/19] clk: meson: switch gxbb ao_clk to clk_regmap Date: Mon, 12 Feb 2018 15:58:33 +0100 Message-Id: <20180212145846.19380-7-jbrunet@baylibre.com> X-Mailer: git-send-email 2.14.3 In-Reply-To: <20180212145846.19380-1-jbrunet@baylibre.com> References: <20180212145846.19380-1-jbrunet@baylibre.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Drop the gxbb ao specific regmap based clock and use the meson clk_regmap based clock instead. Signed-off-by: Jerome Brunet --- drivers/clk/meson/Kconfig | 1 + drivers/clk/meson/Makefile | 2 +- drivers/clk/meson/gxbb-aoclk.c | 20 ++++++++++---------- drivers/clk/meson/gxbb-aoclk.h | 1 - 4 files changed, 12 insertions(+), 12 deletions(-) -- 2.14.3 diff --git a/drivers/clk/meson/Kconfig b/drivers/clk/meson/Kconfig index e97e85077da1..33d148e19066 100644 --- a/drivers/clk/meson/Kconfig +++ b/drivers/clk/meson/Kconfig @@ -20,6 +20,7 @@ config COMMON_CLK_GXBB bool depends on COMMON_CLK_AMLOGIC select RESET_CONTROLLER + select COMMON_CLK_REGMAP_MESON help Support for the clock controller on AmLogic S905 devices, aka gxbb. Say Y if you want peripherals and CPU frequency scaling to work. diff --git a/drivers/clk/meson/Makefile b/drivers/clk/meson/Makefile index 11a50586666a..465086118d62 100644 --- a/drivers/clk/meson/Makefile +++ b/drivers/clk/meson/Makefile @@ -4,6 +4,6 @@ obj-$(CONFIG_COMMON_CLK_AMLOGIC) += clk-pll.o clk-cpu.o clk-mpll.o clk-audio-divider.o obj-$(CONFIG_COMMON_CLK_MESON8B) += meson8b.o -obj-$(CONFIG_COMMON_CLK_GXBB) += gxbb.o gxbb-aoclk.o gxbb-aoclk-regmap.o gxbb-aoclk-32k.o +obj-$(CONFIG_COMMON_CLK_GXBB) += gxbb.o gxbb-aoclk.o gxbb-aoclk-32k.o obj-$(CONFIG_COMMON_CLK_AXG) += axg.o obj-$(CONFIG_COMMON_CLK_REGMAP_MESON) += clk-regmap.o diff --git a/drivers/clk/meson/gxbb-aoclk.c b/drivers/clk/meson/gxbb-aoclk.c index 6c161e0a8e59..9ec23ae9a219 100644 --- a/drivers/clk/meson/gxbb-aoclk.c +++ b/drivers/clk/meson/gxbb-aoclk.c @@ -62,10 +62,9 @@ #include #include #include +#include "clk-regmap.h" #include "gxbb-aoclk.h" -static DEFINE_SPINLOCK(gxbb_aoclk_lock); - struct gxbb_aoclk_reset_controller { struct reset_controller_dev reset; unsigned int *data; @@ -87,12 +86,14 @@ static const struct reset_control_ops gxbb_aoclk_reset_ops = { }; #define GXBB_AO_GATE(_name, _bit) \ -static struct aoclk_gate_regmap _name##_ao = { \ - .bit_idx = (_bit), \ - .lock = &gxbb_aoclk_lock, \ +static struct clk_regmap _name##_ao = { \ + .data = &(struct clk_regmap_gate_data) { \ + .offset = AO_RTI_GEN_CNTL_REG0, \ + .bit_idx = (_bit), \ + }, \ .hw.init = &(struct clk_init_data) { \ .name = #_name "_ao", \ - .ops = &meson_aoclk_gate_regmap_ops, \ + .ops = &clk_regmap_gate_ops, \ .parent_names = (const char *[]){ "clk81" }, \ .num_parents = 1, \ .flags = (CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED), \ @@ -107,7 +108,6 @@ GXBB_AO_GATE(uart2, 5); GXBB_AO_GATE(ir_blaster, 6); static struct aoclk_cec_32k cec_32k_ao = { - .lock = &gxbb_aoclk_lock, .hw.init = &(struct clk_init_data) { .name = "cec_32k_ao", .ops = &meson_aoclk_cec_32k_ops, @@ -126,7 +126,7 @@ static unsigned int gxbb_aoclk_reset[] = { [RESET_AO_IR_BLASTER] = 23, }; -static struct aoclk_gate_regmap *gxbb_aoclk_gate[] = { +static struct clk_regmap *gxbb_aoclk_gate[] = { [CLKID_AO_REMOTE] = &remote_ao, [CLKID_AO_I2C_MASTER] = &i2c_master_ao, [CLKID_AO_I2C_SLAVE] = &i2c_slave_ao, @@ -177,10 +177,10 @@ static int gxbb_aoclkc_probe(struct platform_device *pdev) * Populate regmap and register all clks */ for (clkid = 0; clkid < ARRAY_SIZE(gxbb_aoclk_gate); clkid++) { - gxbb_aoclk_gate[clkid]->regmap = regmap; + gxbb_aoclk_gate[clkid]->map = regmap; ret = devm_clk_hw_register(dev, - gxbb_aoclk_onecell_data.hws[clkid]); + gxbb_aoclk_onecell_data.hws[clkid]); if (ret) return ret; } diff --git a/drivers/clk/meson/gxbb-aoclk.h b/drivers/clk/meson/gxbb-aoclk.h index e8604c8f7eee..127d58954cca 100644 --- a/drivers/clk/meson/gxbb-aoclk.h +++ b/drivers/clk/meson/gxbb-aoclk.h @@ -32,7 +32,6 @@ extern const struct clk_ops meson_aoclk_gate_regmap_ops; struct aoclk_cec_32k { struct clk_hw hw; struct regmap *regmap; - spinlock_t *lock; }; #define to_aoclk_cec_32k(_hw) container_of(_hw, struct aoclk_cec_32k, hw)