[edk2,edk2-platforms,2/5] Silicon/SynQuaver/DeviceTree: add node for I2C controller

Message ID 20180215172054.27452-3-ard.biesheuvel@linaro.org
State New
Headers show
Series
  • Add Secure96 mezzanine support
Related show

Commit Message

Ard Biesheuvel Feb. 15, 2018, 5:20 p.m.
Add a node for the I2C controller #1 to the device tree so the OS
may attach to it. This is the I2C controller that is attached to the
96boards mezzanine connector on Developer Box.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>

---
 Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi | 18 ++++++++++++++++++
 1 file changed, 18 insertions(+)

-- 
2.11.0

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Patch

diff --git a/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi b/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi
index ba445a50f16f..9ec752956d05 100644
--- a/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi
+++ b/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi
@@ -556,4 +556,22 @@ 
         #address-cells = <1>;
         #size-cells = <0>;
     };
+
+    clk_i2c: i2c_pclk {
+        compatible = "fixed-clock";
+        #clock-cells = <0>;
+        clock-frequency = <62500000>;
+        clock-output-names = "pclk";
+    };
+
+    i2c: i2c@51210000 {
+        compatible = "socionext,synquacer-i2c";
+        reg = <0x0 0x51210000 0x0 0x1000>;
+        interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
+        clocks = <&clk_i2c>;
+        clock-names = "pclk";
+        clock-frequency = <400>;
+        #address-cells = <1>;
+        #size-cells = <0>;
+    };
 };