From patchwork Fri Feb 23 10:23:50 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Viresh Kumar X-Patchwork-Id: 129344 Delivered-To: patch@linaro.org Received: by 10.46.66.2 with SMTP id p2csp435502lja; Fri, 23 Feb 2018 02:24:43 -0800 (PST) X-Google-Smtp-Source: AH8x224bRlF4zUtG+56R7SruEgv/heZnA2ANJGn8mSZ0KkZnOBCSky7E2e81+zD2f9QNgtxzC602 X-Received: by 10.101.74.208 with SMTP id c16mr1079396pgu.116.1519381483513; Fri, 23 Feb 2018 02:24:43 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1519381483; cv=none; d=google.com; s=arc-20160816; b=fgCBTIQrA1fgxPRq6IHL8Yx66xSlyW9P3g+SsETQdZ1N0faUEcfE0sErcPHvhi3iUS QW53f5w0m9UfiEMFaCWIOCuyNXEenHSguCfKfGuAcdWhc3UVVg3k6t4dmcF87wXhdxGv pYeWgT7g1XSt6XEACjn/1rHng8QhqeyJxXw+DYG27jh4E+IB52YZL4kO9GjWjphXaAFL XPnlOtOMJ+5yVrxpiZJ1fbCSDs1mSQtdF+p/5RbMT4tjuJiV+Y4YaMOP65Q7BFevV0FY TUUorLq3jCuJ123tMRHjSgqWN35lBDpNzUn4ijHahQtP64iqNZKvD8hCfM4RBKVr8XML VvEg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:references :in-reply-to:message-id:date:subject:cc:to:from:dkim-signature :arc-authentication-results; bh=TmqEy5tNbU3aZLQEfNdJekSwUZ5acIZD6DZ6mMrZ9EU=; b=RKkDybf7L3EMorr860fdMuDoQe+fcGjx2OKebeg6qVYRo7onUt16qgy5Z+Zfr8OL97 po2Q/6o45HEAN0EJNcSwfPqoa76oIkbtNoNh3elZMNpyfi+txczhCWKssfQLsKrvTu5Q n+K2dSc4T5yAdE5uZe+KpCwd/c9NpYfyYjsliI5K1jRdQP8wBhGZ2LpIbhoBZQRQJ+wM 46w4Om86lfGR5svEDGUnIqw4msbUm4QteS9XddnSer8/GheVhFPuGvv97zAdnCQvKlHm Fu+gxqj9uyrXk2wVOzxFScr8iBYYiE/Rw+rqBpcerANe9LuDGFcZAdUIkI5jQ9FEIIvD 19Gw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=OqKN9T3/; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id p10si1601900pfd.250.2018.02.23.02.24.43; Fri, 23 Feb 2018 02:24:43 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=OqKN9T3/; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751765AbeBWKYk (ORCPT + 28 others); Fri, 23 Feb 2018 05:24:40 -0500 Received: from mail-pg0-f68.google.com ([74.125.83.68]:46216 "EHLO mail-pg0-f68.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751664AbeBWKYe (ORCPT ); Fri, 23 Feb 2018 05:24:34 -0500 Received: by mail-pg0-f68.google.com with SMTP id m1so3193879pgp.13 for ; Fri, 23 Feb 2018 02:24:34 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :in-reply-to:references; bh=TmqEy5tNbU3aZLQEfNdJekSwUZ5acIZD6DZ6mMrZ9EU=; b=OqKN9T3/S4FJFhH7rpDZUyvkY6kw1r7ds+qEmMlEMTmCNl0n2vhOtI3Rk0OIkzH71l ji23k5jXr2n8G06W17D1DsLSLfpoWQTwiW7R+McxpHs0IVW1SD3LH+xZNHPiPyDaknli I0bDfAmNhgBqFUo1peAXdWd7R9Nu7Kc+djHSs= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:in-reply-to:references; bh=TmqEy5tNbU3aZLQEfNdJekSwUZ5acIZD6DZ6mMrZ9EU=; b=Kc2TqQlH+K4GbXX0J6JiC1b/9pUzmaL0rp6fCkTi2KAwvbspDCKQdKcA5uMWngNdvr ptyE8M+EYgaQy4iIeSmUT3J/YGNQbhqm7a+blNUk2F3d0i3+7IBRM8jnKFV6RDwiI8Zb TCHe7EAxRzHEZeXaRfoGz5TNpD4DEoK9P5LYCAVakIYiWWica5l8RxF7RPYNSnGMFbct 5kbz9Oyz0pI4KEQXrDetQx+0jE/XQvFtNMj+KwnJAER696YCDbMcwSg6gnwiPUljqnQ2 StIJ+BlffAntlwURUR3RbJFEU95IiootpWCNAfEHsUWHZ6e2BWUY0NnwBMU4rc+n43K1 N5eQ== X-Gm-Message-State: APf1xPBHtTANhgpl3RahTZCTfx9mE/eHlHmm0S4Vt18b8c23p+3HxmsP MfZ/PStGQuDhT8ceRWU6ioRZtw== X-Received: by 10.101.65.71 with SMTP id x7mr1057109pgp.203.1519381474360; Fri, 23 Feb 2018 02:24:34 -0800 (PST) Received: from localhost ([122.167.232.138]) by smtp.gmail.com with ESMTPSA id q13sm3767693pgr.15.2018.02.23.02.24.33 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 23 Feb 2018 02:24:33 -0800 (PST) From: Viresh Kumar To: Greg Kroah-Hartman Cc: Viresh Kumar , Vincent Guittot , Stephen Boyd , Rajendra Nayak , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, robdclark@gmail.com, s.hauer@pengutronix.de, l.stach@pengutronix.de, shawnguo@kernel.org, fabio.estevam@nxp.com, nm@ti.com, xuwei5@hisilicon.com, robh+dt@kernel.org, olof@lixom.net Subject: [PATCH V7 11/13] boot_constraint: Add Qualcomm display controller constraints Date: Fri, 23 Feb 2018 15:53:50 +0530 Message-Id: X-Mailer: git-send-email 2.15.0.194.g9af6a3dea062 In-Reply-To: References: In-Reply-To: References: Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This sets boot constraints for the display controller used on Qualcomm dragonboard 410c. The display controlled is enabled by the bootloader to show a flash screen during kernel boot. The handover to kernel should be without any glitches on the screen.The resources of the display controller (like regulators) are shared with other peripherals, which may reconfigure those resources before the display driver comes up. The same problem can happen if the display driver probes first, as the constraints of the other devices (sharing same resources with display controller) may not be honored anymore by the kernel. Signed-off-by: Rajendra Nayak Signed-off-by: Viresh Kumar --- drivers/soc/qcom/Kconfig | 8 +++ drivers/soc/qcom/Makefile | 1 + drivers/soc/qcom/boot_constraint.c | 122 +++++++++++++++++++++++++++++++++++++ 3 files changed, 131 insertions(+) create mode 100644 drivers/soc/qcom/boot_constraint.c -- 2.15.0.194.g9af6a3dea062 diff --git a/drivers/soc/qcom/Kconfig b/drivers/soc/qcom/Kconfig index e050eb83341d..7bbe87f9c775 100644 --- a/drivers/soc/qcom/Kconfig +++ b/drivers/soc/qcom/Kconfig @@ -107,4 +107,12 @@ config QCOM_WCNSS_CTRL Client driver for the WCNSS_CTRL SMD channel, used to download nv firmware to a newly booted WCNSS chip. +config QCOM_BOOT_CONSTRAINT + bool "Qualcomm Boot Constraints" + depends on ARCH_QCOM + select DEV_BOOT_CONSTRAINT + default y + help + Say y here to enable Boot Constraints on Qualcomm platforms. + endmenu diff --git a/drivers/soc/qcom/Makefile b/drivers/soc/qcom/Makefile index dcebf2814e6d..fcff64ec6538 100644 --- a/drivers/soc/qcom/Makefile +++ b/drivers/soc/qcom/Makefile @@ -1,4 +1,5 @@ # SPDX-License-Identifier: GPL-2.0 +obj-$(CONFIG_QCOM_BOOT_CONSTRAINT) += boot_constraint.o obj-$(CONFIG_QCOM_GLINK_SSR) += glink_ssr.o obj-$(CONFIG_QCOM_GSBI) += qcom_gsbi.o obj-$(CONFIG_QCOM_MDT_LOADER) += mdt_loader.o diff --git a/drivers/soc/qcom/boot_constraint.c b/drivers/soc/qcom/boot_constraint.c new file mode 100644 index 000000000000..ca01eb50d9a9 --- /dev/null +++ b/drivers/soc/qcom/boot_constraint.c @@ -0,0 +1,122 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * This sets up Dragonboard 410c constraints on behalf of the bootloader, which + * uses display controller to display a flash screen during system boot. + * + * Copyright (c) 2018 Linaro. + * Viresh Kumar + * Rajendra Nayak + */ + +#include +#include +#include +#include + +static struct dev_boot_constraint_clk_info iface_clk_info = { + .name = "iface_clk", +}; + +static struct dev_boot_constraint_clk_info bus_clk_info = { + .name = "bus_clk", +}; + +static struct dev_boot_constraint_clk_info core_clk_info = { + .name = "core_clk", +}; + +static struct dev_boot_constraint_clk_info vsync_clk_info = { + .name = "vsync_clk", +}; + +static struct dev_boot_constraint_clk_info esc0_clk_info = { + .name = "core_clk", +}; + +static struct dev_boot_constraint_clk_info byte_clk_info = { + .name = "byte_clk", +}; + +static struct dev_boot_constraint_clk_info pixel_clk_info = { + .name = "pixel_clk", +}; + +static struct dev_boot_constraint_supply_info vdda_info = { + .name = "vdda" +}; + +static struct dev_boot_constraint_supply_info vddio_info = { + .name = "vddio" +}; + +static struct dev_boot_constraint constraints_mdss[] = { + { + .type = DEV_BOOT_CONSTRAINT_PM, + .data = NULL, + }, +}; + +static struct dev_boot_constraint constraints_mdp[] = { + { + .type = DEV_BOOT_CONSTRAINT_CLK, + .data = &iface_clk_info, + }, { + .type = DEV_BOOT_CONSTRAINT_CLK, + .data = &bus_clk_info, + }, { + .type = DEV_BOOT_CONSTRAINT_CLK, + .data = &core_clk_info, + }, { + .type = DEV_BOOT_CONSTRAINT_CLK, + .data = &vsync_clk_info, + }, +}; + +static struct dev_boot_constraint constraints_dsi[] = { + { + .type = DEV_BOOT_CONSTRAINT_CLK, + .data = &esc0_clk_info, + }, { + .type = DEV_BOOT_CONSTRAINT_CLK, + .data = &byte_clk_info, + }, { + .type = DEV_BOOT_CONSTRAINT_CLK, + .data = &pixel_clk_info, + }, { + .type = DEV_BOOT_CONSTRAINT_SUPPLY, + .data = &vdda_info, + + }, { + .type = DEV_BOOT_CONSTRAINT_SUPPLY, + .data = &vddio_info, + }, +}; + +static struct dev_boot_constraint_of constraints[] = { + { + .compat = "qcom,mdss", + .constraints = constraints_mdss, + .count = ARRAY_SIZE(constraints_mdss), + }, { + .compat = "qcom,mdp5", + .constraints = constraints_mdp, + .count = ARRAY_SIZE(constraints_mdp), + }, { + .compat = "qcom,mdss-dsi-ctrl", + .constraints = constraints_dsi, + .count = ARRAY_SIZE(constraints_dsi), + }, +}; + +static int __init qcom_constraints_init(void) +{ + /* Only Dragonboard 410c is supported for now */ + if (!of_machine_is_compatible("qcom,apq8016-sbc")) + return 0; + + dev_boot_constraint_add_deferrable_of(constraints, + ARRAY_SIZE(constraints)); + + return 0; +} +subsys_initcall(qcom_constraints_init);