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[198.145.21.10]) by mx.google.com with ESMTPS id v27si6468575pfa.387.2018.02.26.00.53.44 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 26 Feb 2018 00:53:44 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 198.145.21.10 as permitted sender) client-ip=198.145.21.10; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=ITbNug+G; spf=pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 198.145.21.10 as permitted sender) smtp.mailfrom=edk2-devel-bounces@lists.01.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id 39843209574F5; Mon, 26 Feb 2018 00:47:39 -0800 (PST) X-Original-To: edk2-devel@lists.01.org Delivered-To: edk2-devel@lists.01.org Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2607:f8b0:400e:c05::243; helo=mail-pg0-x243.google.com; envelope-from=haojian.zhuang@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-pg0-x243.google.com (mail-pg0-x243.google.com [IPv6:2607:f8b0:400e:c05::243]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 8F991209574F5 for ; Mon, 26 Feb 2018 00:47:38 -0800 (PST) Received: by mail-pg0-x243.google.com with SMTP id m19so5940409pgn.1 for ; Mon, 26 Feb 2018 00:53:43 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=7TcMKABbBt8xb5ROIF5kHSgP0gn+75natUMKB9FXGLg=; b=ITbNug+GL+pLigGgSivbJ30PDi7DNKDtsnD2phw93jz9xsAps2uOfPo08ePsbvG3mV Pq7Gt4mHU0O7p+KbB+PfodxrfT7fJTl+jvoIMXck6zkJl2XPyKDsVE+cNosHAa4Uurm6 YSbV1FYugbnwBuEmTzUpZvZ5+OYOBWAKqZc6c= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=7TcMKABbBt8xb5ROIF5kHSgP0gn+75natUMKB9FXGLg=; b=HQzIxTl2TDy/IqzmZmmr3KZvXwWafOIHBWoquiDfslQx+KiloJND4YzK0a0O1EnIIg pQ09JNjXauaCI+1JkH80NzkKN/Ptv9wa7lT9KLTWZIeq2f7Kp70ip3jHMFWTdWJLPQax rtPiKBrMMFuUmwuI3SAgM1EilgLkDCMaa08Fe0x2/9qRsXD/Lr2lKNy8T4SewyIaQN0S ocGqiph5HIRmOYAeOA36bJUHxj++0W9+LHFhTg3POxqHKx8V63dDk8giFP2Sdeq7RjBH qDSd6Pjy2hFQ+v+yMaV02TknsB9hf7zlUgbccz6n4au018guTJoxTllxRlUQ/rmBSHbi mp9A== X-Gm-Message-State: APf1xPBn367Gtg4Ul/RPlVZDJp93D8Ck0amvLNwpCNvnQgBWKta7BcH0 b6mQU4bLsEyCEqu0H/UGieD+5g== X-Received: by 10.99.169.10 with SMTP id u10mr7953257pge.163.1519635223077; Mon, 26 Feb 2018 00:53:43 -0800 (PST) Received: from localhost.localdomain ([64.64.108.97]) by smtp.gmail.com with ESMTPSA id k1sm18209819pfj.161.2018.02.26.00.53.39 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 26 Feb 2018 00:53:42 -0800 (PST) From: Haojian Zhuang To: leif.lindholm@linaro.org, ard.biesheuvel@linaro.org, edk2-devel@lists.01.org, linaro-uefi@lists.linaro.org Date: Mon, 26 Feb 2018 16:53:19 +0800 Message-Id: <1519635199-22018-5-git-send-email-haojian.zhuang@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1519635199-22018-1-git-send-email-haojian.zhuang@linaro.org> References: <1519635199-22018-1-git-send-email-haojian.zhuang@linaro.org> Subject: [edk2] [platform][PATCH 4/4] Platform/Hisilicon/HiKey: enable virtual keyboard X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Haojian Zhuang MIME-Version: 1.0 Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" Enable virtual keyboard driver on HiKey platform. The platform driver reads pattern from memory or GPIO pin. When the value is matched, it simulates a key value that is used to adjust the sequence of boot options. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Haojian Zhuang --- Platform/Hisilicon/HiKey/HiKey.dsc | 8 + Platform/Hisilicon/HiKey/HiKey.fdf | 8 + Platform/Hisilicon/HiKey/HiKeyDxe/HiKeyDxe.c | 229 ++++++++++++++++++++++ Platform/Hisilicon/HiKey/HiKeyDxe/HiKeyDxe.inf | 58 ++++++ Silicon/Hisilicon/Hi6220/Include/Hi6220RegsPeri.h | 48 +++++ 5 files changed, 351 insertions(+) create mode 100644 Platform/Hisilicon/HiKey/HiKeyDxe/HiKeyDxe.c create mode 100644 Platform/Hisilicon/HiKey/HiKeyDxe/HiKeyDxe.inf create mode 100644 Silicon/Hisilicon/Hi6220/Include/Hi6220RegsPeri.h -- 2.7.4 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel diff --git a/Platform/Hisilicon/HiKey/HiKey.dsc b/Platform/Hisilicon/HiKey/HiKey.dsc index 2dfdced..37ad6da 100644 --- a/Platform/Hisilicon/HiKey/HiKey.dsc +++ b/Platform/Hisilicon/HiKey/HiKey.dsc @@ -192,9 +192,17 @@ # # GPIO # + Platform/Hisilicon/HiKey/HiKeyGpioDxe/HiKeyGpioDxe.inf ArmPlatformPkg/Drivers/PL061GpioDxe/PL061GpioDxe.inf # + # Virtual Keyboard + # + EmbeddedPkg/Drivers/VirtualKeyboardDxe/VirtualKeyboardDxe.inf + + Platform/Hisilicon/HiKey/HiKeyDxe/HiKeyDxe.inf + + # # MMC/SD # EmbeddedPkg/Universal/MmcDxe/MmcDxe.inf diff --git a/Platform/Hisilicon/HiKey/HiKey.fdf b/Platform/Hisilicon/HiKey/HiKey.fdf index 80b272c..e7cea73 100644 --- a/Platform/Hisilicon/HiKey/HiKey.fdf +++ b/Platform/Hisilicon/HiKey/HiKey.fdf @@ -355,9 +355,17 @@ READ_LOCK_STATUS = TRUE # # GPIO # + INF Platform/Hisilicon/HiKey/HiKeyGpioDxe/HiKeyGpioDxe.inf INF ArmPlatformPkg/Drivers/PL061GpioDxe/PL061GpioDxe.inf # + # Virtual Keyboard + # + INF EmbeddedPkg/Drivers/VirtualKeyboardDxe/VirtualKeyboardDxe.inf + + INF Platform/Hisilicon/HiKey/HiKeyDxe/HiKeyDxe.inf + + # # Multimedia Card Interface # INF EmbeddedPkg/Universal/MmcDxe/MmcDxe.inf diff --git a/Platform/Hisilicon/HiKey/HiKeyDxe/HiKeyDxe.c b/Platform/Hisilicon/HiKey/HiKeyDxe/HiKeyDxe.c new file mode 100644 index 0000000..65e8001 --- /dev/null +++ b/Platform/Hisilicon/HiKey/HiKeyDxe/HiKeyDxe.c @@ -0,0 +1,229 @@ +/** @file +* +* Copyright (c) 2018, Linaro Ltd. All rights reserved. +* +* This program and the accompanying materials +* are licensed and made available under the terms and conditions of the BSD License +* which accompanies this distribution. The full text of the license may be found at +* http://opensource.org/licenses/bsd-license.php +* +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +* +**/ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include + +#include +#include +#include + +#define SERIAL_NUMBER_SIZE 17 +#define SERIAL_NUMBER_BLOCK_SIZE EFI_PAGE_SIZE +#define SERIAL_NUMBER_LBA 1024 +#define RANDOM_MAX 0x7FFFFFFFFFFFFFFF +#define RANDOM_MAGIC 0x9A4DBEAF + +#define DETECT_J15_FASTBOOT 24 // GPIO3_0 + +#define ADB_REBOOT_ADDRESS 0x05F01000 +#define ADB_REBOOT_BOOTLOADER 0x77665500 +#define ADB_REBOOT_NONE 0x77665501 + + +typedef struct { + UINT64 Magic; + UINT64 Data; + CHAR16 UnicodeSN[SERIAL_NUMBER_SIZE]; +} RANDOM_SERIAL_NUMBER; + +STATIC EMBEDDED_GPIO *mGpio; + +STATIC +VOID +UartInit ( + IN VOID + ) +{ + UINT32 Val; + + /* make UART1 out of reset */ + MmioWrite32 (PERI_CTRL_BASE + SC_PERIPH_RSTDIS3, PERIPH_RST3_UART1); + MmioWrite32 (PERI_CTRL_BASE + SC_PERIPH_CLKEN3, PERIPH_RST3_UART1); + /* make UART2 out of reset */ + MmioWrite32 (PERI_CTRL_BASE + SC_PERIPH_RSTDIS3, PERIPH_RST3_UART2); + MmioWrite32 (PERI_CTRL_BASE + SC_PERIPH_CLKEN3, PERIPH_RST3_UART2); + /* make UART3 out of reset */ + MmioWrite32 (PERI_CTRL_BASE + SC_PERIPH_RSTDIS3, PERIPH_RST3_UART3); + MmioWrite32 (PERI_CTRL_BASE + SC_PERIPH_CLKEN3, PERIPH_RST3_UART3); + /* make UART4 out of reset */ + MmioWrite32 (PERI_CTRL_BASE + SC_PERIPH_RSTDIS3, PERIPH_RST3_UART4); + MmioWrite32 (PERI_CTRL_BASE + SC_PERIPH_CLKEN3, PERIPH_RST3_UART4); + + /* make DW_MMC2 out of reset */ + MmioWrite32 (PERI_CTRL_BASE + SC_PERIPH_RSTDIS0, PERIPH_RST0_MMC2); + + /* enable clock for BT/WIFI */ + Val = MmioRead32 (PMUSSI_REG(0x1c)) | 0x40; + MmioWrite32 (PMUSSI_REG(0x1c), Val); +} + +STATIC +VOID +MtcmosInit ( + IN VOID + ) +{ + UINT32 Data; + + /* enable MTCMOS for GPU */ + MmioWrite32 (AO_CTRL_BASE + SC_PW_MTCMOS_EN0, PW_EN0_G3D); + do { + Data = MmioRead32 (AO_CTRL_BASE + SC_PW_MTCMOS_ACK_STAT0); + } while ((Data & PW_EN0_G3D) == 0); +} + +EFI_STATUS +HiKeyInitPeripherals ( + IN VOID + ) +{ + UINT32 Data, Bits; + + /* make I2C0/I2C1/I2C2/SPI0 out of reset */ + Bits = PERIPH_RST3_I2C0 | PERIPH_RST3_I2C1 | PERIPH_RST3_I2C2 | \ + PERIPH_RST3_SSP; + MmioWrite32 (PERI_CTRL_BASE + SC_PERIPH_RSTDIS3, Bits); + + do { + Data = MmioRead32 (PERI_CTRL_BASE + SC_PERIPH_RSTSTAT3); + } while (Data & Bits); + + UartInit (); + MtcmosInit (); + + /* Set DETECT_J15_FASTBOOT (GPIO24) pin as GPIO function */ + MmioWrite32 (0xf7010950, 0); /* configure GPIO24 as nopull */ + MmioWrite32 (0xf7010140, 0); /* configure GPIO24 as GPIO */ + + return EFI_SUCCESS; +} + +EFI_STATUS +EFIAPI +VirtualKeyboardRegister ( + IN VOID + ) +{ + EFI_STATUS Status; + + Status = gBS->LocateProtocol ( + &gEmbeddedGpioProtocolGuid, + NULL, + (VOID **) &mGpio + ); + if (EFI_ERROR (Status)) { + return Status; + } + return EFI_SUCCESS; +} + +EFI_STATUS +EFIAPI +VirtualKeyboardReset ( + IN VOID + ) +{ + EFI_STATUS Status; + + if (mGpio == NULL) { + return EFI_INVALID_PARAMETER; + } + Status = mGpio->Set (mGpio, DETECT_J15_FASTBOOT, GPIO_MODE_INPUT); + return Status; +} + +BOOLEAN +EFIAPI +VirtualKeyboardQuery ( + IN VIRTUAL_KBD_KEY *VirtualKey + ) +{ + EFI_STATUS Status; + UINTN Value = 0; + + if ((VirtualKey == NULL) || (mGpio == NULL)) { + return FALSE; + } + if (MmioRead32 (ADB_REBOOT_ADDRESS) == ADB_REBOOT_BOOTLOADER) { + goto Done; + } else { + Status = mGpio->Get (mGpio, DETECT_J15_FASTBOOT, &Value); + if (EFI_ERROR (Status) || (Value != 0)) { + return FALSE; + } + } +Done: + VirtualKey->Signature = VIRTUAL_KEYBOARD_KEY_SIGNATURE; + VirtualKey->Key.ScanCode = SCAN_NULL; + VirtualKey->Key.UnicodeChar = L'f'; + return TRUE; +} + +EFI_STATUS +EFIAPI +VirtualKeyboardClear ( + IN VIRTUAL_KBD_KEY *VirtualKey + ) +{ + if (VirtualKey == NULL) { + return EFI_INVALID_PARAMETER; + } + if (MmioRead32 (ADB_REBOOT_ADDRESS) == ADB_REBOOT_BOOTLOADER) { + MmioWrite32 (ADB_REBOOT_ADDRESS, ADB_REBOOT_NONE); + WriteBackInvalidateDataCacheRange ((VOID *)ADB_REBOOT_ADDRESS, 4); + } + return EFI_SUCCESS; +} + +PLATFORM_VIRTUAL_KBD_PROTOCOL mVirtualKeyboard = { + VirtualKeyboardRegister, + VirtualKeyboardReset, + VirtualKeyboardQuery, + VirtualKeyboardClear +}; + +EFI_STATUS +EFIAPI +HiKeyEntryPoint ( + IN EFI_HANDLE ImageHandle, + IN EFI_SYSTEM_TABLE *SystemTable + ) +{ + EFI_STATUS Status; + + Status = HiKeyInitPeripherals (); + if (EFI_ERROR (Status)) { + return Status; + } + + Status = gBS->InstallProtocolInterface ( + &ImageHandle, + &gPlatformVirtualKeyboardProtocolGuid, + EFI_NATIVE_INTERFACE, + &mVirtualKeyboard + ); + return Status; +} diff --git a/Platform/Hisilicon/HiKey/HiKeyDxe/HiKeyDxe.inf b/Platform/Hisilicon/HiKey/HiKeyDxe/HiKeyDxe.inf new file mode 100644 index 0000000..814b5da --- /dev/null +++ b/Platform/Hisilicon/HiKey/HiKeyDxe/HiKeyDxe.inf @@ -0,0 +1,58 @@ +# +# Copyright (c) 2013 - 2014, ARM Ltd. All rights reserved. +# Copyright (c) 2018, Linaro Ltd. All rights reserved. +# +# This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# + +[Defines] + INF_VERSION = 0x00010005 + BASE_NAME = HiKeyDxe + FILE_GUID = f567684b-1089-4214-8881-d64b20cbda2f + MODULE_TYPE = DXE_DRIVER + VERSION_STRING = 1.0 + ENTRY_POINT = HiKeyEntryPoint + +[Sources.common] + HiKeyDxe.c + +[Packages] + ArmPkg/ArmPkg.dec + EmbeddedPkg/Drivers/VirtualKeyboardDxe/VirtualKeyboardDxe.dec + EmbeddedPkg/EmbeddedPkg.dec + MdePkg/MdePkg.dec + MdeModulePkg/MdeModulePkg.dec + +[LibraryClasses] + BaseMemoryLib + CacheMaintenanceLib + DebugLib + DxeServicesLib + DxeServicesTableLib + FdtLib + IoLib + PcdLib + PrintLib + SerialPortLib + TimerLib + UefiBootServicesTableLib + UefiRuntimeServicesTableLib + UefiLib + UefiDriverEntryPoint + +[Protocols] + gEmbeddedGpioProtocolGuid + gPlatformVirtualKeyboardProtocolGuid + +[Guids] + gEfiEndOfDxeEventGroupGuid + gEfiFileInfoGuid + +[Depex] + TRUE diff --git a/Silicon/Hisilicon/Hi6220/Include/Hi6220RegsPeri.h b/Silicon/Hisilicon/Hi6220/Include/Hi6220RegsPeri.h new file mode 100644 index 0000000..8419685 --- /dev/null +++ b/Silicon/Hisilicon/Hi6220/Include/Hi6220RegsPeri.h @@ -0,0 +1,48 @@ +/** @file +* +* Copyright (c) 2018, Linaro Ltd. All rights reserved. +* +* This program and the accompanying materials +* are licensed and made available under the terms and conditions of the BSD License +* which accompanies this distribution. The full text of the license may be found at +* http://opensource.org/licenses/bsd-license.php +* +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +* +**/ + +#ifndef __HI6220_REGS_PERI_H__ +#define __HI6220_REGS_PERI_H__ + +#define SC_PERIPH_CLKEN3 0x230 +#define SC_PERIPH_RSTEN3 0x330 +#define SC_PERIPH_RSTDIS0 0x304 +#define SC_PERIPH_RSTDIS3 0x334 +#define SC_PERIPH_RSTSTAT3 0x338 + +/* SC_PERIPH_RSTEN0/RSTDIS0/RSTSTAT0 */ +#define PERIPH_RST0_MMC2 (1 << 2) + +/* SC_PERIPH_RSTEN3/RSTDIS3/RSTSTAT3 */ +#define PERIPH_RST3_CSSYS (1 << 0) +#define PERIPH_RST3_I2C0 (1 << 1) +#define PERIPH_RST3_I2C1 (1 << 2) +#define PERIPH_RST3_I2C2 (1 << 3) +#define PERIPH_RST3_I2C3 (1 << 4) +#define PERIPH_RST3_UART1 (1 << 5) +#define PERIPH_RST3_UART2 (1 << 6) +#define PERIPH_RST3_UART3 (1 << 7) +#define PERIPH_RST3_UART4 (1 << 8) +#define PERIPH_RST3_SSP (1 << 9) +#define PERIPH_RST3_PWM (1 << 10) +#define PERIPH_RST3_BLPWM (1 << 11) +#define PERIPH_RST3_TSENSOR (1 << 12) +#define PERIPH_RST3_DAPB (1 << 18) +#define PERIPH_RST3_HKADC (1 << 19) +#define PERIPH_RST3_CODEC_SSI (1 << 20) +#define PERIPH_RST3_PMUSSI1 (1 << 22) + +#define PMUSSI_REG(x) (PMUSSI_BASE + ((x) << 2)) + +#endif /* __HI6220_REGS_PERI_H__ */