From patchwork Tue Feb 27 14:38:35 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Alex_Benn=C3=A9e?= X-Patchwork-Id: 129822 Delivered-To: patch@linaro.org Received: by 10.80.172.228 with SMTP id x91csp384147edc; Tue, 27 Feb 2018 07:06:08 -0800 (PST) X-Google-Smtp-Source: AG47ELv4VNJ3l3rOypXZrqIpNsgT8nlWaMLQOswD3V10UY52StONgzYKgLNrFsUvGSxa4XEy2Beq X-Received: by 10.129.87.75 with SMTP id l72mr9357084ywb.417.1519743968131; Tue, 27 Feb 2018 07:06:08 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1519743968; cv=none; d=google.com; s=arc-20160816; b=jUeCxcJfcKsLZSQnV15Vpklkamz21Be5e2JSEA0UdVfOkNLotikcdhE7HqLs2QM0hz vAg+fh2vviUN7sCS4Z3GL0kTlxgOtqPzJJ70PF9DVe3RZyNuujTA1Dme0SefUus8heNf msD6fcZ6x4PMHqMvfU4Vy226zjYGSe7JwzxxnmaRbLWs/UVfS+ucwdSYc/t1x4ZkD1cc WpN0uJJm4ExOHTmhjppMtee+vzsYuc3v0n8QOGuOsSxtIo+XMYaqG3HdZDKHmKPZ/87V XbWrQIh7/IJWbxrKIZAK52wr1zY1G1DVhGlVvVQpX2VIeYl4XutKKTpvT8a4HXitxab1 pqeQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject :content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:to:from:dkim-signature:arc-authentication-results; bh=efGvMqVzPF9U0N64rfXjXKacBTZpJqDSzWRXqL1Omv8=; b=vspnXpAAjj0koNo+W9RAKWYX7bniPBNKOiJTcaKVphE22uLJDUbwuHFjsi9XIg9L78 2bFwWV0yKMkCGfKQsZXzjG6mdeSDs7IcLBQO6o5yyzwdPW6+VyJqfwH/NKlPjUywHCke HIVEJD6ovrykP2AA6J89lrY+fblocJR3numkMOneq/EeBtvdFNlFmHYpXDtrcS/TFi8u RLcVrM/42YXq+JZ/iCS7eTOppVBMZqbddS7dj8KNLaaHGz+MktUwk+rRdrFfJ0hBg7Ww kbJb8PR+vQBSH1qrz0xUHN0/yPB/hO2V9dxuUf26fGP5YV8SWoPvbyKMwbNjv5mW8EtY xjxw== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=O6Fex1eu; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom=qemu-devel-bounces+patch=linaro.org@nongnu.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [2001:4830:134:3::11]) by mx.google.com with ESMTPS id z21si1960744ywz.214.2018.02.27.07.06.07 for (version=TLS1 cipher=AES128-SHA bits=128/128); Tue, 27 Feb 2018 07:06:08 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) client-ip=2001:4830:134:3::11; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=O6Fex1eu; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom=qemu-devel-bounces+patch=linaro.org@nongnu.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:37852 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eqgpT-00011M-G9 for patch@linaro.org; Tue, 27 Feb 2018 10:06:07 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:58549) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eqgYF-0003im-FQ for qemu-devel@nongnu.org; Tue, 27 Feb 2018 09:48:23 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1eqgYC-0001xc-7K for qemu-devel@nongnu.org; Tue, 27 Feb 2018 09:48:19 -0500 Received: from mail-wr0-x242.google.com ([2a00:1450:400c:c0c::242]:37905) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1eqgYB-0001tS-P5 for qemu-devel@nongnu.org; Tue, 27 Feb 2018 09:48:16 -0500 Received: by mail-wr0-x242.google.com with SMTP id n7so25153336wrn.5 for ; Tue, 27 Feb 2018 06:48:15 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=efGvMqVzPF9U0N64rfXjXKacBTZpJqDSzWRXqL1Omv8=; b=O6Fex1eu9qFEg4q0nXrpyhFfLkml/x6aL+MIIgtupR5/i7StkTqdHHcKJYdP7MlJK/ hb4TGIi99lKeUW1hOD2vAy4RWQgx9y981bPhcyDu/rEzKW2Sll6LMqUQk7j1hgqmZ0hn PJnnPvOAlRAvMpqyxnuRy0WSrz15F5ExfacAw= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=efGvMqVzPF9U0N64rfXjXKacBTZpJqDSzWRXqL1Omv8=; b=ASytrDDM04bcXNP0DI/qP2MWEnwNqdOX2wtJYwtw/y2TrX+ib4yflFvjsXUK61DdYo DTkKb3+fwbim9A+o3Z0MkZ8mwNHQrhX9u1bgh66Qe+Iv/XZcKSvnCxYmQtr3dnjrD3lT o5XuWFndNOYEhGolnDCn+L7L9aZjwOxLhentjanNN86gmDpdNa/4bJkClZZeGJqFde3w 2FHGi8BWOKm2/StfH0tJIbvWIXZgopK4zs/002LAPzr1iuB1sXTt/BiQTcAmprCLUWT0 lAWYkhYAZ67neqeyzYwTPBdzP1ARqwuteVnFtZzoPF4tNuCF+D532myvrOhoIuIP5wIl Dhkg== X-Gm-Message-State: APf1xPDvX5IPxIEsWzNiTLRN5jVFVN1lDX/XS0kFQOfort5irspTVG2g QbjQ/uRX0ygT2MINZ6eleJVPsQ== X-Received: by 10.223.134.12 with SMTP id 12mr12461953wrv.193.1519742894536; Tue, 27 Feb 2018 06:48:14 -0800 (PST) Received: from zen.linaro.local ([81.128.185.34]) by smtp.gmail.com with ESMTPSA id e67sm32845917wmf.7.2018.02.27.06.48.05 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 27 Feb 2018 06:48:08 -0800 (PST) Received: from zen.linaroharston (localhost [127.0.0.1]) by zen.linaro.local (Postfix) with ESMTP id ED75B3E0BDF; Tue, 27 Feb 2018 14:38:53 +0000 (GMT) From: =?utf-8?q?Alex_Benn=C3=A9e?= To: qemu-arm@nongnu.org Date: Tue, 27 Feb 2018 14:38:35 +0000 Message-Id: <20180227143852.11175-15-alex.bennee@linaro.org> X-Mailer: git-send-email 2.15.1 In-Reply-To: <20180227143852.11175-1-alex.bennee@linaro.org> References: <20180227143852.11175-1-alex.bennee@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:400c:c0c::242 Subject: [Qemu-devel] [PATCH v4 14/31] arm/translate-a64: add FP16 FMULX/MLS/FMLA to simd_indexed X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?utf-8?q?Alex_Benn=C3=A9e?= , richard.henderson@linaro.org, qemu-devel@nongnu.org, Peter Maydell Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" The helpers use the new re-factored muladd support in SoftFloat for the float16 work. Signed-off-by: Alex Bennée --- v3 - re-jigged switch statement to fall-through for unalloc - added is_fp16 bool for fpst - fixed up some long lines v4 - don't double-check for feature bit --- target/arm/translate-a64.c | 82 +++++++++++++++++++++++++++++++++++++--------- 1 file changed, 66 insertions(+), 16 deletions(-) -- 2.15.1 Reviewed-by: Richard Henderson diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c index e96e6cdd15..6a264bc134 100644 --- a/target/arm/translate-a64.c +++ b/target/arm/translate-a64.c @@ -11198,6 +11198,7 @@ static void disas_simd_indexed(DisasContext *s, uint32_t insn) int rd = extract32(insn, 0, 5); bool is_long = false; bool is_fp = false; + bool is_fp16 = false; int index; TCGv_ptr fpst; @@ -11244,7 +11245,7 @@ static void disas_simd_indexed(DisasContext *s, uint32_t insn) } /* fall through */ case 0x9: /* FMUL, FMULX */ - if (!extract32(size, 1, 1)) { + if (size == 1) { unallocated_encoding(s); return; } @@ -11256,18 +11257,34 @@ static void disas_simd_indexed(DisasContext *s, uint32_t insn) } if (is_fp) { - /* low bit of size indicates single/double */ - size = extract32(size, 0, 1) ? 3 : 2; - if (size == 2) { + /* convert insn encoded size to TCGMemOp size */ + switch (size) { + case 2: /* single precision */ + size = MO_32; index = h << 1 | l; - } else { + rm |= (m << 4); + break; + case 3: /* double precision */ + size = MO_64; if (l || !is_q) { unallocated_encoding(s); return; } index = h; + rm |= (m << 4); + break; + case 0: /* half precision */ + size = MO_16; + index = h << 2 | l << 1 | m; + is_fp16 = true; + if (arm_dc_feature(s, ARM_FEATURE_V8_FP16)) { + break; + } + /* fallthru */ + default: /* unallocated */ + unallocated_encoding(s); + return; } - rm |= (m << 4); } else { switch (size) { case 1: @@ -11288,7 +11305,7 @@ static void disas_simd_indexed(DisasContext *s, uint32_t insn) } if (is_fp) { - fpst = get_fpstatus_ptr(false); + fpst = get_fpstatus_ptr(is_fp16); } else { fpst = NULL; } @@ -11390,18 +11407,51 @@ static void disas_simd_indexed(DisasContext *s, uint32_t insn) break; } case 0x5: /* FMLS */ - /* As usual for ARM, separate negation for fused multiply-add */ - gen_helper_vfp_negs(tcg_op, tcg_op); - /* fall through */ case 0x1: /* FMLA */ - read_vec_element_i32(s, tcg_res, rd, pass, MO_32); - gen_helper_vfp_muladds(tcg_res, tcg_op, tcg_idx, tcg_res, fpst); + read_vec_element_i32(s, tcg_res, rd, pass, + is_scalar ? size : MO_32); + switch (size) { + case 1: + if (opcode == 0x5) { + /* As usual for ARM, separate negation for fused + * multiply-add */ + tcg_gen_xori_i32(tcg_op, tcg_op, 0x80008000); + } + gen_helper_advsimd_muladdh(tcg_res, tcg_op, tcg_idx, + tcg_res, fpst); + break; + case 2: + if (opcode == 0x5) { + /* As usual for ARM, separate negation for + * fused multiply-add */ + tcg_gen_xori_i32(tcg_op, tcg_op, 0x80000000); + } + gen_helper_vfp_muladds(tcg_res, tcg_op, tcg_idx, + tcg_res, fpst); + break; + default: + g_assert_not_reached(); + } break; case 0x9: /* FMUL, FMULX */ - if (u) { - gen_helper_vfp_mulxs(tcg_res, tcg_op, tcg_idx, fpst); - } else { - gen_helper_vfp_muls(tcg_res, tcg_op, tcg_idx, fpst); + switch (size) { + case 1: + if (u) { + gen_helper_advsimd_mulxh(tcg_res, tcg_op, tcg_idx, + fpst); + } else { + g_assert_not_reached(); + } + break; + case 2: + if (u) { + gen_helper_vfp_mulxs(tcg_res, tcg_op, tcg_idx, fpst); + } else { + gen_helper_vfp_muls(tcg_res, tcg_op, tcg_idx, fpst); + } + break; + default: + g_assert_not_reached(); } break; case 0xc: /* SQDMULH */